• Will Deacon's avatar
    ARM: 6205/1: perf: ensure counter delta is treated as unsigned · 446a5a8b
    Will Deacon authored
    Hardware performance counters on ARM are 32-bits wide but atomic64_t
    variables are used to represent counter data in the hw_perf_event structure.
    
    The armpmu_event_update function right-shifts a signed 64-bit delta variable
    and adds the result to the event count. This can lead to shifting in sign-bits
    if the MSB of the 32-bit counter value is set. This results in perf output
    such as:
    
     Performance counter stats for 'sleep 20':
    
     18446744073460670464  cycles             <-- 0xFFFFFFFFF12A6000
            7783773  instructions             #      0.000 IPC
                465  context-switches
                161  page-faults
            1172393  branches
    
       20.154242147  seconds time elapsed
    
    This patch ensures that the delta value is treated as unsigned so that the
    right shift sets the upper bits to zero.
    
    Cc: <stable@kernel.org>
    Acked-by: default avatarJamie Iles <jamie.iles@picochip.com>
    Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
    Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
    446a5a8b
perf_event.c 79.4 KB