• Daniel Vetter's avatar
    drm/i915: extract rps interrupt enable/disable helpers · 44fc7d5c
    Daniel Vetter authored
    The VECS enabling required some changes to how rps interrupts are
    enabled/disabled since VECS interrupts are handling with the PM
    interrupt registers.
    
    But now that the pre/postinstall sequences is identical for all
    platforms with rps support (snb, ivb, hsw, vlv) we can also use the
    exact same sequence to actually enable the rps interrupts. Strictly
    speaking using spinlocks is overkill on snb/ivb & vlv since they have
    no VECS ring, but imo that's more than made up by the common code.
    
    Hence this just unifies the vlv code with the snb-hsw code which
    matched exactly before the VECS enabling. See
    
    commit eda63ffb
    Author: Ben Widawsky <ben@bwidawsk.net>
    Date:   Tue May 28 19:22:26 2013 -0700
    
        drm/i915: Add PM regs to pre/post install
    
    and
    
    commit 4848405c
    Author: Ben Widawsky <ben@bwidawsk.net>
    Date:   Tue May 28 19:22:27 2013 -0700
    
        drm/i915: make PM interrupt writes non-destructive
    
    for why the gen6 code (shared between snb, ivb and hsw) needed to be
    changed originally.
    
    v3: Improve the commit message to more clearly spell out why we want
    to unify the code and what exactly changes.
    
    Cc: Paulo Zanoni <przanoni@gmail.com>
    Cc: Ben Widawsky <ben@bwidawsk.net>
    Reviewed-by: default avatarBen Widawsky <ben@bwidawsk.net>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    44fc7d5c
intel_pm.c 155 KB