For intel ones, ahci unconditionally OR'd 0xf to PCS.  This isn't
correct for the following cases.

* ich6/7m's which only implement P0 and P2 (0xf works fine tho)

* ich8/9's which have six ports and needs 0x3f to enable all ports

This patch updates PCS programming such that...

* port_map determined by ahci_save_initial_config() is OR'd instead of 0xf

* PCS is updated only if necessary (there are turned off enable bits)

port_map is determined from PORTS_IMPL PCI register which is
implemented as write or write-once register.  If the register isn't
programmed, ahci automatically generates it from number of ports,
which is good enough for PCS programming.  ICH6/7M are probably the
only ones where non-contiguous enable bits are necessary && PORTS_IMPL
isn't programmed properly but they're proven to work reliably with 0xf
anyway.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>