• Josue Albarran's avatar
    iommu/omap: Use DMA-API for performing cache flushes · bfee0cf0
    Josue Albarran authored
    The OMAP IOMMU driver was using ARM assembly code directly for
    flushing the MMU page table entries from the caches. This caused
    MMU faults on OMAP4 (Cortex-A9 based SoCs) as L2 caches were not
    handled due to the presence of a PL310 L2 Cache Controller. These
    faults were however not seen on OMAP5/DRA7 SoCs (Cortex-A15 based
    SoCs).
    
    The OMAP IOMMU driver is adapted to use the DMA Streaming API
    instead now to flush the page table/directory table entries from
    the CPU caches. This ensures that the devices always see the
    updated page table entries. The outer caches are now addressed
    automatically with the usage of the DMA API.
    Signed-off-by: default avatarJosue Albarran <j-albarran@ti.com>
    Acked-by: default avatarSuman Anna <s-anna@ti.com>
    Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
    bfee0cf0
omap-iommu.c 31.6 KB