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Rajendra Nayak authored
Add the power domain supporting performance state and the corresponding OPP tables for the qspi device on sdm845 Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1593769293-6354-3-git-send-email-rnayak@codeaurora.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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