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Sekhar Nori authored
USB0 48MHz PHY clock registration fails on DA830 because the da8xx-cfgchip clock driver cannot get a reference to USB0 LPSC clock. The USB0 LPSC needs to be enabled during PHY clock enable. Setup the clock lookup correctly to fix this. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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