This patch modifies pin control groups of SD pins on EXYNOS4210
and EXYNOS4X12 to use drive strength 3 as a default value which
corresponds to S5P_GPIO_DRVSTR_LV4 in legacy non-DT code.

This is needed at least on Origen board for sdhci2 to work and
if any other drive strength is required on each board, we can
overide it.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: edited commit message]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>