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Suman Anna authored
The Keystone 2 66AK2E SoC has one TMS320C66x DSP Core Subsystem (C66x CorePac), with a 1.4 GHz C66x Fixed or Floating-Point DSP Core, and 32 KB of L1P & L1D SRAMs and a 1 MB L2 SRAM. Add the DT node for this DSP processor sub-system. The processor does not have a MMU, and uses various IPC Generation registers and shared memory for inter-processor communication. The alias with a stem 'rproc' has also been added for the DSP, it provides a fixed remoteproc id for the DSP processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Sam Nelson <sam.nelson@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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