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Tony Lindgren authored
Looks like I made a typo on the control base, all the 81xx SoCs have it at 0x48140000 base. We've just gotten away with the typo as the Ethernet phy was configured by the bootloader on my test system and we're not yet using the pinctrl. In addition to fixing the contol base, we need to also use the right Ethernet phy flags to initialize it. And we are still missing the PLL driver for dm814x and only relying on the divider and mux clocks. Fixes: f3d953ea ("ARM: dts: Add minimal dm814x support") Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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