• Grygorii Strashko's avatar
    phy: ti: introduce phy-gmii-sel driver · 92b58b34
    Grygorii Strashko authored
    TI am335x/am437x/dra7(am5)/dm814x CPSW3G Ethernet Subsystem supports two
    10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII
    interfaces. The interface mode is selected by configuring the MII mode
    selection register(s) (GMII_SEL) in the System Control Module chapter
    (SCM). GMII_SEL register(s) and bit fields placement in SCM are different
    between SoCs while fields meaning is the same.
    
    Historically CPSW external Port's interface mode selection configuration
    was introduced using custom API and driver cpsw-phy-sel.c. This leads to
    unnecessary driver, DT binding and custom API support effort.
    
    This patch introduces CPSW Port's PHY Interface Mode selection Driver
    (phy-gmii-sel) which implements standard Linux PHY interface and used
    as a replacement for TI's specific driver cpsw-phy-sel.c and corresponding
    custom API.
    
    Cc: Kishon Vijay Abraham I <kishon@ti.com>
    Cc: Tony Lindgren <tony@atomide.com>
    Signed-off-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
    Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
    92b58b34
Makefile 418 Bytes