• Myron Stowe's avatar
    PCI: Pull PCI 'latency timer' setup up into the core · 96c55900
    Myron Stowe authored
    The 'latency timer' of PCI devices, both Type 0 and Type 1,
    is setup in architecture-specific code [see: 'pcibios_set_master()'].
    There are two approaches being taken by all the architectures - check
    if the 'latency timer' is currently set between 16 and 255 and if not
    bring it within bounds, or, do nothing (and then there is the
    gratuitously different PA-RISC implementation).
    
    There is nothing architecture-specific about PCI's 'latency timer' so
    this patch pulls its setup functionality up into the PCI core by
    creating a generic 'pcibios_set_master()' function using the '__weak'
    attribute which can be used by all architectures as a default which,
    if necessary, can then be over-ridden by architecture-specific code.
    
    No functional change.
    Signed-off-by: default avatarMyron Stowe <myron.stowe@redhat.com>
    Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
    96c55900
pci-asb2305.c 7.18 KB