• Stanislav Lisovskiy's avatar
    drm/i915: Use bw state for per crtc SAGV evaluation · 9728889f
    Stanislav Lisovskiy authored
    Future platforms require per-crtc SAGV evaluation
    and serializing global state when those are changed
    from different commits.
    
    v2: - Add has_sagv check to intel_crtc_can_enable_sagv
          so that it sets bit in reject mask.
        - Use bw_state in intel_pre/post_plane_enable_sagv
          instead of atomic state
    
    v3: - Fixed rebase conflict, now using
          intel_atomic_crtc_state_for_each_plane_state in
          order to call it from atomic check
    v4: - Use fb modifier from plane state
    
    v5: - Make intel_has_sagv static again(Ville)
        - Removed unnecessary NULL assignments(Ville)
        - Removed unnecessary SAGV debug(Ville)
        - Call intel_compute_sagv_mask only for modesets(Ville)
        - Serialize global state only if sagv results change, but
          not mask itself(Ville)
    
    v6: - use lock global state instead of serialize(Ville)
    v7: - use both global state lock and serialize depending on
          if we need to change only global state or access hw
          (Ville)
    Signed-off-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
    Cc: Ville Syrjälä <ville.syrjala@intel.com>
    Cc: James Ausmus <james.ausmus@intel.com>
    Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20200430191757.18206-1-stanislav.lisovskiy@intel.com
    9728889f
intel_bw.h 1.19 KB