• Will Deacon's avatar
    arm64: flush TLS registers during exec · eb35bdd7
    Will Deacon authored
    Nathan reports that we leak TLS information from the parent context
    during an exec, as we don't clear the TLS registers when flushing the
    thread state.
    
    This patch updates the flushing code so that we:
    
      (1) Unconditionally zero the tpidr_el0 register (since this is fully
          context switched for native tasks and zeroed for compat tasks)
    
      (2) Zero the tp_value state in thread_info before clearing the
          tpidrr0_el0 register for compat tasks (since this is only writable
          by the set_tls compat syscall and therefore not fully switched).
    
    A missing compiler barrier is also added to the compat set_tls syscall.
    
    Cc: <stable@vger.kernel.org>
    Acked-by: default avatarNathan Lynch <Nathan_Lynch@mentor.com>
    Reported-by: default avatarNathan Lynch <Nathan_Lynch@mentor.com>
    Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
    eb35bdd7
sys_compat.c 2.66 KB