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Dong Aisheng authored
According to spec, set to 1 is the enable of fractional devide or the clock can not be generated properly. Signed-off-by: Dong Aisheng <b29396@freescale.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
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