• Andi Kleen's avatar
    perf/x86: Add option to disable reading branch flags/cycles · b16a5b52
    Andi Kleen authored
    With LBRv5 reading the extra LBR flags like mispredict, TSX, cycles is
    not free anymore, as it has moved to a separate MSR.
    
    For callstack mode we don't need any of this information; so we can
    avoid the unnecessary MSR read. Add flags to the perf interface where
    perf record can request not collecting this information.
    
    Add branch_sample_type flags for CYCLES and FLAGS. It's a bit unusual
    for branch_sample_types to be negative (disable), not positive (enable),
    but since the legacy ABI reported the flags we need some form of
    explicit disabling to avoid breaking the ABI.
    
    After we have the flags the x86 perf code can keep track if any users
    need the flags. If noone needs it the information is not collected.
    
    This cuts down the cost of LBR callstack on Skylake significantly.
    Profiling a kernel build with LBR call stack the average run time of
    the PMI handler drops by 43%.
    Signed-off-by: default avatarAndi Kleen <ak@linux.intel.com>
    Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
    Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
    Cc: Jiri Olsa <jolsa@redhat.com>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Mike Galbraith <efault@gmx.de>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Stephane Eranian <eranian@google.com>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: Vince Weaver <vincent.weaver@maine.edu>
    Cc: acme@kernel.org
    Cc: jolsa@kernel.org
    Link: http://lkml.kernel.org/r/1445366797-30894-2-git-send-email-andi@firstfloor.orgSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
    b16a5b52
perf_event_intel_lbr.c 26.3 KB