• Dhinakaran Pandiyan's avatar
    drm/i915/tgl: Gen-12 render decompression · b3e57bcc
    Dhinakaran Pandiyan authored
    Gen-12 display decompression operates on Y-tiled compressed main surface.
    The CCS is linear and has 4 bits of metadata for each main surface cache
    line pair, a size ratio of 1:256. Gen-12 display decompression is
    incompatible with buffers compressed by earlier GPUs, so make use of a new
    modifier to identify gen-12 compression. Another notable change is that
    render decompression is supported on all planes except cursor and on all
    pipes. Start by adding render decompression support for [A,X]BGR888 pixel
    formats.
    
    v2: Fix checkpatch warnings (Lucas)
    v3:
    Rebase, disable color clear, styling changes and modify
    intel_tile_width_bytes and intel_tile_height to handle linear CCS
    v4:
    - Use format block descriptors and the i915 specific func to get the
      subsampling for each color plane.
    - Use helpers to convert between CCS and main planes.
    v5:
    - Fix subsampling returned by intel_fb_plane_get_subsampling() for
      the CCS plane of the first plane.
    v6:
    - Rebased on v2 of patch 4.
    v7:
    - Fix plane dimensions during FB check.
    
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Cc: Matt Roper <matthew.d.roper@intel.com>
    Cc: Nanley G Chery <nanley.g.chery@intel.com>
    Cc: Jason Ekstrand <jason@jlekstrand.net>
    Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
    Signed-off-by: default avatarDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
    Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
    Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
    Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> (v6)
    Link: https://patchwork.freedesktop.org/patch/msgid/20191221120543.22816-7-imre.deak@intel.com
    b3e57bcc
intel_display.c 515 KB