• Michael Chan's avatar
    [BNX2]: Reduce spurious INTA interrupts. · b8a7ce7b
    Michael Chan authored
    Spurious interrupts are often encountered especially on systems
    using the 8259 PIC mode.  This is because the I/O write to deassert
    the interrupt is posted and won't get to the chip immediately.  As
    a result, the IRQ may remain asserted after the IRQ handler exits,
    causing spurious interrupts.
    
    Add read back to flush the I/O write to deassert the IRQ immediately.
    We also store the last_status_idx immediately in the IRQ handler to
    help detect whether the interrupt is ours or not when the IRQ is
    entered again before ->poll gets called.
    Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    b8a7ce7b
bnx2.c 165 KB