• Piotr Redlewski's avatar
    drm/amd/amdgpu: fix UVD mc offsets · c1fe75c9
    Piotr Redlewski authored
    When UVD bo is created, its size is based on the information from firmware
    header (ucode_size_bytes). The same value should be be used when programming
    UVD mc controller offsets, otherwise it can happen that
    (mmUVD_VCPU_CACHE_OFFSET2 + mmUVD_VCPU_CACHE_SIZE2) will point
    AMDGPU_GPU_PAGE_SIZE bytes after the UVD bo end.
    
    Second issue is that when programming the mmUVD_VCPU_CACHE_SIZE0 register,
    AMDGPU_UVD_FIRMWARE_OFFSET should be taken into account. If it isn't,
    (mmUVD_VCPU_CACHE_OFFSET2 + mmUVD_VCPU_CACHE_SIZE2) will always point
    AMDGPU_UVD_FIRMWARE_OFFSET bytes after the UVD bo end.
    
    v2: move firmware size calculation into macro definition
    v3: align firmware size to the gpu page size
    Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
    Signed-off-by: default avatarPiotr Redlewski <predlewski@gmail.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    c1fe75c9
uvd_v4_2.c 20.1 KB