Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.

Pro5 and PXs2 are affected by this fix, but the SCSSI clock gate of Pro5 is
common to all channels.

Fixes: 92fa4f4c ("ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>