This patch fixes a receive hang that occasionally occurs after a Tx
FIFO underrun.  The receive dma remains in a hung state sometimes.  The
transmit operations continue to occur, but no receive activity.

This was reproduced on several ppc64 systems and the fix has been verified
there.  The patch has been tested as well on an ia32 system, which did
not experience the hang because it did not have fifo underruns, which is
a preqrequisite for the hang.  The memory barriers decreased the frequency
of occurrence.  The final change to reset the chip instead of just stopping
it eliminated the last hangs.

Please also apply against 2.4.7 (with offset of -1), tested ia32.

Signed-off by: brazilnut@us.ibm.com