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Dinh Nguyen authored
Fixes the register address for the timer3 entry on Arria10. Fixes: 475dc86d ("arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC") Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
0ff5a481
Fixes the register address for the timer3 entry on Arria10. Fixes: 475dc86d ("arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC") Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>