• Ross Zwisler's avatar
    libnvdimm, pmem: Unconditionally deep flush on *sync · ce7f11a2
    Ross Zwisler authored
    Prior to this commit we would only do a "deep flush" (have nvdimm_flush()
    write to each of the flush hints for a region) in response to an
    msync/fsync/sync call if the nvdimm_has_cache() returned true at the time
    we were setting up the request queue.  This happens due to the write cache
    value passed in to blk_queue_write_cache(), which then causes the block
    layer to send down BIOs with REQ_FUA and REQ_PREFLUSH set.  We do have a
    "write_cache" sysfs entry for namespaces, i.e.:
    
      /sys/bus/nd/devices/pfn0.1/block/pmem0/dax/write_cache
    
    which can be used to control whether or not the kernel thinks a given
    namespace has a write cache, but this didn't modify the deep flush behavior
    that we set up when the driver was initialized.  Instead, it only modified
    whether or not DAX would flush CPU caches via dax_flush() in response to
    *sync calls.
    
    Simplify this by making the *sync deep flush always happen, regardless of
    the write cache setting of a namespace.  The DAX CPU cache flushing will
    still be controlled the write_cache setting of the namespace.
    
    Cc: <stable@vger.kernel.org>
    Fixes: 5fdf8e5b ("libnvdimm: re-enable deep flush for pmem devices via fsync()")
    Signed-off-by: default avatarRoss Zwisler <ross.zwisler@linux.intel.com>
    Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
    ce7f11a2
pmem.c 13.9 KB