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Add and initialize improc and timing_ctrlr according to D71 capablitites v2: Rebase. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
f5f0a68e
Add and initialize improc and timing_ctrlr according to D71 capablitites v2: Rebase. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>