Commit 0240f945 authored by Ricardo Ribalda Delgado's avatar Ricardo Ribalda Delgado Committed by Mark Brown

spi/xilinx: Support for spi mode LOOP

Hardware supports LOOP mode. Support it also in the driver.
Signed-off-by: default avatarRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent bca690db
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
#define XSPI_CR_CPOL 0x08 #define XSPI_CR_CPOL 0x08
#define XSPI_CR_CPHA 0x10 #define XSPI_CR_CPHA 0x10
#define XSPI_CR_MODE_MASK (XSPI_CR_CPHA | XSPI_CR_CPOL | \ #define XSPI_CR_MODE_MASK (XSPI_CR_CPHA | XSPI_CR_CPOL | \
XSPI_CR_LSB_FIRST) XSPI_CR_LSB_FIRST | XSPI_CR_LOOP)
#define XSPI_CR_TXFIFO_RESET 0x20 #define XSPI_CR_TXFIFO_RESET 0x20
#define XSPI_CR_RXFIFO_RESET 0x40 #define XSPI_CR_RXFIFO_RESET 0x40
#define XSPI_CR_MANUAL_SSELECT 0x80 #define XSPI_CR_MANUAL_SSELECT 0x80
...@@ -197,6 +197,8 @@ static void xilinx_spi_chipselect(struct spi_device *spi, int is_on) ...@@ -197,6 +197,8 @@ static void xilinx_spi_chipselect(struct spi_device *spi, int is_on)
cr |= XSPI_CR_CPOL; cr |= XSPI_CR_CPOL;
if (spi->mode & SPI_LSB_FIRST) if (spi->mode & SPI_LSB_FIRST)
cr |= XSPI_CR_LSB_FIRST; cr |= XSPI_CR_LSB_FIRST;
if (spi->mode & SPI_LOOP)
cr |= XSPI_CR_LOOP;
xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
/* We do not check spi->max_speed_hz here as the SPI clock /* We do not check spi->max_speed_hz here as the SPI clock
...@@ -356,7 +358,7 @@ static int xilinx_spi_probe(struct platform_device *pdev) ...@@ -356,7 +358,7 @@ static int xilinx_spi_probe(struct platform_device *pdev)
return -ENODEV; return -ENODEV;
/* the spi->mode bits understood by this driver: */ /* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_LOOP;
xspi = spi_master_get_devdata(master); xspi = spi_master_get_devdata(master);
xspi->bitbang.master = master; xspi->bitbang.master = master;
......
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