Commit 0529c6b8 authored by Larry Finger's avatar Larry Finger Committed by John W. Linville

rtlwifi: rtl8723ae: Update driver to match 06/28/14 Realtek version

Not only does this patch update the driver to match the latest Realtek release,
it is an important step in getting the internal code source at Realtek to match
the code in the kernel. The primary reason for this is to make it easier for
Realtek to maintain the kernel source without requiring an intermediate like me.

In this process of merging the two source repositories, there are a lot
of changes in both, and this commit is rather large.
Signed-off-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent b1a3bfc9
......@@ -952,10 +952,8 @@ static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
/*Shared IRQ or HW disappared */
if (!inta || inta == 0xffff) {
ret = IRQ_NONE;
if (!inta || inta == 0xffff)
goto done;
}
/*<1> beacon related */
if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
......
......@@ -60,19 +60,6 @@ struct rtl92c_firmware_header {
__le32 rsvd5;
};
enum rtl8192c_h2c_cmd {
H2C_AP_OFFLOAD = 0,
H2C_SETPWRMODE = 1,
H2C_JOINBSSRPT = 2,
H2C_RSVDPAGE = 3,
H2C_RSSI_REPORT = 5,
H2C_RA_MASK = 6,
H2C_MACID_PS_MODE = 7,
H2C_P2P_PS_OFFLOAD = 8,
H2C_P2P_PS_CTW_CMD = 32,
MAX_H2CCMD
};
#define pagenum_128(_len) (u32)(((_len)>>7) + ((_len)&0x7F ? 1 : 0))
#define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val) \
......
......@@ -132,18 +132,6 @@ struct rtl92d_firmware_header {
u32 rsvd5;
};
enum rtl8192d_h2c_cmd {
H2C_AP_OFFLOAD = 0,
H2C_SETPWRMODE = 1,
H2C_JOINBSSRPT = 2,
H2C_RSVDPAGE = 3,
H2C_RSSI_REPORT = 5,
H2C_RA_MASK = 6,
H2C_MAC_MODE_SEL = 9,
H2C_PWRM = 15,
MAX_H2CCMD
};
int rtl92d_download_fw(struct ieee80211_hw *hw);
void rtl92d_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
u32 cmd_len, u8 *p_cmdbuffer);
......
......@@ -336,7 +336,6 @@ enum fw_h2c_cmd {
H2C_TMP3,
H2C_WOWLAN_UPDATE_IV_CMD, /*50*/
H2C_TMP4,
MAX_H2CCMD /*52*/
};
/* The following macros are used for FW
......
......@@ -11,10 +11,6 @@
** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
** more details.
**
** You should have received a copy of the GNU General Public License along with
** this program; if not, write to the Free Software Foundation, Inc.,
** 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
**
** The full GNU General Public License is included in this distribution in the
** file called LICENSE.
**
......@@ -24,8 +20,7 @@
** Hsinchu 300, Taiwan.
** Larry Finger <Larry.Finger@lwfinger.net>
**
*****************************************************************************
*/
******************************************************************************/
#ifndef __RTL8723E_BTC_H__
#define __RTL8723E_BTC_H__
......
......@@ -11,10 +11,6 @@
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
......@@ -25,55 +21,145 @@
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
****************************************************************************
*/
*****************************************************************************/
#ifndef __RTL8723E_DEF_H__
#define __RTL8723E_DEF_H__
#define HAL_RETRY_LIMIT_INFRA 48
#define HAL_RETRY_LIMIT_AP_ADHOC 7
#define RESET_DELAY_8185 20
#define RT_IBSS_INT_MASKS (IMR_BCNINT | IMR_TBDOK | IMR_TBDER)
#define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK)
#define NUM_OF_FIRMWARE_QUEUE 10
#define NUM_OF_PAGES_IN_FW 0x100
#define NUM_OF_PAGE_IN_FW_QUEUE_BK 0x07
#define NUM_OF_PAGE_IN_FW_QUEUE_BE 0x07
#define NUM_OF_PAGE_IN_FW_QUEUE_VI 0x07
#define NUM_OF_PAGE_IN_FW_QUEUE_VO 0x07
#define NUM_OF_PAGE_IN_FW_QUEUE_HCCA 0x0
#define NUM_OF_PAGE_IN_FW_QUEUE_CMD 0x0
#define NUM_OF_PAGE_IN_FW_QUEUE_MGNT 0x02
#define NUM_OF_PAGE_IN_FW_QUEUE_HIGH 0x02
#define NUM_OF_PAGE_IN_FW_QUEUE_BCN 0x2
#define NUM_OF_PAGE_IN_FW_QUEUE_PUB 0xA1
#define NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM 0x026
#define NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM 0x048
#define NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM 0x048
#define NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM 0x026
#define NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM 0x00
#define MAX_LINES_HWCONFIG_TXT 1000
#define MAX_BYTES_LINE_HWCONFIG_TXT 256
#define SW_THREE_WIRE 0
#define HW_THREE_WIRE 2
#define BT_DEMO_BOARD 0
#define BT_QA_BOARD 1
#define BT_FPGA 2
#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
#define HAL_PRIME_CHNL_OFFSET_LOWER 1
#define HAL_PRIME_CHNL_OFFSET_UPPER 2
#define RX_MPDU_QUEUE 0
#define MAX_H2C_QUEUE_NUM 10
#define CHIP_8723 BIT(0)
#define NORMAL_CHIP BIT(3)
#define RF_TYPE_1T2R BIT(4)
#define RF_TYPE_2T2R BIT(5)
#define CHIP_VENDOR_UMC BIT(7)
#define B_CUT_VERSION BIT(12)
#define C_CUT_VERSION BIT(13)
#define D_CUT_VERSION ((BIT(12)|BIT(13)))
#define E_CUT_VERSION BIT(14)
#define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28))
#define RX_MPDU_QUEUE 0
#define RX_CMD_QUEUE 1
#define RX_MAX_QUEUE 2
#define AC2QUEUEID(_AC) (_AC)
#define C2H_RX_CMD_HDR_LEN 8
#define GET_C2H_CMD_CMD_LEN(__prxhdr) \
LE_BITS_TO_4BYTE((__prxhdr), 0, 16)
#define GET_C2H_CMD_ELEMENT_ID(__prxhdr) \
LE_BITS_TO_4BYTE((__prxhdr), 16, 8)
#define GET_C2H_CMD_CMD_SEQ(__prxhdr) \
LE_BITS_TO_4BYTE((__prxhdr), 24, 7)
#define GET_C2H_CMD_CONTINUE(__prxhdr) \
LE_BITS_TO_4BYTE((__prxhdr), 31, 1)
#define GET_C2H_CMD_CONTENT(__prxhdr) \
((u8 *)(__prxhdr) + C2H_RX_CMD_HDR_LEN)
#define GET_C2H_CMD_FEEDBACK_ELEMENT_ID(__pcmdfbhdr) \
LE_BITS_TO_4BYTE((__pcmdfbhdr), 0, 8)
#define GET_C2H_CMD_FEEDBACK_CCX_LEN(__pcmdfbhdr) \
LE_BITS_TO_4BYTE((__pcmdfbhdr), 8, 8)
#define GET_C2H_CMD_FEEDBACK_CCX_CMD_CNT(__pcmdfbhdr) \
LE_BITS_TO_4BYTE((__pcmdfbhdr), 16, 16)
#define GET_C2H_CMD_FEEDBACK_CCX_MAC_ID(__pcmdfbhdr) \
LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 0, 5)
#define GET_C2H_CMD_FEEDBACK_CCX_VALID(__pcmdfbhdr) \
LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 7, 1)
#define GET_C2H_CMD_FEEDBACK_CCX_RETRY_CNT(__pcmdfbhdr) \
LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 8, 5)
#define GET_C2H_CMD_FEEDBACK_CCX_TOK(__pcmdfbhdr) \
LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 15, 1)
#define GET_C2H_CMD_FEEDBACK_CCX_QSEL(__pcmdfbhdr) \
LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 16, 4)
#define GET_C2H_CMD_FEEDBACK_CCX_SEQ(__pcmdfbhdr) \
LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 20, 12)
#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)
#define CHIP_BONDING_92C_1T2R 0x1
#define CHIP_8723 BIT(0)
#define NORMAL_CHIP BIT(3)
#define RF_TYPE_1T1R (~(BIT(4)|BIT(5)|BIT(6)))
#define RF_TYPE_1T2R BIT(4)
#define RF_TYPE_2T2R BIT(5)
#define CHIP_VENDOR_UMC BIT(7)
#define B_CUT_VERSION BIT(12)
#define C_CUT_VERSION BIT(13)
#define D_CUT_VERSION ((BIT(12)|BIT(13)))
#define E_CUT_VERSION BIT(14)
#define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28))
/* MASK */
#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2))
#define CHIP_TYPE_MASK BIT(3)
#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6))
#define MANUFACTUER_MASK BIT(7)
#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8))
#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12))
#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2))
#define CHIP_TYPE_MASK BIT(3)
#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6))
#define MANUFACTUER_MASK BIT(7)
#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8))
#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12))
/* Get element */
#define GET_CVID_IC_TYPE(version) ((version) & IC_TYPE_MASK)
#define GET_CVID_CHIP_TYPE(version) ((version) & CHIP_TYPE_MASK)
#define GET_CVID_RF_TYPE(version) ((version) & RF_TYPE_MASK)
#define GET_CVID_MANUFACTUER(version) ((version) & MANUFACTUER_MASK)
#define GET_CVID_ROM_VERSION(version) ((version) & ROM_VERSION_MASK)
#define GET_CVID_CUT_VERSION(version) ((version) & CUT_VERSION_MASK)
#define IS_81XXC(version) ((GET_CVID_IC_TYPE(version) == 0) ?\
true : false)
#define IS_8723_SERIES(version) \
((GET_CVID_IC_TYPE(version) == CHIP_8723) ? true : false)
#define IS_CHIP_VENDOR_UMC(version) \
((GET_CVID_MANUFACTUER(version)) ? true : false)
#define IS_VENDOR_UMC_A_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? \
((GET_CVID_CUT_VERSION(version)) ? false : true) : false)
#define IS_VENDOR_8723_A_CUT(version) ((IS_8723_SERIES(version)) ? \
((GET_CVID_CUT_VERSION(version)) ? false : true) : false)
#define IS_81xxC_VENDOR_UMC_B_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) \
? ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? \
true : false) : false)
#define IS_81XXC(version) ((GET_CVID_IC_TYPE(version) == 0) ?\
true : false)
#define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723) ? \
true : false)
#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version)) ? false : true)
#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)\
? true : false)
#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)\
? true : false)
#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version)) ? \
true : false)
#define IS_VENDOR_UMC_A_CUT(version) ((IS_CHIP_VENDOR_UMC(version))\
? ((GET_CVID_CUT_VERSION(version)) ? \
false : true) : false)
#define IS_VENDOR_8723_A_CUT(version) ((IS_8723_SERIES(version))\
? ((GET_CVID_CUT_VERSION(version)) ? \
false : true) : false)
#define IS_VENDOR_8723A_B_CUT(version) ((IS_8723_SERIES(version))\
? ((GET_CVID_CUT_VERSION(version) == \
B_CUT_VERSION) ? true : false) : false)
#define IS_81xxC_VENDOR_UMC_B_CUT(version) ((IS_CHIP_VENDOR_UMC(version))\
? ((GET_CVID_CUT_VERSION(version) == \
B_CUT_VERSION) ? true : false) : false)
enum rf_optype {
RF_OP_BY_SW_3WIRE = 0,
......@@ -93,7 +179,7 @@ enum power_save_mode {
POWER_SAVE_MODE_SAVE,
};
enum power_polocy_config {
enum power_policy_config {
POWERCFG_MAX_POWER_SAVINGS,
POWERCFG_GLOBAL_POWER_SAVINGS,
POWERCFG_LOCAL_POWER_SAVINGS,
......@@ -143,6 +229,41 @@ enum rtl_desc_qsel {
QSLT_CMD = 0x13,
};
enum rtl_desc8723e_rate {
DESC92C_RATE1M = 0x00,
DESC92C_RATE2M = 0x01,
DESC92C_RATE5_5M = 0x02,
DESC92C_RATE11M = 0x03,
DESC92C_RATE6M = 0x04,
DESC92C_RATE9M = 0x05,
DESC92C_RATE12M = 0x06,
DESC92C_RATE18M = 0x07,
DESC92C_RATE24M = 0x08,
DESC92C_RATE36M = 0x09,
DESC92C_RATE48M = 0x0a,
DESC92C_RATE54M = 0x0b,
DESC92C_RATEMCS0 = 0x0c,
DESC92C_RATEMCS1 = 0x0d,
DESC92C_RATEMCS2 = 0x0e,
DESC92C_RATEMCS3 = 0x0f,
DESC92C_RATEMCS4 = 0x10,
DESC92C_RATEMCS5 = 0x11,
DESC92C_RATEMCS6 = 0x12,
DESC92C_RATEMCS7 = 0x13,
DESC92C_RATEMCS8 = 0x14,
DESC92C_RATEMCS9 = 0x15,
DESC92C_RATEMCS10 = 0x16,
DESC92C_RATEMCS11 = 0x17,
DESC92C_RATEMCS12 = 0x18,
DESC92C_RATEMCS13 = 0x19,
DESC92C_RATEMCS14 = 0x1a,
DESC92C_RATEMCS15 = 0x1b,
DESC92C_RATEMCS15_SG = 0x1c,
DESC92C_RATEMCS32 = 0x20,
};
struct phy_sts_cck_8723e_t {
u8 adc_pwdb_X[4];
u8 sq_rpt;
......
This diff is collapsed.
......@@ -25,17 +25,23 @@
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
****************************************************************************
*/
*****************************************************************************/
#ifndef __RTL8723E_DM_H__
#define __RTL8723E_DM_H__
#define HAL_DM_DIG_DISABLE BIT(0)
#define HAL_DM_HIPWR_DISABLE BIT(1)
#define OFDM_TABLE_LENGTH 37
#define CCK_TABLE_LENGTH 33
#define OFDM_TABLE_SIZE 37
#define CCK_TABLE_SIZE 33
#define BW_AUTO_SWITCH_HIGH_LOW 25
#define BW_AUTO_SWITCH_LOW_HIGH 30
#define DM_DIG_THRESH_HIGH 40
#define DM_DIG_THRESH_LOW 35
......@@ -63,12 +69,18 @@
#define DM_RATR_STA_MIDDLE 2
#define DM_RATR_STA_LOW 3
#define CTS2SELF_THVAL 30
#define REGC38_TH 20
#define WAIOTTHVAL 25
#define TXHIGHPWRLEVEL_NORMAL 0
#define TXHIGHPWRLEVEL_LEVEL1 1
#define TXHIGHPWRLEVEL_LEVEL2 2
#define TXHIGHPWRLEVEL_BT1 3
#define TXHIGHPWRLEVEL_BT2 4
#define DM_TYPE_BYFW 0
#define DM_TYPE_BYDRIVER 1
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
......@@ -82,6 +94,7 @@ struct swat_t {
long trying_threshold;
u8 cur_antenna;
u8 pre_antenna;
};
enum tag_dynamic_init_gain_operation_type_definition {
......@@ -98,7 +111,7 @@ enum tag_dynamic_init_gain_operation_type_definition {
enum tag_cck_packet_detection_threshold_type_definition {
CCK_PD_STAGE_LowRssi = 0,
CCK_PD_STAGE_HighRssi = 1,
CCK_FA_STAGE_Low = 2,
CCK_FA_STAGE_LOW = 2,
CCK_FA_STAGE_High = 3,
CCK_PD_STAGE_MAX = 4,
};
......@@ -138,17 +151,24 @@ enum dm_dig_connect_e {
DIG_CONNECT_MAX
};
#define BT_RSSI_STATE_NORMAL_POWER BIT_OFFSET_LEN_MASK_32(0, 1)
#define BT_RSSI_STATE_AMDPU_OFF BIT_OFFSET_LEN_MASK_32(1, 1)
#define BT_RSSI_STATE_SPECIAL_LOW BIT_OFFSET_LEN_MASK_32(2, 1)
#define BT_RSSI_STATE_BG_EDCA_LOW BIT_OFFSET_LEN_MASK_32(3, 1)
#define BT_RSSI_STATE_TXPOWER_LOW BIT_OFFSET_LEN_MASK_32(4, 1)
#define GET_UNDECORATED_AVERAGE_RSSI(_priv) \
((((struct rtl_priv *)(_priv))->mac80211.opmode == \
NL80211_IFTYPE_ADHOC) ? \
(((struct rtl_priv *)(_priv))->dm.entry_min_undec_sm_pwdb) \
: (((struct rtl_priv *)(_priv))->dm.undec_sm_pwdb))
void rtl8723ae_dm_init(struct ieee80211_hw *hw);
void rtl8723ae_dm_watchdog(struct ieee80211_hw *hw);
void rtl8723ae_dm_write_dig(struct ieee80211_hw *hw);
void rtl8723ae_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
void rtl8723ae_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
void rtl8723ae_dm_bt_coexist(struct ieee80211_hw *hw);
( \
(((struct rtl_priv *)(_priv))->mac80211.opmode == \
NL80211_IFTYPE_ADHOC) ? \
(((struct rtl_priv *)(_priv))->dm.entry_min_undec_sm_pwdb) : \
(((struct rtl_priv *)(_priv))->dm.undec_sm_pwdb) \
)
void rtl8723e_dm_init(struct ieee80211_hw *hw);
void rtl8723e_dm_watchdog(struct ieee80211_hw *hw);
void rtl8723e_dm_write_dig(struct ieee80211_hw *hw);
void rtl8723e_dm_check_txpower_tracking(struct ieee80211_hw *hw);
void rtl8723e_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
void rtl8723e_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
void rtl8723e_dm_bt_coexist(struct ieee80211_hw *hw);
#endif
This diff is collapsed.
......@@ -24,50 +24,28 @@
* Hsinchu 300, Taiwan.
* Larry Finger <Larry.Finger@lwfinger.net>
*
****************************************************************************
*/
*****************************************************************************/
#ifndef __RTL92C__FW__H__
#define __RTL92C__FW__H__
#define FW_8192C_SIZE 0x3000
#define FW_8192C_START_ADDRESS 0x1000
#define FW_8192C_END_ADDRESS 0x3FFF
#define FW_8192C_PAGE_SIZE 4096
#define FW_8192C_PAGE_SIZE 4096
#define FW_8192C_POLLING_DELAY 5
#define FW_8192C_POLLING_TIMEOUT_COUNT 6000
#define FW_8192C_POLLING_TIMEOUT_COUNT 1000
#define BEACON_PG 0
#define PSPOLL_PG 2
#define NULL_PG 3
#define PROBERSP_PG 4 /* ->5 */
#define IS_FW_HEADER_EXIST(_pfwhdr) \
((_pfwhdr->signature&0xFFFF) == 0x2300 ||\
(_pfwhdr->signature&0xFFFF) == 0x2301 ||\
(_pfwhdr->signature&0xFFFF) == 0x2302)
#define TOTAL_RESERVED_PKT_LEN 768
#define IS_FW_HEADER_EXIST(_pfwhdr) \
((_pfwhdr->signature&0xFF00) == 0x2300)
struct rtl8723ae_firmware_header {
u16 signature;
u8 category;
u8 function;
u16 version;
u8 subversion;
u8 rsvd1;
u8 month;
u8 date;
u8 hour;
u8 minute;
u16 ramcodeSize;
u16 rsvd2;
u32 svnindex;
u32 rsvd3;
u32 rsvd4;
u32 rsvd5;
};
#define pagenum_128(_len) (u32)(((_len)>>7) + ((_len)&0x7F ? 1 : 0))
#define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val) \
SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
#define SET_H2CCMD_PWRMODE_PARM_SMART_PS_23A(__ph2ccmd, __val) \
#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__ph2ccmd, __val) \
SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__ph2ccmd, __val) \
SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
......@@ -80,11 +58,10 @@ struct rtl8723ae_firmware_header {
#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val) \
SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
void rtl8723ae_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
u32 cmd_len, u8 *p_cmdbuffer);
void rtl8723ae_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
void rtl8723ae_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
void rtl8723ae_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus);
void rtl8723ae_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state);
void rtl8723e_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
u32 cmd_len, u8 *p_cmdbuffer);
void rtl8723e_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
void rtl8723e_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
void rtl8723e_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus);
void rtl8723e_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state);
#endif
......@@ -53,8 +53,8 @@
#define BT_COEX_STATE_WIFI_LEGACY BIT(3)
#define BT_COEX_STATE_WIFI_RSSI_LOW BIT(4)
#define BT_COEX_STATE_WIFI_RSSI_MEDIUM BIT(5)
#define BT_COEX_STATE_WIFI_RSSI_HIGH BIT(6)
#define BT_COEX_STATE_WIFI_RSSI_MEDIUM BIT(5)
#define BT_COEX_STATE_WIFI_RSSI_HIGH BIT(6)
#define BT_COEX_STATE_DEC_BT_POWER BIT(7)
#define BT_COEX_STATE_WIFI_IDLE BIT(8)
......@@ -78,7 +78,7 @@
#define BT_COEX_STATE_WIFI_RSSI_1_MEDIUM BIT(25)
#define BT_COEX_STATE_WIFI_RSSI_1_HIGH BIT(26)
#define BT_COEX_STATE_BTINFO_COMMON BIT(30)
#define BT_COEX_STATE_BTINFO_COMMON BIT(30)
#define BT_COEX_STATE_BTINFO_B_HID_SCOESCO BIT(31)
#define BT_COEX_STATE_BTINFO_B_FTP_A2DP BIT(29)
......@@ -133,28 +133,26 @@
#define BTINFO_B_SCO_ESCO BIT(1)
#define BTINFO_B_CONNECTION BIT(0)
void rtl8723e_btdm_coex_all_off(struct ieee80211_hw *hw);
void rtl8723e_dm_bt_fw_coex_all_off(struct ieee80211_hw *hw);
void rtl8723ae_btdm_coex_all_off(struct ieee80211_hw *hw);
void rtl8723ae_dm_bt_fw_coex_all_off(struct ieee80211_hw *hw);
void rtl8723ae_dm_bt_sw_coex_all_off(struct ieee80211_hw *hw);
void rtl8723ae_dm_bt_hw_coex_all_off(struct ieee80211_hw *hw);
long rtl8723ae_dm_bt_get_rx_ss(struct ieee80211_hw *hw);
void rtl8723ae_dm_bt_balance(struct ieee80211_hw *hw,
void rtl8723e_dm_bt_sw_coex_all_off(struct ieee80211_hw *hw);
void rtl8723e_dm_bt_hw_coex_all_off(struct ieee80211_hw *hw);
long rtl8723e_dm_bt_get_rx_ss(struct ieee80211_hw *hw);
void rtl8723e_dm_bt_balance(struct ieee80211_hw *hw,
bool balance_on, u8 ms0, u8 ms1);
void rtl8723ae_dm_bt_agc_table(struct ieee80211_hw *hw, u8 type);
void rtl8723ae_dm_bt_bback_off_level(struct ieee80211_hw *hw, u8 type);
u8 rtl8723ae_dm_bt_check_coex_rssi_state(struct ieee80211_hw *hw,
void rtl8723e_dm_bt_agc_table(struct ieee80211_hw *hw, u8 tyep);
void rtl8723e_dm_bt_bb_back_off_level(struct ieee80211_hw *hw, u8 type);
u8 rtl8723e_dm_bt_check_coex_rssi_state(struct ieee80211_hw *hw,
u8 level_num, u8 rssi_thresh,
u8 rssi_thresh1);
u8 rtl8723ae_dm_bt_check_coex_rssi_state1(struct ieee80211_hw *hw,
u8 level_num, u8 rssi_thresh,
u8 rtl8723e_dm_bt_check_coex_rssi_state1(struct ieee80211_hw *hw,
u8 level_num, u8 rssi_thresh,
u8 rssi_thresh1);
void _rtl8723_dm_bt_check_wifi_state(struct ieee80211_hw *hw);
void rtl8723ae_dm_bt_reject_ap_aggregated_packet(struct ieee80211_hw *hw,
bool reject);
bool rtl8723ae_dm_bt_is_coexist_state_changed(struct ieee80211_hw *hw);
bool rtl8723ae_dm_bt_is_wifi_up_link(struct ieee80211_hw *hw);
void rtl8723e_dm_bt_reject_ap_aggregated_packet(struct ieee80211_hw *hw,
bool b_reject);
bool rtl8723e_dm_bt_is_coexist_state_changed(struct ieee80211_hw *hw);
bool rtl8723e_dm_bt_is_wifi_up_link(struct ieee80211_hw *hw);
#endif
......@@ -11,10 +11,6 @@
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
......@@ -24,8 +20,7 @@
* Hsinchu 300, Taiwan.
* Larry Finger <Larry.Finger@lwfinger.net>
*
****************************************************************************
*/
*****************************************************************************/
#ifndef __RTL8723E_HAL_BTC_H__
#define __RTL8723E_HAL_BTC_H__
......@@ -34,21 +29,31 @@
#include "btc.h"
#include "hal_bt_coexist.h"
#define BT_TXRX_CNT_THRES_1 1200
#define BT_TXRX_CNT_THRES_2 1400
#define BT_TXRX_CNT_THRES_3 3000
#define BT_TXRX_CNT_LEVEL_0 0 /* < 1200 */
#define BT_TXRX_CNT_LEVEL_1 1 /* >= 1200 && < 1400 */
#define BT_TXRX_CNT_LEVEL_2 2 /* >= 1400 */
#define BT_TXRX_CNT_LEVEL_3 3
#define BT_TXRX_CNT_THRES_1 1200
#define BT_TXRX_CNT_THRES_2 1400
#define BT_TXRX_CNT_THRES_3 3000
/* < 1200 */
#define BT_TXRX_CNT_LEVEL_0 0
/* >= 1200 && < 1400 */
#define BT_TXRX_CNT_LEVEL_1 1
/* >= 1400 */
#define BT_TXRX_CNT_LEVEL_2 2
#define BT_TXRX_CNT_LEVEL_3 3
#define BT_COEX_DISABLE 0
#define BT_Q_PKT_OFF 0
#define BT_Q_PKT_ON 1
#define BT_TX_PWR_OFF 0
#define BT_TX_PWR_ON 1
/* TDMA mode definition */
#define TDMA_2ANT 0
#define TDMA_1ANT 1
#define TDMA_NAV_OFF 0
#define TDMA_NAV_ON 1
#define TDMA_DAC_SWING_OFF 0
#define TDMA_DAC_SWING_ON 1
#define TDMA_2ANT 0
#define TDMA_1ANT 1
#define TDMA_NAV_OFF 0
#define TDMA_NAV_ON 1
#define TDMA_DAC_SWING_OFF 0
#define TDMA_DAC_SWING_ON 1
/* PTA mode related definition */
#define BT_PTA_MODE_OFF 0
......@@ -80,6 +85,7 @@ enum bt_traffic_mode_profile {
BT_PROFILE_SCO
};
/*
enum hci_ext_bt_operation {
HCI_BT_OP_NONE = 0x0,
HCI_BT_OP_INQUIRE_START = 0x1,
......@@ -93,6 +99,7 @@ enum hci_ext_bt_operation {
HCI_BT_OP_BT_DEV_DISABLE = 0x9,
HCI_BT_OP_MAX,
};
*/
enum bt_spec {
BT_SPEC_1_0_b = 0x00,
......@@ -123,12 +130,12 @@ enum bt_state {
BT_INFO_STATE_MAX = 7
};
enum rtl8723ae_c2h_evt {
enum rtl8723e_c2h_evt {
C2H_DBG = 0,
C2H_TSF = 1,
C2H_AP_RPT_RSP = 2,
C2H_CCX_TX_RPT = 3, /* The FW notify the report of the specific */
/* tx packet. */
/* The FW notify the report of the specific tx packet. */
C2H_CCX_TX_RPT = 3,
C2H_BT_RSSI = 4,
C2H_BT_OP_MODE = 5,
C2H_HW_INFO_EXCH = 10,
......@@ -137,15 +144,16 @@ enum rtl8723ae_c2h_evt {
MAX_C2HEVENT
};
void rtl8723ae_dm_bt_fw_coex_all_off_8723a(struct ieee80211_hw *hw);
void rtl8723ae_dm_bt_sw_coex_all_off_8723a(struct ieee80211_hw *hw);
void rtl8723ae_dm_bt_hw_coex_all_off_8723a(struct ieee80211_hw *hw);
void rtl8723ae_dm_bt_coexist_8723(struct ieee80211_hw *hw);
void rtl8723ae_dm_bt_set_bt_dm(struct ieee80211_hw *hw,
void rtl8723e_dm_bt_fw_coex_all_off_8723a(struct ieee80211_hw *hw);
void rtl8723e_dm_bt_sw_coex_all_off_8723a(struct ieee80211_hw *hw);
void rtl8723e_dm_bt_hw_coex_all_off_8723a(struct ieee80211_hw *hw);
void rtl8723e_dm_bt_coexist_8723(struct ieee80211_hw *hw);
void rtl8723e_dm_bt_set_bt_dm(struct ieee80211_hw *hw,
struct btdm_8723 *p_btdm);
void rtl_8723e_c2h_command_handle(struct ieee80211_hw *hw);
void rtl_8723e_bt_wifi_media_status_notify(struct ieee80211_hw *hw,
bool mstatus);
void rtl8723ae_bt_coex_off_before_lps(struct ieee80211_hw *hw);
bool mstatus);
void rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps(
struct ieee80211_hw *hw);
#endif
This diff is collapsed.
......@@ -11,10 +11,6 @@
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
......@@ -34,38 +30,38 @@
((rtlefuse->eeprom_svid == (_val1)) && \
(rtlefuse->eeprom_smid == (_val2)))
void rtl8723ae_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
void rtl8723ae_read_eeprom_info(struct ieee80211_hw *hw);
void rtl8723e_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
void rtl8723e_read_eeprom_info(struct ieee80211_hw *hw);
void rtl8723ae_interrupt_recognized(struct ieee80211_hw *hw,
u32 *p_inta, u32 *p_intb);
int rtl8723ae_hw_init(struct ieee80211_hw *hw);
void rtl8723ae_card_disable(struct ieee80211_hw *hw);
void rtl8723ae_enable_interrupt(struct ieee80211_hw *hw);
void rtl8723ae_disable_interrupt(struct ieee80211_hw *hw);
int rtl8723ae_set_network_type(struct ieee80211_hw *hw,
enum nl80211_iftype type);
void rtl8723ae_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid);
void rtl8723ae_set_qos(struct ieee80211_hw *hw, int aci);
void rtl8723ae_set_beacon_related_registers(struct ieee80211_hw *hw);
void rtl8723ae_set_beacon_interval(struct ieee80211_hw *hw);
void rtl8723ae_update_interrupt_mask(struct ieee80211_hw *hw,
u32 add_msr, u32 rm_msr);
void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
void rtl8723ae_update_hal_rate_tbl(struct ieee80211_hw *hw,
struct ieee80211_sta *sta, u8 rssi_level);
void rtl8723ae_update_channel_access_setting(struct ieee80211_hw *hw);
bool rtl8723ae_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid);
void rtl8723ae_enable_hw_security_config(struct ieee80211_hw *hw);
void rtl8723ae_set_key(struct ieee80211_hw *hw, u32 key_index,
u8 *p_macaddr, bool is_group, u8 enc_algo,
bool is_wepkey, bool clear_all);
void rtl8723e_interrupt_recognized(struct ieee80211_hw *hw,
u32 *p_inta, u32 *p_intb);
int rtl8723e_hw_init(struct ieee80211_hw *hw);
void rtl8723e_card_disable(struct ieee80211_hw *hw);
void rtl8723e_enable_interrupt(struct ieee80211_hw *hw);
void rtl8723e_disable_interrupt(struct ieee80211_hw *hw);
int rtl8723e_set_network_type(struct ieee80211_hw *hw,
enum nl80211_iftype type);
void rtl8723e_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid);
void rtl8723e_set_qos(struct ieee80211_hw *hw, int aci);
void rtl8723e_set_beacon_related_registers(struct ieee80211_hw *hw);
void rtl8723e_set_beacon_interval(struct ieee80211_hw *hw);
void rtl8723e_update_interrupt_mask(struct ieee80211_hw *hw,
u32 add_msr, u32 rm_msr);
void rtl8723e_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val);
void rtl8723e_update_hal_rate_tbl(struct ieee80211_hw *hw,
struct ieee80211_sta *sta, u8 rssi_level);
void rtl8723e_update_channel_access_setting(struct ieee80211_hw *hw);
bool rtl8723e_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid);
void rtl8723e_enable_hw_security_config(struct ieee80211_hw *hw);
void rtl8723e_set_key(struct ieee80211_hw *hw, u32 key_index,
u8 *p_macaddr, bool is_group, u8 enc_algo,
bool is_wepkey, bool clear_all);
void rtl8723ae_read_bt_coexist_info_from_hwpg(struct ieee80211_hw *hw,
bool autoload_fail, u8 *hwinfo);
void rtl8723ae_bt_reg_init(struct ieee80211_hw *hw);
void rtl8723ae_bt_hw_init(struct ieee80211_hw *hw);
void rtl8723ae_suspend(struct ieee80211_hw *hw);
void rtl8723ae_resume(struct ieee80211_hw *hw);
void rtl8723e_read_bt_coexist_info_from_hwpg(struct ieee80211_hw *hw,
bool autoload_fail, u8 *hwinfo);
void rtl8723e_bt_reg_init(struct ieee80211_hw *hw);
void rtl8723e_bt_hw_init(struct ieee80211_hw *hw);
void rtl8723e_suspend(struct ieee80211_hw *hw);
void rtl8723e_resume(struct ieee80211_hw *hw);
#endif
......@@ -32,44 +32,44 @@
#include "reg.h"
#include "led.h"
static void _rtl8723ae_init_led(struct ieee80211_hw *hw,
struct rtl_led *pled, enum rtl_led_pin ledpin)
static void _rtl8723e_init_led(struct ieee80211_hw *hw,
struct rtl_led *pled, enum rtl_led_pin ledpin)
{
pled->hw = hw;
pled->ledpin = ledpin;
pled->ledon = false;
}
void rtl8723ae_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled)
void rtl8723e_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
u8 ledcfg;
struct rtl_priv *rtlpriv = rtl_priv(hw);
RT_TRACE(rtlpriv, COMP_LED, DBG_LOUD,
"LedAddr:%X ledpin=%d\n", REG_LEDCFG2, pled->ledpin);
ledcfg = rtl_read_byte(rtlpriv, REG_LEDCFG2);
switch (pled->ledpin) {
case LED_PIN_GPIO0:
break;
case LED_PIN_LED0:
ledcfg = rtl_read_byte(rtlpriv, REG_LEDCFG2);
ledcfg &= ~BIT(6);
rtl_write_byte(rtlpriv,
REG_LEDCFG2, (ledcfg & 0xf0) | BIT(5));
break;
case LED_PIN_LED1:
rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg & 0x0f) | BIT(5));
ledcfg = rtl_read_byte(rtlpriv, REG_LEDCFG1);
rtl_write_byte(rtlpriv, REG_LEDCFG1, ledcfg & 0x10);
break;
default:
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
"switch case not processed\n");
"switch case not process\n");
break;
}
pled->ledon = true;
}
void rtl8723ae_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
void rtl8723e_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
......@@ -86,7 +86,7 @@ void rtl8723ae_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
case LED_PIN_LED0:
ledcfg &= 0xf0;
if (pcipriv->ledctl.led_opendrain) {
ledcfg &= 0x90;
ledcfg &= 0x90; /* Set to software control. */
rtl_write_byte(rtlpriv, REG_LEDCFG2, (ledcfg|BIT(3)));
ledcfg = rtl_read_byte(rtlpriv, REG_MAC_PINMUX_CFG);
ledcfg &= 0xFE;
......@@ -94,50 +94,51 @@ void rtl8723ae_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
} else {
ledcfg &= ~BIT(6);
rtl_write_byte(rtlpriv, REG_LEDCFG2,
(ledcfg | BIT(3) | BIT(5)));
(ledcfg | BIT(3) | BIT(5)));
}
break;
case LED_PIN_LED1:
ledcfg = rtl_read_byte(rtlpriv, REG_LEDCFG1) & 0x10;
rtl_write_byte(rtlpriv, REG_LEDCFG1, (ledcfg | BIT(3)));
ledcfg = rtl_read_byte(rtlpriv, REG_LEDCFG1);
ledcfg &= 0x10; /* Set to software control. */
rtl_write_byte(rtlpriv, REG_LEDCFG1, ledcfg|BIT(3));
break;
default:
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
"switch case not processed\n");
"switch case not process\n");
break;
}
pled->ledon = false;
}
void rtl8723ae_init_sw_leds(struct ieee80211_hw *hw)
void rtl8723e_init_sw_leds(struct ieee80211_hw *hw)
{
struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
_rtl8723ae_init_led(hw, &(pcipriv->ledctl.sw_led0), LED_PIN_LED0);
_rtl8723ae_init_led(hw, &(pcipriv->ledctl.sw_led1), LED_PIN_LED1);
_rtl8723e_init_led(hw, &pcipriv->ledctl.sw_led0, LED_PIN_LED0);
_rtl8723e_init_led(hw, &pcipriv->ledctl.sw_led1, LED_PIN_LED1);
}
static void _rtl8723ae_sw_led_control(struct ieee80211_hw *hw,
enum led_ctl_mode ledaction)
static void _rtl8723e_sw_led_control(struct ieee80211_hw *hw,
enum led_ctl_mode ledaction)
{
struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
struct rtl_led *pLed0 = &(pcipriv->ledctl.sw_led0);
switch (ledaction) {
case LED_CTL_POWER_ON:
case LED_CTL_LINK:
case LED_CTL_NO_LINK:
rtl8723ae_sw_led_on(hw, pLed0);
rtl8723e_sw_led_on(hw, pLed0);
break;
case LED_CTL_POWER_OFF:
rtl8723ae_sw_led_off(hw, pLed0);
rtl8723e_sw_led_off(hw, pLed0);
break;
default:
break;
}
}
void rtl8723ae_led_control(struct ieee80211_hw *hw, enum led_ctl_mode ledaction)
void rtl8723e_led_control(struct ieee80211_hw *hw,
enum led_ctl_mode ledaction)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
......@@ -152,6 +153,7 @@ void rtl8723ae_led_control(struct ieee80211_hw *hw, enum led_ctl_mode ledaction)
ledaction == LED_CTL_POWER_ON)) {
return;
}
RT_TRACE(rtlpriv, COMP_LED, DBG_LOUD, "ledaction %d,\n", ledaction);
_rtl8723ae_sw_led_control(hw, ledaction);
RT_TRACE(rtlpriv, COMP_LED, DBG_LOUD, "ledaction %d,\n",
ledaction);
_rtl8723e_sw_led_control(hw, ledaction);
}
......@@ -11,10 +11,6 @@
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
......@@ -30,10 +26,9 @@
#ifndef __RTL92CE_LED_H__
#define __RTL92CE_LED_H__
void rtl8723ae_init_sw_leds(struct ieee80211_hw *hw);
void rtl8723ae_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled);
void rtl8723ae_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled);
void rtl8723ae_led_control(struct ieee80211_hw *hw,
enum led_ctl_mode ledaction);
void rtl8723e_init_sw_leds(struct ieee80211_hw *hw);
void rtl8723e_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled);
void rtl8723e_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled);
void rtl8723e_led_control(struct ieee80211_hw *hw, enum led_ctl_mode ledaction);
#endif
This diff is collapsed.
......@@ -11,10 +11,6 @@
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
......@@ -31,12 +27,14 @@
#define __RTL8723E_RF_H__
#define RF6052_MAX_TX_PWR 0x3F
#define RF6052_MAX_REG 0x3F
void rtl8723ae_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth);
void rtl8723ae_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw,
u8 *ppowerlevel);
void rtl8723ae_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw,
u8 *ppowerlevel, u8 channel);
bool rtl8723ae_phy_rf6052_config(struct ieee80211_hw *hw);
void rtl8723e_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw,
u8 bandwidth);
void rtl8723e_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw,
u8 *ppowerlevel);
void rtl8723e_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw,
u8 *ppowerlevel, u8 channel);
bool rtl8723e_phy_rf6052_config(struct ieee80211_hw *hw);
#endif
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