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Commit 07104839 authored by Linus Torvalds's avatar Linus Torvalds
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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next-2.6 

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next-2.6: (180 commits)
  leo: disable cursor when leaving graphics mode
  cg6: disable cursor when leaving graphics mode
  sparc32: sun4m interrupt mask cleanup
  drivers/rtc/Kconfig: don't build rtc-cmos.o on sparc32
  sparc: arch/sparc/kernel/pmc.c -- extra #include?
  sparc32: Add more extensive documentation of sun4m interrupts.
  sparc32: Kill irq_rcvreg from sun4m_irq.c
  sparc32: Delete master_l10_limit.
  sparc32: Use PROM device probing for sun4c timers.
  sparc32: Use PROM device probing for sun4c interrupt register.
  sparc32: Delete claim_ticker14().
  sparc32: Stop calling claim_ticker14() from sun4c_irq.c
  sparc32: Kill clear_profile_irq btfixup entry.
  sparc32: Call sun4m_clear_profile_irq() directly from sun4m_smp.c
  sparc32: Remove #if 0'd code from sun4c_irq.c
  sparc32: Remove some SMP ifdefs in sun4d_irq.c
  sparc32: Use PROM infrastructure for probing and mapping sun4d timers.
  sparc32: Use PROM device probing for sun4m irq registers.
  sparc32: Use PROM device probing for sun4m timer registers.
  sparc: Fix user_regset 'n' field values.
  ...
parents 589acce5 56c5d900
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Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl
View file @ 07104839
......@@ -5073,8 +5073,7 @@ struct _snd_pcm_runtime {
with <constant>SNDRV_DMA_TYPE_CONTINUOUS</constant> type and the
<function>snd_dma_continuous_data(GFP_KERNEL)</function> device pointer,
where <constant>GFP_KERNEL</constant> is the kernel allocation flag to
use. For the SBUS, <constant>SNDRV_DMA_TYPE_SBUS</constant> and
<function>snd_dma_sbus_data(sbus_dev)</function> are used instead.
use.
For the PCI scatter-gather buffers, use
<constant>SNDRV_DMA_TYPE_DEV_SG</constant> with
<function>snd_dma_pci_data(pci)</function>
......
Documentation/sparc/sbus_drivers.txt deleted 100644 → 0
View file @ 589acce5
This diff is collapsed.
arch/sparc/Kconfig
View file @ 07104839
......@@ -20,6 +20,11 @@ config GENERIC_ISA_DMA
bool
default y
config GENERIC_GPIO
bool
help
Generic GPIO API support
config ARCH_NO_VIRT_TO_BUS
def_bool y
......@@ -69,6 +74,9 @@ config SPARC
select HAVE_OPROFILE
select HAVE_ARCH_KGDB if !SMP
select HAVE_ARCH_TRACEHOOK
select ARCH_WANT_OPTIONAL_GPIOLIB
select RTC_CLASS
select RTC_DRV_M48T59
# Identify this as a Sparc32 build
config SPARC32
......@@ -204,17 +212,6 @@ config SUN_PM
Enable power management and CPU standby features on supported
SPARC platforms.
config SUN4
bool "Support for SUN4 machines (disables SUN4[CDM] support)"
depends on !SMP
default n
help
Say Y here if, and only if, your machine is a sun4. Note that
a kernel compiled with this option will run only on sun4.
(And the current version will probably work only on sun4/330.)
if !SUN4
config PCI
bool "Support for PCI and PS/2 keyboard/mouse"
help
......@@ -227,11 +224,6 @@ config PCI_SYSCALL
source "drivers/pci/Kconfig"
endif
config NO_DMA
def_bool !PCI
config SUN_OPENPROMFS
tristate "Openprom tree appears in /proc/openprom"
help
......@@ -263,9 +255,7 @@ source "net/Kconfig"
source "drivers/Kconfig"
if !SUN4
source "drivers/sbus/char/Kconfig"
endif
# This one must be before the filesystem configs. -DaveM
......
arch/sparc/include/asm/Kbuild
View file @ 07104839
......@@ -22,7 +22,6 @@ header-y += unistd_64.h
header-y += apc.h
header-y += asi.h
header-y += bpp.h
header-y += display7seg.h
header-y += envctrl.h
header-y += fbio.h
......@@ -41,5 +40,4 @@ header-y += reg_64.h
header-y += traps.h
header-y += uctx.h
header-y += utrap.h
header-y += vfc_ioctls.h
header-y += watchdog.h
arch/sparc/include/asm/asmmacro.h
View file @ 07104839
......@@ -34,12 +34,7 @@
/* sun4 probably wants half word accesses to ASI_SEGMAP, while sun4c+
likes byte accesses. These are to avoid ifdef mania. */
#ifdef CONFIG_SUN4
#define lduXa lduha
#define stXa stha
#else
#define lduXa lduba
#define stXa stba
#endif
#endif /* !(_SPARC_ASMMACRO_H) */
arch/sparc/include/asm/bpp.h deleted 100644 → 0
View file @ 589acce5
#ifndef _SPARC_BPP_H
#define _SPARC_BPP_H
/*
* Copyright (c) 1995 Picture Elements
* Stephen Williams
* Gus Baldauf
*
* Linux/SPARC port by Peter Zaitcev.
* Integration into SPARC tree by Tom Dyas.
*/
#include <linux/ioctl.h>
/*
* This is a driver that supports IEEE Std 1284-1994 communications
* with compliant or compatible devices. It will use whatever features
* the device supports, prefering those that are typically faster.
*
* When the device is opened, it is left in COMPATIBILITY mode, and
* writes work like any printer device. The driver only attempt to
* negotiate 1284 modes when needed so that plugs can be pulled,
* switch boxes switched, etc., without disrupting things. It will
* also leave the device in compatibility mode when closed.
*/
/*
* This driver also supplies ioctls to manually manipulate the
* pins. This is great for testing devices, or writing code to deal
* with bizzarro-mode of the ACME Special TurboThingy Plus.
*
* NOTE: These ioctl currently do not interact well with
* read/write. Caveat emptor.
*
* PUT_PINS allows us to assign the sense of all the pins, including
* the data pins if being driven by the host. The GET_PINS returns the
* pins that the peripheral drives, including data if appropriate.
*/
# define BPP_PUT_PINS _IOW('B', 1, int)
# define BPP_GET_PINS _IOR('B', 2, char) /* that's bogus - should've been _IO */
# define BPP_PUT_DATA _IOW('B', 3, int)
# define BPP_GET_DATA _IOR('B', 4, char) /* ditto */
/*
* Set the data bus to input mode. Disengage the data bin driver and
* be prepared to read values from the peripheral. If the arg is 0,
* then revert the bus to output mode.
*/
# define BPP_SET_INPUT _IOW('B', 5, int)
/*
* These bits apply to the PUT operation...
*/
# define BPP_PP_nStrobe 0x0001
# define BPP_PP_nAutoFd 0x0002
# define BPP_PP_nInit 0x0004
# define BPP_PP_nSelectIn 0x0008
/*
* These apply to the GET operation, which also reads the current value
* of the previously put values. A bit mask of these will be returned
* as a bit mask in the return code of the ioctl().
*/
# define BPP_GP_nAck 0x0100
# define BPP_GP_Busy 0x0200
# define BPP_GP_PError 0x0400
# define BPP_GP_Select 0x0800
# define BPP_GP_nFault 0x1000
#endif
arch/sparc/include/asm/bugs.h
View file @ 07104839
......@@ -7,10 +7,6 @@
#include <asm/cpudata.h>
#endif
#ifdef CONFIG_SPARC64
#include <asm/sstate.h>
#endif
extern unsigned long loops_per_jiffy;
static void __init check_bugs(void)
......@@ -18,7 +14,4 @@ static void __init check_bugs(void)
#if defined(CONFIG_SPARC32) && !defined(CONFIG_SMP)
cpu_data(0).udelay_val = loops_per_jiffy;
#endif
#ifdef CONFIG_SPARC64
sstate_running();
#endif
}
arch/sparc/include/asm/cpudata_64.h
View file @ 07104839
......@@ -86,7 +86,6 @@ extern struct trap_per_cpu trap_block[NR_CPUS];
extern void init_cur_cpu_trap(struct thread_info *);
extern void setup_tba(void);
extern int ncpus_probed;
extern void __init cpu_probe(void);
extern const struct seq_operations cpuinfo_op;
extern unsigned long real_hard_smp_processor_id(void);
......
arch/sparc/include/asm/dma-mapping_32.h
View file @ 07104839
#ifndef _ASM_SPARC_DMA_MAPPING_H
#define _ASM_SPARC_DMA_MAPPING_H
#include <linux/types.h>
#ifdef CONFIG_PCI
#include <asm-generic/dma-mapping.h>
#else
#include <asm-generic/dma-mapping-broken.h>
#endif /* PCI */
struct device;
struct scatterlist;
struct page;
#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
extern int dma_supported(struct device *dev, u64 mask);
extern int dma_set_mask(struct device *dev, u64 dma_mask);
extern void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t flag);
extern void dma_free_coherent(struct device *dev, size_t size,
void *cpu_addr, dma_addr_t dma_handle);
extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
size_t size,
enum dma_data_direction direction);
extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
size_t size,
enum dma_data_direction direction);
extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size,
enum dma_data_direction direction);
extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
size_t size, enum dma_data_direction direction);
extern int dma_map_sg(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction direction);
extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction direction);
extern void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
size_t size,
enum dma_data_direction direction);
extern void dma_sync_single_for_device(struct device *dev,
dma_addr_t dma_handle,
size_t size,
enum dma_data_direction direction);
extern void dma_sync_single_range_for_cpu(struct device *dev,
dma_addr_t dma_handle,
unsigned long offset,
size_t size,
enum dma_data_direction direction);
extern void dma_sync_single_range_for_device(struct device *dev,
dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction);
extern void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
int nelems, enum dma_data_direction direction);
extern void dma_sync_sg_for_device(struct device *dev,
struct scatterlist *sg, int nelems,
enum dma_data_direction direction);
extern int dma_mapping_error(struct device *dev, dma_addr_t dma_addr);
extern int dma_get_cache_alignment(void);
#define dma_alloc_noncoherent dma_alloc_coherent
#define dma_free_noncoherent dma_free_coherent
#endif /* _ASM_SPARC_DMA_MAPPING_H */
arch/sparc/include/asm/dma.h
View file @ 07104839
#ifndef ___ASM_SPARC_DMA_H
#define ___ASM_SPARC_DMA_H
#if defined(__sparc__) && defined(__arch64__)
#include <asm/dma_64.h>
#ifndef _ASM_SPARC_DMA_H
#define _ASM_SPARC_DMA_H
/* These are irrelevant for Sparc DMA, but we leave it in so that
* things can compile.
*/
#define MAX_DMA_CHANNELS 8
#define DMA_MODE_READ 1
#define DMA_MODE_WRITE 2
#define MAX_DMA_ADDRESS (~0UL)
/* Useful constants */
#define SIZE_16MB (16*1024*1024)
#define SIZE_64K (64*1024)
/* SBUS DMA controller reg offsets */
#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */
#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */
#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */
#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */
/* Fields in the cond_reg register */
/* First, the version identification bits */
#define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */
#define DMA_VERS0 0x00000000 /* Sunray DMA version */
#define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */
#define DMA_VERS1 0x80000000 /* DMA rev 1 */
#define DMA_VERS2 0xa0000000 /* DMA rev 2 */
#define DMA_VERHME 0xb0000000 /* DMA hme gate array */
#define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */
#define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */
#define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */
#define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */
#define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */
#define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */
#define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */
#define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */
#define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */
#define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */
#define DMA_ST_WRITE 0x00000100 /* write from device to memory */
#define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */
#define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */
#define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */
#define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */
#define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */
#define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */
#define DMA_TERM_CNTR 0x00004000 /* Terminal counter */
#define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */
#define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */
#define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */
#define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */
#define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */
#define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */
#define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */
#define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */
#define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */
#define DMA_BRST64 0x000c0000 /* SCSI: 64byte bursts (HME on UltraSparc only) */
#define DMA_BRST32 0x00040000 /* SCSI: 32byte bursts */
#define DMA_BRST16 0x00000000 /* SCSI: 16byte bursts */
#define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */
#define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */
#define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */
#define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */
#define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */
#define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */
#define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */
#define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */
#define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */
#define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */
#define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */
#define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */
/* Values describing the burst-size property from the PROM */
#define DMA_BURST1 0x01
#define DMA_BURST2 0x02
#define DMA_BURST4 0x04
#define DMA_BURST8 0x08
#define DMA_BURST16 0x10
#define DMA_BURST32 0x20
#define DMA_BURST64 0x40
#define DMA_BURSTBITS 0x7f
/* From PCI */
#ifdef CONFIG_PCI
extern int isa_dma_bridge_buggy;
#else
#include <asm/dma_32.h>
#define isa_dma_bridge_buggy (0)
#endif
#ifdef CONFIG_SPARC32
/* Routines for data transfer buffers. */
BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long)
BTFIXUPDEF_CALL(void, mmu_unlockarea, char *, unsigned long)
#define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len)
#define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len)
struct page;
struct device;
struct scatterlist;
/* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */
BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, struct device *, char *, unsigned long)
BTFIXUPDEF_CALL(void, mmu_get_scsi_sgl, struct device *, struct scatterlist *, int)
BTFIXUPDEF_CALL(void, mmu_release_scsi_one, struct device *, __u32, unsigned long)
BTFIXUPDEF_CALL(void, mmu_release_scsi_sgl, struct device *, struct scatterlist *, int)
#define mmu_get_scsi_one(dev,vaddr,len) BTFIXUP_CALL(mmu_get_scsi_one)(dev,vaddr,len)
#define mmu_get_scsi_sgl(dev,sg,sz) BTFIXUP_CALL(mmu_get_scsi_sgl)(dev,sg,sz)
#define mmu_release_scsi_one(dev,vaddr,len) BTFIXUP_CALL(mmu_release_scsi_one)(dev,vaddr,len)
#define mmu_release_scsi_sgl(dev,sg,sz) BTFIXUP_CALL(mmu_release_scsi_sgl)(dev,sg,sz)
/*
* mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep.
*
* The mmu_map_dma_area establishes two mappings in one go.
* These mappings point to pages normally mapped at 'va' (linear address).
* First mapping is for CPU visible address at 'a', uncached.
* This is an alias, but it works because it is an uncached mapping.
* Second mapping is for device visible address, or "bus" address.
* The bus address is returned at '*pba'.
*
* These functions seem distinct, but are hard to split. On sun4c,
* at least for now, 'a' is equal to bus address, and retured in *pba.
* On sun4m, page attributes depend on the CPU type, so we have to
* know if we are mapping RAM or I/O, so it has to be an additional argument
* to a separate mapping function for CPU visible mappings.
*/
BTFIXUPDEF_CALL(int, mmu_map_dma_area, struct device *, dma_addr_t *, unsigned long, unsigned long, int len)
BTFIXUPDEF_CALL(void, mmu_unmap_dma_area, struct device *, unsigned long busa, int len)
#define mmu_map_dma_area(dev,pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(dev,pba,va,a,len)
#define mmu_unmap_dma_area(dev,ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(dev,ba,len)
#endif
#endif /* !(_ASM_SPARC_DMA_H) */
arch/sparc/include/asm/dma_32.h deleted 100644 → 0
View file @ 589acce5
This diff is collapsed.
arch/sparc/include/asm/dma_64.h deleted 100644 → 0
View file @ 589acce5
/*
* include/asm/dma.h
*
* Copyright 1996 (C) David S. Miller (davem@caip.rutgers.edu)
*/
#ifndef _ASM_SPARC64_DMA_H
#define _ASM_SPARC64_DMA_H
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/spinlock.h>
#include <asm/sbus.h>
#include <asm/delay.h>
#include <asm/oplib.h>
/* These are irrelevant for Sparc DMA, but we leave it in so that
* things can compile.
*/
#define MAX_DMA_CHANNELS 8
#define DMA_MODE_READ 1
#define DMA_MODE_WRITE 2
#define MAX_DMA_ADDRESS (~0UL)
/* Useful constants */
#define SIZE_16MB (16*1024*1024)
#define SIZE_64K (64*1024)
/* SBUS DMA controller reg offsets */
#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */
#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */
#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */
#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */
/* DVMA chip revisions */
enum dvma_rev {
dvmarev0,
dvmaesc1,
dvmarev1,
dvmarev2,
dvmarev3,
dvmarevplus,
dvmahme
};
#define DMA_HASCOUNT(rev) ((rev)==dvmaesc1)
/* Linux DMA information structure, filled during probe. */
struct sbus_dma {
struct sbus_dma *next;
struct sbus_dev *sdev;
void __iomem *regs;
/* Status, misc info */
int node; /* Prom node for this DMA device */
int running; /* Are we doing DMA now? */
int allocated; /* Are we "owned" by anyone yet? */
/* Transfer information. */
u32 addr; /* Start address of current transfer */
int nbytes; /* Size of current transfer */
int realbytes; /* For splitting up large transfers, etc. */
/* DMA revision */
enum dvma_rev revision;
};
extern struct sbus_dma *dma_chain;
/* Broken hardware... */
#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1)
#define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1)
/* Main routines in dma.c */
extern void dvma_init(struct sbus_bus *);
/* Fields in the cond_reg register */
/* First, the version identification bits */
#define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */
#define DMA_VERS0 0x00000000 /* Sunray DMA version */
#define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */
#define DMA_VERS1 0x80000000 /* DMA rev 1 */
#define DMA_VERS2 0xa0000000 /* DMA rev 2 */
#define DMA_VERHME 0xb0000000 /* DMA hme gate array */
#define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */
#define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */
#define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */
#define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */
#define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */
#define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */
#define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */
#define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */
#define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */
#define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */
#define DMA_ST_WRITE 0x00000100 /* write from device to memory */
#define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */
#define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */
#define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */
#define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */
#define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */
#define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */
#define DMA_TERM_CNTR 0x00004000 /* Terminal counter */
#define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */
#define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */
#define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */
#define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */
#define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */
#define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */
#define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */
#define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */
#define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */
#define DMA_BRST64 0x000c0000 /* SCSI: 64byte bursts (HME on UltraSparc only) */
#define DMA_BRST32 0x00040000 /* SCSI: 32byte bursts */
#define DMA_BRST16 0x00000000 /* SCSI: 16byte bursts */
#define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */
#define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */
#define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */
#define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */
#define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */
#define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */
#define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */
#define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */
#define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */
#define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */
#define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */
#define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */
/* Values describing the burst-size property from the PROM */
#define DMA_BURST1 0x01
#define DMA_BURST2 0x02
#define DMA_BURST4 0x04
#define DMA_BURST8 0x08
#define DMA_BURST16 0x10
#define DMA_BURST32 0x20
#define DMA_BURST64 0x40
#define DMA_BURSTBITS 0x7f
/* Determine highest possible final transfer address given a base */
#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL))
/* Yes, I hack a lot of elisp in my spare time... */
#define DMA_ERROR_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_HNDL_ERROR))
#define DMA_IRQ_P(regs) ((sbus_readl((regs) + DMA_CSR)) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))
#define DMA_WRITE_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_ST_WRITE))
#define DMA_OFF(__regs) \
do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \
tmp &= ~DMA_ENABLE; \
sbus_writel(tmp, (__regs) + DMA_CSR); \
} while(0)
#define DMA_INTSOFF(__regs) \
do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \
tmp &= ~DMA_INT_ENAB; \
sbus_writel(tmp, (__regs) + DMA_CSR); \
} while(0)
#define DMA_INTSON(__regs) \
do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \
tmp |= DMA_INT_ENAB; \
sbus_writel(tmp, (__regs) + DMA_CSR); \
} while(0)
#define DMA_PUNTFIFO(__regs) \
do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \
tmp |= DMA_FIFO_INV; \
sbus_writel(tmp, (__regs) + DMA_CSR); \
} while(0)
#define DMA_SETSTART(__regs, __addr) \
sbus_writel((u32)(__addr), (__regs) + DMA_ADDR);
#define DMA_BEGINDMA_W(__regs) \
do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \
tmp |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB); \
sbus_writel(tmp, (__regs) + DMA_CSR); \
} while(0)
#define DMA_BEGINDMA_R(__regs) \
do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \
tmp |= (DMA_ENABLE|DMA_INT_ENAB); \
tmp &= ~DMA_ST_WRITE; \
sbus_writel(tmp, (__regs) + DMA_CSR); \
} while(0)
/* For certain DMA chips, we need to disable ints upon irq entry
* and turn them back on when we are done. So in any ESP interrupt
* handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT
* when leaving the handler. You have been warned...
*/
#define DMA_IRQ_ENTRY(dma, dregs) do { \
if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \
} while (0)
#define DMA_IRQ_EXIT(dma, dregs) do { \
if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \
} while(0)
#define for_each_dvma(dma) \
for((dma) = dma_chain; (dma); (dma) = (dma)->next)
/* From PCI */
#ifdef CONFIG_PCI
extern int isa_dma_bridge_buggy;
#else
#define isa_dma_bridge_buggy (0)
#endif
#endif /* !(_ASM_SPARC64_DMA_H) */
arch/sparc/include/asm/ebus.h deleted 100644 → 0
View file @ 589acce5
#ifndef ___ASM_SPARC_EBUS_H
#define ___ASM_SPARC_EBUS_H
#if defined(__sparc__) && defined(__arch64__)
#include <asm/ebus_64.h>
#else
#include <asm/ebus_32.h>
#endif
#endif
arch/sparc/include/asm/ebus_32.h deleted 100644 → 0
View file @ 589acce5
/*
* ebus.h: PCI to Ebus pseudo driver software state.
*
* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
*
* Adopted for sparc by V. Roganov and G. Raiko.
*/
#ifndef __SPARC_EBUS_H
#define __SPARC_EBUS_H
#ifndef _LINUX_IOPORT_H
#include <linux/ioport.h>
#endif
#include <linux/of_device.h>
#include <asm/oplib.h>
#include <asm/prom.h>
struct linux_ebus_child {
struct linux_ebus_child *next;
struct linux_ebus_device *parent;
struct linux_ebus *bus;
struct device_node *prom_node;
struct resource resource[PROMREG_MAX];
int num_addrs;
unsigned int irqs[PROMINTR_MAX];
int num_irqs;
};
struct linux_ebus_device {
struct of_device ofdev;
struct linux_ebus_device *next;
struct linux_ebus_child *children;
struct linux_ebus *bus;
struct device_node *prom_node;
struct resource resource[PROMREG_MAX];
int num_addrs;
unsigned int irqs[PROMINTR_MAX];
int num_irqs;
};
#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev)
struct linux_ebus {
struct of_device ofdev;
struct linux_ebus *next;
struct linux_ebus_device *devices;
struct linux_pbm_info *parent;
struct pci_dev *self;
struct device_node *prom_node;
};
#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev)
struct linux_ebus_dma {
unsigned int dcsr;
unsigned int dacr;
unsigned int dbcr;
};
#define EBUS_DCSR_INT_PEND 0x00000001
#define EBUS_DCSR_ERR_PEND 0x00000002
#define EBUS_DCSR_DRAIN 0x00000004
#define EBUS_DCSR_INT_EN 0x00000010
#define EBUS_DCSR_RESET 0x00000080
#define EBUS_DCSR_WRITE 0x00000100
#define EBUS_DCSR_EN_DMA 0x00000200
#define EBUS_DCSR_CYC_PEND 0x00000400
#define EBUS_DCSR_DIAG_RD_DONE 0x00000800
#define EBUS_DCSR_DIAG_WR_DONE 0x00001000
#define EBUS_DCSR_EN_CNT 0x00002000
#define EBUS_DCSR_TC 0x00004000
#define EBUS_DCSR_DIS_CSR_DRN 0x00010000
#define EBUS_DCSR_BURST_SZ_MASK 0x000c0000
#define EBUS_DCSR_BURST_SZ_1 0x00080000
#define EBUS_DCSR_BURST_SZ_4 0x00000000
#define EBUS_DCSR_BURST_SZ_8 0x00040000
#define EBUS_DCSR_BURST_SZ_16 0x000c0000
#define EBUS_DCSR_DIAG_EN 0x00100000
#define EBUS_DCSR_DIS_ERR_PEND 0x00400000
#define EBUS_DCSR_TCI_DIS 0x00800000
#define EBUS_DCSR_EN_NEXT 0x01000000
#define EBUS_DCSR_DMA_ON 0x02000000
#define EBUS_DCSR_A_LOADED 0x04000000
#define EBUS_DCSR_NA_LOADED 0x08000000
#define EBUS_DCSR_DEV_ID_MASK 0xf0000000
extern struct linux_ebus *ebus_chain;
extern void ebus_init(void);
#define for_each_ebus(bus) \
for((bus) = ebus_chain; (bus); (bus) = (bus)->next)
#define for_each_ebusdev(dev, bus) \
for((dev) = (bus)->devices; (dev); (dev) = (dev)->next)
#define for_each_edevchild(dev, child) \
for((child) = (dev)->children; (child); (child) = (child)->next)
#endif /* !(__SPARC_EBUS_H) */
arch/sparc/include/asm/ebus_64.h → arch/sparc/include/asm/ebus_dma.h
View file @ 07104839
/*
* ebus.h: PCI to Ebus pseudo driver software state.
*
* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
* Copyright (C) 1999 David S. Miller (davem@redhat.com)
*/
#ifndef __SPARC64_EBUS_H
#define __SPARC64_EBUS_H
#include <linux/of_device.h>
#include <asm/oplib.h>
#include <asm/prom.h>
struct linux_ebus_child {
struct linux_ebus_child *next;
struct linux_ebus_device *parent;
struct linux_ebus *bus;
struct device_node *prom_node;
struct resource resource[PROMREG_MAX];
int num_addrs;
unsigned int irqs[PROMINTR_MAX];
int num_irqs;
};
struct linux_ebus_device {
struct of_device ofdev;
struct linux_ebus_device *next;
struct linux_ebus_child *children;
struct linux_ebus *bus;
struct device_node *prom_node;
struct resource resource[PROMREG_MAX];
int num_addrs;
unsigned int irqs[PROMINTR_MAX];
int num_irqs;
};
#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev)
struct linux_ebus {
struct of_device ofdev;
struct linux_ebus *next;
struct linux_ebus_device *devices;
struct pci_dev *self;
int index;
int is_rio;
struct device_node *prom_node;
};
#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev)
#ifndef __ASM_SPARC_EBUS_DMA_H
#define __ASM_SPARC_EBUS_DMA_H
struct ebus_dma_info {
spinlock_t lock;
......@@ -79,17 +32,4 @@ extern unsigned int ebus_dma_residue(struct ebus_dma_info *p);
extern unsigned int ebus_dma_addr(struct ebus_dma_info *p);
extern void ebus_dma_enable(struct ebus_dma_info *p, int on);
extern struct linux_ebus *ebus_chain;
extern void ebus_init(void);
#define for_each_ebus(bus) \
for((bus) = ebus_chain; (bus); (bus) = (bus)->next)
#define for_each_ebusdev(dev, bus) \
for((dev) = (bus)->devices; (dev); (dev) = (dev)->next)
#define for_each_edevchild(dev, child) \
for((child) = (dev)->children; (child); (child) = (child)->next)
#endif /* !(__SPARC64_EBUS_H) */
#endif /* __ASM_SPARC_EBUS_DMA_H */
arch/sparc/include/asm/elf_32.h
View file @ 07104839
......@@ -105,11 +105,8 @@ typedef struct {
#define ELF_DATA ELFDATA2MSB
#define USE_ELF_CORE_DUMP
#ifndef CONFIG_SUN4
#define ELF_EXEC_PAGESIZE 4096
#else
#define ELF_EXEC_PAGESIZE 8192
#endif
/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
......@@ -126,7 +123,7 @@ typedef struct {
/* Sun4c has none of the capabilities, most sun4m's have them all.
* XXX This is gross, set some global variable at boot time. -DaveM
*/
#define ELF_HWCAP ((ARCH_SUN4C_SUN4) ? 0 : \
#define ELF_HWCAP ((ARCH_SUN4C) ? 0 : \
(HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \
HWCAP_SPARC_SWAP | \
((srmmu_modtype != Cypress && \
......
arch/sparc/include/asm/fhc.h
View file @ 07104839
/*
* fhc.h: Structures for central/fhc pseudo driver on Sunfire/Starfire/Wildfire.
/* fhc.h: FHC and Clock board register definitions.
*
* Copyright (C) 1997, 1999 David S. Miller (davem@redhat.com)
*/
......@@ -7,14 +6,6 @@
#ifndef _SPARC64_FHC_H
#define _SPARC64_FHC_H
#include <linux/timer.h>
#include <asm/oplib.h>
#include <asm/prom.h>
#include <asm/upa.h>
struct linux_fhc;
/* Clock board register offsets. */
#define CLOCK_CTRL 0x00UL /* Main control */
#define CLOCK_STAT1 0x10UL /* Status one */
......@@ -29,21 +20,7 @@ struct linux_fhc;
#define CLOCK_CTRL_MLED 0x02 /* Mid LED, 1 == on */
#define CLOCK_CTRL_RLED 0x01 /* RIght LED, 1 == on */
struct linux_central {
struct linux_fhc *child;
unsigned long cfreg;
unsigned long clkregs;
unsigned long clkver;
int slots;
struct device_node *prom_node;
struct linux_prom_ranges central_ranges[PROMREG_MAX];
int num_central_ranges;
};
/* Firehose controller register offsets */
struct fhc_regs {
unsigned long pregs; /* FHC internal regs */
#define FHC_PREGS_ID 0x00UL /* FHC ID */
#define FHC_ID_VERS 0xf0000000 /* Version of this FHC */
#define FHC_ID_PARTID 0x0ffff000 /* Part ID code (0x0f9f == FHC) */
......@@ -90,32 +67,14 @@ struct fhc_regs {
#define FHC_JTAG_CTRL_MENAB 0x80000000 /* Indicates this is JTAG Master */
#define FHC_JTAG_CTRL_MNONE 0x40000000 /* Indicates no JTAG Master present */
#define FHC_PREGS_JCMD 0x100UL /* FHC JTAG Command Register */
unsigned long ireg; /* FHC IGN reg */
#define FHC_IREG_IGN 0x00UL /* This FHC's IGN */
unsigned long ffregs; /* FHC fanfail regs */
#define FHC_FFREGS_IMAP 0x00UL /* FHC Fanfail IMAP */
#define FHC_FFREGS_ICLR 0x10UL /* FHC Fanfail ICLR */
unsigned long sregs; /* FHC system regs */
#define FHC_SREGS_IMAP 0x00UL /* FHC System IMAP */
#define FHC_SREGS_ICLR 0x10UL /* FHC System ICLR */
unsigned long uregs; /* FHC uart regs */
#define FHC_UREGS_IMAP 0x00UL /* FHC Uart IMAP */
#define FHC_UREGS_ICLR 0x10UL /* FHC Uart ICLR */
unsigned long tregs; /* FHC TOD regs */
#define FHC_TREGS_IMAP 0x00UL /* FHC TOD IMAP */
#define FHC_TREGS_ICLR 0x10UL /* FHC TOD ICLR */
};
struct linux_fhc {
struct linux_fhc *next;
struct linux_central *parent; /* NULL if not central FHC */
struct fhc_regs fhc_regs;
int board;
int jtag_master;
struct device_node *prom_node;
struct linux_prom_ranges fhc_ranges[PROMREG_MAX];
int num_fhc_ranges;
};
#endif /* !(_SPARC64_FHC_H) */
arch/sparc/include/asm/floppy_32.h
View file @ 07104839
......@@ -6,6 +6,9 @@
#ifndef __ASM_SPARC_FLOPPY_H
#define __ASM_SPARC_FLOPPY_H
#include <linux/of.h>
#include <linux/of_device.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/system.h>
......@@ -343,7 +346,7 @@ static int sun_floppy_init(void)
r.flags = fd_regs[0].which_io;
r.start = fd_regs[0].phys_addr;
sun_fdc = (struct sun_flpy_controller *)
sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy");
of_ioremap(&r, 0, fd_regs[0].reg_size, "floppy");
/* Last minute sanity check... */
if(sun_fdc->status_82072 == 0xff) {
......@@ -385,4 +388,15 @@ static int sparc_eject(void)
#define EXTRA_FLOPPY_PARAMS
static DEFINE_SPINLOCK(dma_spin_lock);
#define claim_dma_lock() \
({ unsigned long flags; \
spin_lock_irqsave(&dma_spin_lock, flags); \
flags; \
})
#define release_dma_lock(__flags) \
spin_unlock_irqrestore(&dma_spin_lock, __flags);
#endif /* !(__ASM_SPARC_FLOPPY_H) */
arch/sparc/include/asm/floppy_64.h
View file @ 07104839
/* floppy.h: Sparc specific parts of the Floppy driver.
*
* Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net)
* Copyright (C) 1996, 2007, 2008 David S. Miller (davem@davemloft.net)
* Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
*
* Ultra/PCI support added: Sep 1997 Eddie C. Dost (ecd@skynet.be)
......@@ -9,18 +9,11 @@
#ifndef __ASM_SPARC64_FLOPPY_H
#define __ASM_SPARC64_FLOPPY_H
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/dma-mapping.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/idprom.h>
#include <asm/oplib.h>
#include <asm/auxio.h>
#include <asm/sbus.h>
#include <asm/irq.h>
/*
* Define this to enable exchanging drive 0 and 1 if only drive 1 is
......@@ -50,7 +43,7 @@ struct sun_flpy_controller {
/* You'll only ever find one controller on an Ultra anyways. */
static struct sun_flpy_controller *sun_fdc = (struct sun_flpy_controller *)-1;
unsigned long fdc_status;
static struct sbus_dev *floppy_sdev = NULL;
static struct of_device *floppy_op = NULL;
struct sun_floppy_ops {
unsigned char (*fd_inb) (unsigned long port);
......@@ -291,12 +284,11 @@ static int sun_fd_eject(int drive)
return 0;
}
#ifdef CONFIG_PCI
#include <asm/ebus.h>
#include <asm/ebus_dma.h>
#include <asm/ns87303.h>
static struct ebus_dma_info sun_pci_fd_ebus_dma;
static struct pci_dev *sun_pci_ebus_dev;
static struct device *sun_floppy_dev;
static int sun_pci_broken_drive = -1;
struct sun_pci_dma_op {
......@@ -377,7 +369,7 @@ static void sun_pci_fd_enable_dma(void)
sun_pci_dma_pending.addr = -1U;
sun_pci_dma_current.addr =
pci_map_single(sun_pci_ebus_dev,
dma_map_single(sun_floppy_dev,
sun_pci_dma_current.buf,
sun_pci_dma_current.len,
sun_pci_dma_current.direction);
......@@ -394,7 +386,7 @@ static void sun_pci_fd_disable_dma(void)
{
ebus_dma_enable(&sun_pci_fd_ebus_dma, 0);
if (sun_pci_dma_current.addr != -1U)
pci_unmap_single(sun_pci_ebus_dev,
dma_unmap_single(sun_floppy_dev,
sun_pci_dma_current.addr,
sun_pci_dma_current.len,
sun_pci_dma_current.direction);
......@@ -404,9 +396,9 @@ static void sun_pci_fd_disable_dma(void)
static void sun_pci_fd_set_dma_mode(int mode)
{
if (mode == DMA_MODE_WRITE)
sun_pci_dma_pending.direction = PCI_DMA_TODEVICE;
sun_pci_dma_pending.direction = DMA_TO_DEVICE;
else
sun_pci_dma_pending.direction = PCI_DMA_FROMDEVICE;
sun_pci_dma_pending.direction = DMA_FROM_DEVICE;
ebus_dma_prepare(&sun_pci_fd_ebus_dma, mode != DMA_MODE_WRITE);
}
......@@ -538,80 +530,84 @@ static int sun_pci_fd_test_drive(unsigned long port, int drive)
#undef MSR
#undef DOR
#endif /* CONFIG_PCI */
#ifdef CONFIG_PCI
static int __init ebus_fdthree_p(struct linux_ebus_device *edev)
static int __init ebus_fdthree_p(struct device_node *dp)
{
if (!strcmp(edev->prom_node->name, "fdthree"))
if (!strcmp(dp->name, "fdthree"))
return 1;
if (!strcmp(edev->prom_node->name, "floppy")) {
if (!strcmp(dp->name, "floppy")) {
const char *compat;
compat = of_get_property(edev->prom_node,
"compatible", NULL);
compat = of_get_property(dp, "compatible", NULL);
if (compat && !strcmp(compat, "fdthree"))
return 1;
}
return 0;
}
#endif
static unsigned long __init sun_floppy_init(void)
{
char state[128];
struct sbus_bus *bus;
struct sbus_dev *sdev = NULL;
static int initialized = 0;
struct device_node *dp;
struct of_device *op;
const char *prop;
char state[128];
if (initialized)
return sun_floppy_types[0];
initialized = 1;
for_all_sbusdev (sdev, bus) {
if (!strcmp(sdev->prom_name, "SUNW,fdtwo"))
op = NULL;
for_each_node_by_name(dp, "SUNW,fdtwo") {
if (strcmp(dp->parent->name, "sbus"))
continue;
op = of_find_device_by_node(dp);
if (op)
break;
}
if(sdev) {
floppy_sdev = sdev;
FLOPPY_IRQ = sdev->irqs[0];
if (op) {
floppy_op = op;
FLOPPY_IRQ = op->irqs[0];
} else {
#ifdef CONFIG_PCI
struct linux_ebus *ebus;
struct linux_ebus_device *edev = NULL;
unsigned long config = 0;
struct device_node *ebus_dp;
void __iomem *auxio_reg;
const char *state_prop;
unsigned long config;
for_each_ebus(ebus) {
for_each_ebusdev(edev, ebus) {
if (ebus_fdthree_p(edev))
goto ebus_done;
dp = NULL;
for_each_node_by_name(ebus_dp, "ebus") {
for (dp = ebus_dp->child; dp; dp = dp->sibling) {
if (ebus_fdthree_p(dp))
goto found_fdthree;
}
}
ebus_done:
if (!edev)
found_fdthree:
if (!dp)
return 0;
op = of_find_device_by_node(dp);
if (!op)
return 0;
state_prop = of_get_property(edev->prom_node, "status", NULL);
state_prop = of_get_property(op->node, "status", NULL);
if (state_prop && !strncmp(state_prop, "disabled", 8))
return 0;
FLOPPY_IRQ = edev->irqs[0];
FLOPPY_IRQ = op->irqs[0];
/* Make sure the high density bit is set, some systems
* (most notably Ultra5/Ultra10) come up with it clear.
*/
auxio_reg = (void __iomem *) edev->resource[2].start;
auxio_reg = (void __iomem *) op->resource[2].start;
writel(readl(auxio_reg)|0x2, auxio_reg);
sun_pci_ebus_dev = ebus->self;
sun_floppy_dev = &op->dev;
spin_lock_init(&sun_pci_fd_ebus_dma.lock);
/* XXX ioremap */
sun_pci_fd_ebus_dma.regs = (void __iomem *)
edev->resource[1].start;
op->resource[1].start;
if (!sun_pci_fd_ebus_dma.regs)
return 0;
......@@ -625,7 +621,7 @@ static unsigned long __init sun_floppy_init(void)
return 0;
/* XXX ioremap */
sun_fdc = (struct sun_flpy_controller *)edev->resource[0].start;
sun_fdc = (struct sun_flpy_controller *) op->resource[0].start;
sun_fdops.fd_inb = sun_pci_fd_inb;
sun_fdops.fd_outb = sun_pci_fd_outb;
......@@ -662,12 +658,15 @@ static unsigned long __init sun_floppy_init(void)
/*
* Find NS87303 SuperIO config registers (through ecpp).
*/
for_each_ebus(ebus) {
for_each_ebusdev(edev, ebus) {
if (!strcmp(edev->prom_node->name, "ecpp")) {
config = edev->resource[1].start;
goto config_done;
}
config = 0;
for (dp = ebus_dp->child; dp; dp = dp->sibling) {
if (!strcmp(dp->name, "ecpp")) {
struct of_device *ecpp_op;
ecpp_op = of_find_device_by_node(dp);
if (ecpp_op)
config = ecpp_op->resource[1].start;
goto config_done;
}
}
config_done:
......@@ -716,26 +715,23 @@ static unsigned long __init sun_floppy_init(void)
#endif /* PCI_FDC_SWAP_DRIVES */
return sun_floppy_types[0];
#else
return 0;
#endif
}
prom_getproperty(sdev->prom_node, "status", state, sizeof(state));
if(!strncmp(state, "disabled", 8))
prop = of_get_property(op->node, "status", NULL);
if (prop && !strncmp(state, "disabled", 8))
return 0;
/*
* We cannot do sbus_ioremap here: it does request_region,
* We cannot do of_ioremap here: it does request_region,
* which the generic floppy driver tries to do once again.
* But we must use the sdev resource values as they have
* had parent ranges applied.
*/
sun_fdc = (struct sun_flpy_controller *)
(sdev->resource[0].start +
((sdev->resource[0].flags & 0x1ffUL) << 32UL));
(op->resource[0].start +
((op->resource[0].flags & 0x1ffUL) << 32UL));
/* Last minute sanity check... */
if(sbus_readb(&sun_fdc->status1_82077) == 0xff) {
if (sbus_readb(&sun_fdc->status1_82077) == 0xff) {
sun_fdc = (struct sun_flpy_controller *)-1;
return 0;
}
......
arch/sparc/include/asm/gpio.h 0 → 100644
View file @ 07104839
#ifndef __ASM_SPARC_GPIO_H
#define __ASM_SPARC_GPIO_H
#include <linux/errno.h>
#include <asm-generic/gpio.h>
#ifdef CONFIG_GPIOLIB
static inline int gpio_get_value(unsigned int gpio)
{
return __gpio_get_value(gpio);
}
static inline void gpio_set_value(unsigned int gpio, int value)
{
__gpio_set_value(gpio, value);
}
static inline int gpio_cansleep(unsigned int gpio)
{
return __gpio_cansleep(gpio);
}
static inline int gpio_to_irq(unsigned int gpio)
{
return -ENOSYS;
}
static inline int irq_to_gpio(unsigned int irq)
{
return -EINVAL;
}
#endif /* CONFIG_GPIOLIB */
#endif /* __ASM_SPARC_GPIO_H */
arch/sparc/include/asm/io-unit.h
View file @ 07104839
......@@ -55,8 +55,4 @@ struct iounit_struct {
#define IOUNIT_BMAPM_START IOUNIT_BMAP2_END
#define IOUNIT_BMAPM_END ((IOUNIT_DMA_SIZE - IOUNIT_DVMA_SIZE) >> PAGE_SHIFT)
extern __u32 iounit_map_dma_init(struct sbus_bus *, int);
#define iounit_map_dma_finish(sbus, addr, len) mmu_release_scsi_one(addr, len, sbus)
extern __u32 iounit_map_dma_page(__u32, void *, struct sbus_bus *);
#endif /* !(_SPARC_IO_UNIT_H) */
arch/sparc/include/asm/io_32.h
View file @ 07104839
......@@ -292,14 +292,6 @@ struct pci_dev;
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
/*
* Bus number may be in res->flags... somewhere.
*/
extern void __iomem *sbus_ioremap(struct resource *res, unsigned long offset,
unsigned long size, char *name);
extern void sbus_iounmap(volatile void __iomem *vaddr, unsigned long size);
/*
* At the moment, we do not use CMOS_READ anywhere outside of rtc.c,
* so rtc_port is static in it. This should not change unless a new
......@@ -308,6 +300,17 @@ extern void sbus_iounmap(volatile void __iomem *vaddr, unsigned long size);
#define RTC_PORT(x) (rtc_port + (x))
#define RTC_ALWAYS_BCD 0
static inline int sbus_can_dma_64bit(void)
{
return 0; /* actually, sparc_cpu_model==sun4d */
}
static inline int sbus_can_burst64(void)
{
return 0; /* actually, sparc_cpu_model==sun4d */
}
struct device;
extern void sbus_set_sbus64(struct device *, int);
#endif
#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
......
arch/sparc/include/asm/io_64.h
View file @ 07104839
......@@ -482,18 +482,16 @@ struct pci_dev;
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
/* Similarly for SBUS. */
#define sbus_ioremap(__res, __offset, __size, __name) \
({ unsigned long __ret; \
__ret = (__res)->start + (((__res)->flags & 0x1ffUL) << 32UL); \
__ret += (unsigned long) (__offset); \
if (! request_region((__ret), (__size), (__name))) \
__ret = 0UL; \
(void __iomem *) __ret; \
})
#define sbus_iounmap(__addr, __size) \
release_region((unsigned long)(__addr), (__size))
static inline int sbus_can_dma_64bit(void)
{
return 1;
}
static inline int sbus_can_burst64(void)
{
return 1;
}
struct device;
extern void sbus_set_sbus64(struct device *, int);
/*
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
......
arch/sparc/include/asm/iommu_64.h
View file @ 07104839
......@@ -48,6 +48,9 @@ struct strbuf {
unsigned long strbuf_control;
unsigned long strbuf_pflush;
unsigned long strbuf_fsync;
unsigned long strbuf_err_stat;
unsigned long strbuf_tag_diag;
unsigned long strbuf_line_diag;
unsigned long strbuf_ctxflush;
unsigned long strbuf_ctxmatch_base;
unsigned long strbuf_flushflag_pa;
......
arch/sparc/include/asm/irq_64.h
View file @ 07104839
......@@ -56,7 +56,6 @@ extern unsigned int sun4u_build_msi(u32 portid, unsigned int *virt_irq_p,
unsigned long imap_base,
unsigned long iclr_base);
extern void sun4u_destroy_msi(unsigned int virt_irq);
extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
extern unsigned char virt_irq_alloc(unsigned int dev_handle,
unsigned int dev_ino);
......
arch/sparc/include/asm/mc146818rtc_64.h
View file @ 07104839
......@@ -7,12 +7,8 @@
#include <asm/io.h>
#ifndef RTC_PORT
#ifdef CONFIG_PCI
extern unsigned long ds1287_regs;
#else
#define ds1287_regs (0UL)
#endif
#define RTC_PORT(x) (ds1287_regs + (x))
extern unsigned long cmos_regs;
#define RTC_PORT(x) (cmos_regs + (x))
#define RTC_ALWAYS_BCD 0
#endif
......@@ -29,6 +25,4 @@ outb_p((addr),RTC_PORT(0)); \
outb_p((val),RTC_PORT(1)); \
})
#define RTC_IRQ 8
#endif /* __ASM_SPARC64_MC146818RTC_H */
arch/sparc/include/asm/memctrl.h 0 → 100644
View file @ 07104839
#ifndef _SPARC_MEMCTRL_H
#define _SPARC_MEMCTRL_H
typedef int (*dimm_printer_t)(int synd_code, unsigned long paddr, char *buf, int buflen);
int register_dimm_printer(dimm_printer_t func);
void unregister_dimm_printer(dimm_printer_t func);
#endif /* _SPARC_MEMCTRL_H */
arch/sparc/include/asm/mostek.h deleted 100644 → 0
View file @ 589acce5
#ifndef ___ASM_SPARC_MOSTEK_H
#define ___ASM_SPARC_MOSTEK_H
#if defined(__sparc__) && defined(__arch64__)
#include <asm/mostek_64.h>
#else
#include <asm/mostek_32.h>
#endif
#endif
arch/sparc/include/asm/mostek_32.h deleted 100644 → 0
View file @ 589acce5
/*
* mostek.h: Describes the various Mostek time of day clock registers.
*
* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
* Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
* Added intersil code 05/25/98 Chris Davis (cdavis@cois.on.ca)
*/
#ifndef _SPARC_MOSTEK_H
#define _SPARC_MOSTEK_H
#include <asm/idprom.h>
#include <asm/io.h>
/* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ)
*
* Data
* Address Function
* Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0
* 7ff - - - - - - - - Year 00-99
* 7fe 0 0 0 - - - - - Month 01-12
* 7fd 0 0 - - - - - - Date 01-31
* 7fc 0 FT 0 0 0 - - - Day 01-07
* 7fb KS 0 - - - - - - Hours 00-23
* 7fa 0 - - - - - - - Minutes 00-59
* 7f9 ST - - - - - - - Seconds 00-59
* 7f8 W R S - - - - - Control
*
* * ST is STOP BIT
* * W is WRITE BIT
* * R is READ BIT
* * S is SIGN BIT
* * FT is FREQ TEST BIT
* * KS is KICK START BIT
*/
/* The Mostek 48t02 real time clock and NVRAM chip. The registers
* other than the control register are in binary coded decimal. Some
* control bits also live outside the control register.
*/
#define mostek_read(_addr) readb(_addr)
#define mostek_write(_addr,_val) writeb(_val, _addr)
#define MOSTEK_EEPROM 0x0000UL
#define MOSTEK_IDPROM 0x07d8UL
#define MOSTEK_CREG 0x07f8UL
#define MOSTEK_SEC 0x07f9UL
#define MOSTEK_MIN 0x07faUL
#define MOSTEK_HOUR 0x07fbUL
#define MOSTEK_DOW 0x07fcUL
#define MOSTEK_DOM 0x07fdUL
#define MOSTEK_MONTH 0x07feUL
#define MOSTEK_YEAR 0x07ffUL
struct mostek48t02 {
volatile char eeprom[2008]; /* This is the eeprom, don't touch! */
struct idprom idprom; /* The idprom lives here. */
volatile unsigned char creg; /* Control register */
volatile unsigned char sec; /* Seconds (0-59) */
volatile unsigned char min; /* Minutes (0-59) */
volatile unsigned char hour; /* Hour (0-23) */
volatile unsigned char dow; /* Day of the week (1-7) */
volatile unsigned char dom; /* Day of the month (1-31) */
volatile unsigned char month; /* Month of year (1-12) */
volatile unsigned char year; /* Year (0-99) */
};
extern spinlock_t mostek_lock;
extern void __iomem *mstk48t02_regs;
/* Control register values. */
#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */
#define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */
#define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */
/* Control bits that live in the other registers. */
#define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */
#define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */
#define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */
#define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */
#define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO)
/* Masks that define how much space each value takes up. */
#define MSTK_SEC_MASK 0x7f
#define MSTK_MIN_MASK 0x7f
#define MSTK_HOUR_MASK 0x3f
#define MSTK_DOW_MASK 0x07
#define MSTK_DOM_MASK 0x3f
#define MSTK_MONTH_MASK 0x1f
#define MSTK_YEAR_MASK 0xffU
/* Binary coded decimal conversion macros. */
#define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04))
#define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A))
/* Generic register set and get macros for internal use. */
#define MSTK_GET(regs,var,mask) (MSTK_REGVAL_TO_DECIMAL(((struct mostek48t02 *)regs)->var & MSTK_ ## mask ## _MASK))
#define MSTK_SET(regs,var,value,mask) do { ((struct mostek48t02 *)regs)->var &= ~(MSTK_ ## mask ## _MASK); ((struct mostek48t02 *)regs)->var |= MSTK_DECIMAL_TO_REGVAL(value) & (MSTK_ ## mask ## _MASK); } while (0)
/* Macros to make register access easier on our fingers. These give you
* the decimal value of the register requested if applicable. You pass
* the a pointer to a 'struct mostek48t02'.
*/
#define MSTK_REG_CREG(regs) (((struct mostek48t02 *)regs)->creg)
#define MSTK_REG_SEC(regs) MSTK_GET(regs,sec,SEC)
#define MSTK_REG_MIN(regs) MSTK_GET(regs,min,MIN)
#define MSTK_REG_HOUR(regs) MSTK_GET(regs,hour,HOUR)
#define MSTK_REG_DOW(regs) MSTK_GET(regs,dow,DOW)
#define MSTK_REG_DOM(regs) MSTK_GET(regs,dom,DOM)
#define MSTK_REG_MONTH(regs) MSTK_GET(regs,month,MONTH)
#define MSTK_REG_YEAR(regs) MSTK_GET(regs,year,YEAR)
#define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,sec,value,SEC)
#define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,min,value,MIN)
#define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,hour,value,HOUR)
#define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,dow,value,DOW)
#define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,dom,value,DOM)
#define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,month,value,MONTH)
#define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,year,value,YEAR)
/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the
* same (basically) layout of the 48t02 chip except for the extra
* NVRAM on board (8 KB against the 48t02's 2 KB).
*/
struct mostek48t08 {
char offset[6*1024]; /* Magic things may be here, who knows? */
struct mostek48t02 regs; /* Here is what we are interested in. */
};
#ifdef CONFIG_SUN4
enum sparc_clock_type { MSTK48T02, MSTK48T08, \
INTERSIL, MSTK_INVALID };
#else
enum sparc_clock_type { MSTK48T02, MSTK48T08, \
MSTK_INVALID };
#endif
#ifdef CONFIG_SUN4
/* intersil on a sun 4/260 code data from harris doc */
struct intersil_dt {
volatile unsigned char int_csec;
volatile unsigned char int_hour;
volatile unsigned char int_min;
volatile unsigned char int_sec;
volatile unsigned char int_month;
volatile unsigned char int_day;
volatile unsigned char int_year;
volatile unsigned char int_dow;
};
struct intersil {
struct intersil_dt clk;
struct intersil_dt cmp;
volatile unsigned char int_intr_reg;
volatile unsigned char int_cmd_reg;
};
#define INTERSIL_STOP 0x0
#define INTERSIL_START 0x8
#define INTERSIL_INTR_DISABLE 0x0
#define INTERSIL_INTR_ENABLE 0x10
#define INTERSIL_32K 0x0
#define INTERSIL_NORMAL 0x0
#define INTERSIL_24H 0x4
#define INTERSIL_INT_100HZ 0x2
/* end of intersil info */
#endif
#endif /* !(_SPARC_MOSTEK_H) */
arch/sparc/include/asm/mostek_64.h deleted 100644 → 0
View file @ 589acce5
/* mostek.h: Describes the various Mostek time of day clock registers.
*
* Copyright (C) 1995 David S. Miller (davem@davemloft.net)
* Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
*/
#ifndef _SPARC64_MOSTEK_H
#define _SPARC64_MOSTEK_H
#include <asm/idprom.h>
/* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ)
*
* Data
* Address Function
* Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0
* 7ff - - - - - - - - Year 00-99
* 7fe 0 0 0 - - - - - Month 01-12
* 7fd 0 0 - - - - - - Date 01-31
* 7fc 0 FT 0 0 0 - - - Day 01-07
* 7fb KS 0 - - - - - - Hours 00-23
* 7fa 0 - - - - - - - Minutes 00-59
* 7f9 ST - - - - - - - Seconds 00-59
* 7f8 W R S - - - - - Control
*
* * ST is STOP BIT
* * W is WRITE BIT
* * R is READ BIT
* * S is SIGN BIT
* * FT is FREQ TEST BIT
* * KS is KICK START BIT
*/
/* The Mostek 48t02 real time clock and NVRAM chip. The registers
* other than the control register are in binary coded decimal. Some
* control bits also live outside the control register.
*
* We now deal with physical addresses for I/O to the chip. -DaveM
*/
static inline u8 mostek_read(void __iomem *addr)
{
u8 ret;
__asm__ __volatile__("lduba [%1] %2, %0"
: "=r" (ret)
: "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
return ret;
}
static inline void mostek_write(void __iomem *addr, u8 val)
{
__asm__ __volatile__("stba %0, [%1] %2"
: /* no outputs */
: "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
}
#define MOSTEK_EEPROM 0x0000UL
#define MOSTEK_IDPROM 0x07d8UL
#define MOSTEK_CREG 0x07f8UL
#define MOSTEK_SEC 0x07f9UL
#define MOSTEK_MIN 0x07faUL
#define MOSTEK_HOUR 0x07fbUL
#define MOSTEK_DOW 0x07fcUL
#define MOSTEK_DOM 0x07fdUL
#define MOSTEK_MONTH 0x07feUL
#define MOSTEK_YEAR 0x07ffUL
extern spinlock_t mostek_lock;
extern void __iomem *mstk48t02_regs;
/* Control register values. */
#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */
#define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */
#define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */
/* Control bits that live in the other registers. */
#define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */
#define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */
#define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */
#define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */
#define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO)
/* Masks that define how much space each value takes up. */
#define MSTK_SEC_MASK 0x7f
#define MSTK_MIN_MASK 0x7f
#define MSTK_HOUR_MASK 0x3f
#define MSTK_DOW_MASK 0x07
#define MSTK_DOM_MASK 0x3f
#define MSTK_MONTH_MASK 0x1f
#define MSTK_YEAR_MASK 0xffU
/* Binary coded decimal conversion macros. */
#define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04))
#define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A))
/* Generic register set and get macros for internal use. */
#define MSTK_GET(regs,name) \
(MSTK_REGVAL_TO_DECIMAL(mostek_read(regs + MOSTEK_ ## name) & MSTK_ ## name ## _MASK))
#define MSTK_SET(regs,name,value) \
do { u8 __val = mostek_read(regs + MOSTEK_ ## name); \
__val &= ~(MSTK_ ## name ## _MASK); \
__val |= (MSTK_DECIMAL_TO_REGVAL(value) & \
(MSTK_ ## name ## _MASK)); \
mostek_write(regs + MOSTEK_ ## name, __val); \
} while(0)
/* Macros to make register access easier on our fingers. These give you
* the decimal value of the register requested if applicable. You pass
* the a pointer to a 'struct mostek48t02'.
*/
#define MSTK_REG_CREG(regs) (mostek_read((regs) + MOSTEK_CREG))
#define MSTK_REG_SEC(regs) MSTK_GET(regs,SEC)
#define MSTK_REG_MIN(regs) MSTK_GET(regs,MIN)
#define MSTK_REG_HOUR(regs) MSTK_GET(regs,HOUR)
#define MSTK_REG_DOW(regs) MSTK_GET(regs,DOW)
#define MSTK_REG_DOM(regs) MSTK_GET(regs,DOM)
#define MSTK_REG_MONTH(regs) MSTK_GET(regs,MONTH)
#define MSTK_REG_YEAR(regs) MSTK_GET(regs,YEAR)
#define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,SEC,value)
#define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,MIN,value)
#define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,HOUR,value)
#define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,DOW,value)
#define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,DOM,value)
#define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,MONTH,value)
#define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,YEAR,value)
/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the
* same (basically) layout of the 48t02 chip except for the extra
* NVRAM on board (8 KB against the 48t02's 2 KB).
*/
#define MOSTEK_48T08_OFFSET 0x0000UL /* Lower NVRAM portions */
#define MOSTEK_48T08_48T02 0x1800UL /* Offset to 48T02 chip */
/* SUN5 systems usually have 48t59 model clock chipsets. But we keep the older
* clock chip definitions around just in case.
*/
#define MOSTEK_48T59_OFFSET 0x0000UL /* Lower NVRAM portions */
#define MOSTEK_48T59_48T02 0x1800UL /* Offset to 48T02 chip */
#endif /* !(_SPARC64_MOSTEK_H) */
arch/sparc/include/asm/obio.h
View file @ 07104839
......@@ -155,17 +155,6 @@ static inline void bw_set_ctrl(int cpu, unsigned ctrl)
"i" (ASI_M_CTL));
}
extern unsigned char cpu_leds[32];
static inline void show_leds(int cpuid)
{
cpuid &= 0x1e;
__asm__ __volatile__ ("stba %0, [%1] %2" : :
"r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]),
"r" (ECSR_BASE(cpuid) | BB_LEDS),
"i" (ASI_M_CTL));
}
static inline unsigned cc_get_ipen(void)
{
unsigned pending;
......
arch/sparc/include/asm/of_device.h
View file @ 07104839
......@@ -30,6 +30,8 @@ struct of_device
extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name);
extern void of_iounmap(struct resource *res, void __iomem *base, unsigned long size);
extern void of_propagate_archdata(struct of_device *bus);
/* This is just here during the transition */
#include <linux/of_platform.h>
......
arch/sparc/include/asm/of_platform.h
View file @ 07104839
......@@ -13,9 +13,6 @@
*
*/
extern struct bus_type ebus_bus_type;
extern struct bus_type sbus_bus_type;
#define of_bus_type of_platform_bus_type /* for compatibility */
#endif
arch/sparc/include/asm/oplib_32.h
View file @ 07104839
......@@ -21,7 +21,6 @@ enum prom_major_version {
PROM_V2, /* sun4c and early sun4m V2 prom */
PROM_V3, /* sun4m and later, up to sun4d/sun4e machines V3 */
PROM_P1275, /* IEEE compliant ISA based Sun PROM, only sun4u */
PROM_SUN4, /* Old sun4 proms are totally different, but we'll shoehorn it to make it fit */
};
extern enum prom_major_version prom_vers;
......
arch/sparc/include/asm/page_32.h
View file @ 07104839
......@@ -8,11 +8,8 @@
#ifndef _SPARC_PAGE_H
#define _SPARC_PAGE_H
#ifdef CONFIG_SUN4
#define PAGE_SHIFT 13
#else
#define PAGE_SHIFT 12
#endif
#ifndef __ASSEMBLY__
/* I have my suspicions... -DaveM */
#define PAGE_SIZE (1UL << PAGE_SHIFT)
......
arch/sparc/include/asm/page_64.h
View file @ 07104839
......@@ -38,6 +38,8 @@
#ifndef __ASSEMBLY__
#define WANT_PAGE_VIRTUAL
extern void _clear_page(void *page);
#define clear_page(X) _clear_page((void *)(X))
struct page;
......
arch/sparc/include/asm/parport.h
View file @ 07104839
......@@ -8,7 +8,7 @@
#include <linux/of_device.h>
#include <asm/ebus.h>
#include <asm/ebus_dma.h>
#include <asm/ns87303.h>
#include <asm/prom.h>
......@@ -215,7 +215,7 @@ static int __devexit ecpp_remove(struct of_device *op)
return 0;
}
static struct of_device_id ecpp_match[] = {
static const struct of_device_id ecpp_match[] = {
{
.name = "ecpp",
},
......
arch/sparc/include/asm/pci_32.h
View file @ 07104839
......@@ -3,6 +3,8 @@
#ifdef __KERNEL__
#include <linux/dma-mapping.h>
/* Can be used to override the logic in pci_scan_bus for skipping
* already-configured bus numbers - to be used for buggy BIOSes
* or architectures with incomplete PCI setup by the loader.
......
arch/sparc/include/asm/pgtable_32.h
View file @ 07104839
......@@ -14,11 +14,7 @@
#include <linux/spinlock.h>
#include <linux/swap.h>
#include <asm/types.h>
#ifdef CONFIG_SUN4
#include <asm/pgtsun4.h>
#else
#include <asm/pgtsun4c.h>
#endif
#include <asm/pgtsrmmu.h>
#include <asm/vac-ops.h>
#include <asm/oplib.h>
......
arch/sparc/include/asm/pgtable_64.h
View file @ 07104839
......@@ -770,6 +770,8 @@ extern void sun4v_patch_tlb_handlers(void);
extern unsigned long cmdline_memory_size;
extern asmlinkage void do_sparc64_fault(struct pt_regs *regs);
#endif /* !(__ASSEMBLY__) */
#endif /* !(_SPARC64_PGTABLE_H) */
arch/sparc/include/asm/prom.h
View file @ 07104839
......@@ -18,6 +18,7 @@
*/
#include <linux/types.h>
#include <linux/proc_fs.h>
#include <linux/mutex.h>
#include <asm/atomic.h>
#define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 2
......@@ -73,6 +74,7 @@ struct of_irq_controller {
extern struct device_node *of_find_node_by_cpuid(int cpuid);
extern int of_set_property(struct device_node *node, const char *name, void *val, int len);
extern struct mutex of_set_property_mutex;
extern int of_getintprop_default(struct device_node *np,
const char *name,
int def);
......@@ -94,6 +96,16 @@ static inline void of_node_put(struct device_node *node)
{
}
/* These routines are here to provide compatibility with how powerpc
* handles IRQ mapping for OF device nodes. We precompute and permanently
* register them in the of_device objects, whereas powerpc computes them
* on request.
*/
extern unsigned int irq_of_parse_and_map(struct device_node *node, int index);
static inline void irq_dispose_mapping(unsigned int virq)
{
}
/*
* NB: This is here while we transition from using asm/prom.h
* to linux/of.h
......
arch/sparc/include/asm/ptrace_64.h
View file @ 07104839
......@@ -113,6 +113,8 @@ struct sparc_trapf {
#ifdef __KERNEL__
#include <linux/threads.h>
static inline int pt_regs_trap_type(struct pt_regs *regs)
{
return regs->magic & 0x1ff;
......@@ -138,6 +140,7 @@ struct global_reg_snapshot {
struct thread_info *thread;
unsigned long pad1;
};
extern struct global_reg_snapshot global_reg_snapshot[NR_CPUS];
#define __ARCH_WANT_COMPAT_SYS_PTRACE
......
arch/sparc/include/asm/reboot.h deleted 100644 → 0
View file @ 589acce5
#ifndef _SPARC64_REBOOT_H
#define _SPARC64_REBOOT_H
extern void machine_alt_power_off(void);
#endif /* _SPARC64_REBOOT_H */
arch/sparc/include/asm/rtc.h deleted 100644 → 0
View file @ 589acce5
/*
* rtc.h: Definitions for access to the Mostek real time clock
*
* Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
*/
#ifndef _RTC_H
#define _RTC_H
#include <linux/ioctl.h>
struct rtc_time
{
int sec; /* Seconds (0-59) */
int min; /* Minutes (0-59) */
int hour; /* Hour (0-23) */
int dow; /* Day of the week (1-7) */
int dom; /* Day of the month (1-31) */
int month; /* Month of year (1-12) */
int year; /* Year (0-99) */
};
#define RTCGET _IOR('p', 20, struct rtc_time)
#define RTCSET _IOW('p', 21, struct rtc_time)
#endif
arch/sparc/include/asm/sbus.h deleted 100644 → 0
View file @ 589acce5
#ifndef ___ASM_SPARC_SBUS_H
#define ___ASM_SPARC_SBUS_H
#if defined(__sparc__) && defined(__arch64__)
#include <asm/sbus_64.h>
#else
#include <asm/sbus_32.h>
#endif
#endif
arch/sparc/include/asm/sbus_32.h deleted 100644 → 0
View file @ 589acce5
/*
* sbus.h: Defines for the Sun SBus.
*
* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
*/
#ifndef _SPARC_SBUS_H
#define _SPARC_SBUS_H
#include <linux/dma-mapping.h>
#include <linux/ioport.h>
#include <linux/of_device.h>
#include <asm/oplib.h>
#include <asm/prom.h>
#include <asm/scatterlist.h>
/* We scan which devices are on the SBus using the PROM node device
* tree. SBus devices are described in two different ways. You can
* either get an absolute address at which to access the device, or
* you can get a SBus 'slot' number and an offset within that slot.
*/
/* The base address at which to calculate device OBIO addresses. */
#define SUN_SBUS_BVADDR 0xf8000000
#define SBUS_OFF_MASK 0x01ffffff
/* These routines are used to calculate device address from slot
* numbers + offsets, and vice versa.
*/
static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset)
{
return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<25)+(offset));
}
static inline int sbus_dev_slot(unsigned long dev_addr)
{
return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>25);
}
struct sbus_bus;
/* Linux SBUS device tables */
struct sbus_dev {
struct of_device ofdev;
struct sbus_bus *bus;
struct sbus_dev *next;
struct sbus_dev *child;
struct sbus_dev *parent;
int prom_node;
char prom_name[64];
int slot;
struct resource resource[PROMREG_MAX];
struct linux_prom_registers reg_addrs[PROMREG_MAX];
int num_registers;
struct linux_prom_ranges device_ranges[PROMREG_MAX];
int num_device_ranges;
unsigned int irqs[4];
int num_irqs;
};
#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev)
/* This struct describes the SBus(s) found on this machine. */
struct sbus_bus {
struct of_device ofdev;
struct sbus_dev *devices; /* Link to devices on this SBus */
struct sbus_bus *next; /* next SBus, if more than one SBus */
int prom_node; /* PROM device tree node for this SBus */
char prom_name[64]; /* Usually "sbus" or "sbi" */
int clock_freq;
struct linux_prom_ranges sbus_ranges[PROMREG_MAX];
int num_sbus_ranges;
int devid;
int board;
};
#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev)
extern struct sbus_bus *sbus_root;
static inline int
sbus_is_slave(struct sbus_dev *dev)
{
/* XXX Have to write this for sun4c's */
return 0;
}
/* Device probing routines could find these handy */
#define for_each_sbus(bus) \
for((bus) = sbus_root; (bus); (bus)=(bus)->next)
#define for_each_sbusdev(device, bus) \
for((device) = (bus)->devices; (device); (device)=(device)->next)
#define for_all_sbusdev(device, bus) \
for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \
for ((device) = (bus)->devices; (device); (device) = (device)->next)
/* Driver DVMA interfaces. */
#define sbus_can_dma_64bit(sdev) (0) /* actually, sparc_cpu_model==sun4d */
#define sbus_can_burst64(sdev) (0) /* actually, sparc_cpu_model==sun4d */
extern void sbus_set_sbus64(struct sbus_dev *, int);
extern void sbus_fill_device_irq(struct sbus_dev *);
/* These yield IOMMU mappings in consistent mode. */
extern void *sbus_alloc_consistent(struct sbus_dev *, long, u32 *dma_addrp);
extern void sbus_free_consistent(struct sbus_dev *, long, void *, u32);
void prom_adjust_ranges(struct linux_prom_ranges *, int,
struct linux_prom_ranges *, int);
#define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL
#define SBUS_DMA_TODEVICE DMA_TO_DEVICE
#define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE
#define SBUS_DMA_NONE DMA_NONE
/* All the rest use streaming mode mappings. */
extern dma_addr_t sbus_map_single(struct sbus_dev *, void *, size_t, int);
extern void sbus_unmap_single(struct sbus_dev *, dma_addr_t, size_t, int);
extern int sbus_map_sg(struct sbus_dev *, struct scatterlist *, int, int);
extern void sbus_unmap_sg(struct sbus_dev *, struct scatterlist *, int, int);
/* Finally, allow explicit synchronization of streamable mappings. */
extern void sbus_dma_sync_single_for_cpu(struct sbus_dev *, dma_addr_t, size_t, int);
#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu
extern void sbus_dma_sync_single_for_device(struct sbus_dev *, dma_addr_t, size_t, int);
extern void sbus_dma_sync_sg_for_cpu(struct sbus_dev *, struct scatterlist *, int, int);
#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu
extern void sbus_dma_sync_sg_for_device(struct sbus_dev *, struct scatterlist *, int, int);
/* Eric Brower (ebrower@usa.net)
* Translate SBus interrupt levels to ino values--
* this is used when converting sbus "interrupts" OBP
* node values to "intr" node values, and is platform
* dependent. If only we could call OBP with
* "sbus-intr>cpu (sbint -- ino)" from kernel...
* See .../drivers/sbus/sbus.c for details.
*/
BTFIXUPDEF_CALL(unsigned int, sbint_to_irq, struct sbus_dev *sdev, unsigned int)
#define sbint_to_irq(sdev, sbint) BTFIXUP_CALL(sbint_to_irq)(sdev, sbint)
extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *);
extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *);
extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *);
extern int sbus_arch_preinit(void);
extern void sbus_arch_postinit(void);
#endif /* !(_SPARC_SBUS_H) */
arch/sparc/include/asm/sbus_64.h deleted 100644 → 0
View file @ 589acce5
/* sbus.h: Defines for the Sun SBus.
*
* Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net)
*/
#ifndef _SPARC64_SBUS_H
#define _SPARC64_SBUS_H
#include <linux/dma-mapping.h>
#include <linux/ioport.h>
#include <linux/of_device.h>
#include <asm/oplib.h>
#include <asm/prom.h>
#include <asm/iommu.h>
#include <asm/scatterlist.h>
/* We scan which devices are on the SBus using the PROM node device
* tree. SBus devices are described in two different ways. You can
* either get an absolute address at which to access the device, or
* you can get a SBus 'slot' number and an offset within that slot.
*/
/* The base address at which to calculate device OBIO addresses. */
#define SUN_SBUS_BVADDR 0x00000000
#define SBUS_OFF_MASK 0x0fffffff
/* These routines are used to calculate device address from slot
* numbers + offsets, and vice versa.
*/
static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset)
{
return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset));
}
static inline int sbus_dev_slot(unsigned long dev_addr)
{
return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28);
}
struct sbus_bus;
/* Linux SBUS device tables */
struct sbus_dev {
struct of_device ofdev;
struct sbus_bus *bus;
struct sbus_dev *next;
struct sbus_dev *child;
struct sbus_dev *parent;
int prom_node;
char prom_name[64];
int slot;
struct resource resource[PROMREG_MAX];
struct linux_prom_registers reg_addrs[PROMREG_MAX];
int num_registers;
struct linux_prom_ranges device_ranges[PROMREG_MAX];
int num_device_ranges;
unsigned int irqs[4];
int num_irqs;
};
#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev)
/* This struct describes the SBus(s) found on this machine. */
struct sbus_bus {
struct of_device ofdev;
struct sbus_dev *devices; /* Tree of SBUS devices */
struct sbus_bus *next; /* Next SBUS in system */
int prom_node; /* OBP node of SBUS */
char prom_name[64]; /* Usually "sbus" or "sbi" */
int clock_freq;
struct linux_prom_ranges sbus_ranges[PROMREG_MAX];
int num_sbus_ranges;
int portid;
};
#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev)
extern struct sbus_bus *sbus_root;
/* Device probing routines could find these handy */
#define for_each_sbus(bus) \
for((bus) = sbus_root; (bus); (bus)=(bus)->next)
#define for_each_sbusdev(device, bus) \
for((device) = (bus)->devices; (device); (device)=(device)->next)
#define for_all_sbusdev(device, bus) \
for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \
for ((device) = (bus)->devices; (device); (device) = (device)->next)
/* Driver DVMA interfaces. */
#define sbus_can_dma_64bit(sdev) (1)
#define sbus_can_burst64(sdev) (1)
extern void sbus_set_sbus64(struct sbus_dev *, int);
extern void sbus_fill_device_irq(struct sbus_dev *);
static inline void *sbus_alloc_consistent(struct sbus_dev *sdev , size_t size,
dma_addr_t *dma_handle)
{
return dma_alloc_coherent(&sdev->ofdev.dev, size,
dma_handle, GFP_ATOMIC);
}
static inline void sbus_free_consistent(struct sbus_dev *sdev, size_t size,
void *vaddr, dma_addr_t dma_handle)
{
return dma_free_coherent(&sdev->ofdev.dev, size, vaddr, dma_handle);
}
#define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL
#define SBUS_DMA_TODEVICE DMA_TO_DEVICE
#define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE
#define SBUS_DMA_NONE DMA_NONE
/* All the rest use streaming mode mappings. */
static inline dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr,
size_t size, int direction)
{
return dma_map_single(&sdev->ofdev.dev, ptr, size,
(enum dma_data_direction) direction);
}
static inline void sbus_unmap_single(struct sbus_dev *sdev,
dma_addr_t dma_addr, size_t size,
int direction)
{
dma_unmap_single(&sdev->ofdev.dev, dma_addr, size,
(enum dma_data_direction) direction);
}
static inline int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg,
int nents, int direction)
{
return dma_map_sg(&sdev->ofdev.dev, sg, nents,
(enum dma_data_direction) direction);
}
static inline void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sg,
int nents, int direction)
{
dma_unmap_sg(&sdev->ofdev.dev, sg, nents,
(enum dma_data_direction) direction);
}
/* Finally, allow explicit synchronization of streamable mappings. */
static inline void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev,
dma_addr_t dma_handle,
size_t size, int direction)
{
dma_sync_single_for_cpu(&sdev->ofdev.dev, dma_handle, size,
(enum dma_data_direction) direction);
}
#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu
static inline void sbus_dma_sync_single_for_device(struct sbus_dev *sdev,
dma_addr_t dma_handle,
size_t size, int direction)
{
/* No flushing needed to sync cpu writes to the device. */
}
static inline void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev,
struct scatterlist *sg,
int nents, int direction)
{
dma_sync_sg_for_cpu(&sdev->ofdev.dev, sg, nents,
(enum dma_data_direction) direction);
}
#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu
static inline void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev,
struct scatterlist *sg,
int nents, int direction)
{
/* No flushing needed to sync cpu writes to the device. */
}
extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *);
extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *);
extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *);
extern int sbus_arch_preinit(void);
extern void sbus_arch_postinit(void);
#endif /* !(_SPARC64_SBUS_H) */
arch/sparc/include/asm/spinlock_32.h
View file @ 07104839
......@@ -6,8 +6,6 @@
#ifndef __SPARC_SPINLOCK_H
#define __SPARC_SPINLOCK_H
#include <linux/threads.h> /* For NR_CPUS */
#ifndef __ASSEMBLY__
#include <asm/psr.h>
......
arch/sparc/include/asm/spinlock_64.h
View file @ 07104839
......@@ -6,8 +6,6 @@
#ifndef __SPARC64_SPINLOCK_H
#define __SPARC64_SPINLOCK_H
#include <linux/threads.h> /* For NR_CPUS */
#ifndef __ASSEMBLY__
/* To get debugging spinlocks which detect and catch
......
arch/sparc/include/asm/sstate.h deleted 100644 → 0
View file @ 589acce5
#ifndef _SPARC64_SSTATE_H
#define _SPARC64_SSTATE_H
extern void sstate_booting(void);
extern void sstate_running(void);
extern void sstate_halt(void);
extern void sstate_poweroff(void);
extern void sstate_panic(void);
extern void sstate_reboot(void);
extern void sun4v_sstate_init(void);
#endif /* _SPARC64_SSTATE_H */
arch/sparc/include/asm/starfire.h
View file @ 07104839
......@@ -12,7 +12,6 @@
extern int this_is_starfire;
extern void check_if_starfire(void);
extern void starfire_cpu_setup(void);
extern int starfire_hard_smp_processor_id(void);
extern void starfire_hookup(int);
extern unsigned int starfire_translate(unsigned long imap, unsigned int upaid);
......
arch/sparc/include/asm/sun4paddr.h deleted 100644 → 0
View file @ 589acce5
/*
* sun4paddr.h: Various physical addresses on sun4 machines
*
* Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
* Copyright (C) 1998 Chris Davis (cdavis@cois.on.ca)
*
* Now supports more sun4's
*/
#ifndef _SPARC_SUN4PADDR_H
#define _SPARC_SUN4PADDR_H
#define SUN4_IE_PHYSADDR 0xf5000000
#define SUN4_UNUSED_PHYSADDR 0
/* these work for me */
#define SUN4_200_MEMREG_PHYSADDR 0xf4000000
#define SUN4_200_CLOCK_PHYSADDR 0xf3000000
#define SUN4_200_BWTWO_PHYSADDR 0xfd000000
#define SUN4_200_ETH_PHYSADDR 0xf6000000
#define SUN4_200_SI_PHYSADDR 0xff200000
/* these were here before */
#define SUN4_300_MEMREG_PHYSADDR 0xf4000000
#define SUN4_300_CLOCK_PHYSADDR 0xf2000000
#define SUN4_300_TIMER_PHYSADDR 0xef000000
#define SUN4_300_ETH_PHYSADDR 0xf9000000
#define SUN4_300_BWTWO_PHYSADDR 0xfb400000
#define SUN4_300_DMA_PHYSADDR 0xfa001000
#define SUN4_300_ESP_PHYSADDR 0xfa000000
/* Are these right? */
#define SUN4_400_MEMREG_PHYSADDR 0xf4000000
#define SUN4_400_CLOCK_PHYSADDR 0xf2000000
#define SUN4_400_TIMER_PHYSADDR 0xef000000
#define SUN4_400_ETH_PHYSADDR 0xf9000000
#define SUN4_400_BWTWO_PHYSADDR 0xfb400000
#define SUN4_400_DMA_PHYSADDR 0xfa001000
#define SUN4_400_ESP_PHYSADDR 0xfa000000
/*
these are the actual values set and used in the code. Unused items set
to SUN_UNUSED_PHYSADDR
*/
extern int sun4_memreg_physaddr; /* memory register (ecc?) */
extern int sun4_clock_physaddr; /* system clock */
extern int sun4_timer_physaddr; /* timer, where applicable */
extern int sun4_eth_physaddr; /* onboard ethernet (ie/le) */
extern int sun4_si_physaddr; /* sun3 scsi adapter */
extern int sun4_bwtwo_physaddr; /* onboard bw2 */
extern int sun4_dma_physaddr; /* scsi dma */
extern int sun4_esp_physaddr; /* esp scsi */
extern int sun4_ie_physaddr; /* interrupt enable */
#endif /* !(_SPARC_SUN4PADDR_H) */
arch/sparc/include/asm/sun4prom.h deleted 100644 → 0
View file @ 589acce5
/*
* sun4prom.h -- interface to sun4 PROM monitor. We don't use most of this,
* so most of these are just placeholders.
*/
#ifndef _SUN4PROM_H_
#define _SUN4PROM_H_
/*
* Although this looks similar to an romvec for a OpenProm machine, it is
* actually closer to what was used in the Sun2 and Sun3.
*
* V2 entries exist only in version 2 PROMs and later, V3 in version 3 and later.
*
* Many of the function prototypes are guesses. Some are certainly wrong.
* Use with care.
*/
typedef struct {
char *initSP; /* Initial system stack ptr */
void (*startmon)(void); /* Initial PC for hardware */
int *diagberr; /* Bus err handler for diags */
struct linux_arguments_v0 **bootParam; /* Info for bootstrapped pgm */
unsigned int *memorysize; /* Usable memory in bytes */
unsigned char (*getchar)(void); /* Get char from input device */
void (*putchar)(char); /* Put char to output device */
int (*mayget)(void); /* Maybe get char, or -1 */
int (*mayput)(int); /* Maybe put char, or -1 */
unsigned char *echo; /* Should getchar echo? */
unsigned char *insource; /* Input source selector */
unsigned char *outsink; /* Output sink selector */
int (*getkey)(void); /* Get next key if one exists */
void (*initgetkey)(void); /* Initialize get key */
unsigned int *translation; /* Kbd translation selector */
unsigned char *keybid; /* Keyboard ID byte */
int *screen_x; /* V2: Screen x pos (r/o) */
int *screen_y; /* V2: Screen y pos (r/o) */
struct keybuf *keybuf; /* Up/down keycode buffer */
char *monid; /* Monitor version ID */
void (*fbwritechar)(char); /* Write a character to FB */
int *fbAddr; /* Address of frame buffer */
char **font; /* Font table for FB */
void (*fbwritestr)(char *); /* Write string to FB */
void (*reboot)(char *); /* e.g. reboot("sd()vmlinux") */
unsigned char *linebuf; /* The line input buffer */
unsigned char **lineptr; /* Cur pointer into linebuf */
int *linesize; /* length of line in linebuf */
void (*getline)(char *); /* Get line from user */
unsigned char (*getnextchar)(void); /* Get next char from linebuf */
unsigned char (*peeknextchar)(void); /* Peek at next char */
int *fbthere; /* =1 if frame buffer there */
int (*getnum)(void); /* Grab hex num from line */
int (*printf)(char *, ...); /* See prom_printf() instead */
void (*printhex)(int); /* Format N digits in hex */
unsigned char *leds; /* RAM copy of LED register */
void (*setLEDs)(unsigned char *); /* Sets LED's and RAM copy */
void (*NMIaddr)(void *); /* Addr for level 7 vector */
void (*abortentry)(void); /* Entry for keyboard abort */
int *nmiclock; /* Counts up in msec */
int *FBtype; /* Frame buffer type */
unsigned int romvecversion; /* Version number for this romvec */
struct globram *globram; /* monitor global variables ??? */
void * kbdaddr; /* Addr of keyboard in use */
int *keyrinit; /* ms before kbd repeat */
unsigned char *keyrtick; /* ms between repetitions */
unsigned int *memoryavail; /* V1: Main mem usable size */
long *resetaddr; /* where to jump on a reset */
long *resetmap; /* pgmap entry for resetaddr */
void (*exittomon)(void); /* Exit from user program */
unsigned char **memorybitmap; /* V1: &{0 or &bits} */
void (*setcxsegmap)(int ctxt, char *va, int pmeg); /* Set seg in any context */
void (**vector_cmd)(void *); /* V2: Handler for 'v' cmd */
unsigned long *expectedtrapsig; /* V3: Location of the expected trap signal */
unsigned long *trapvectorbasetable; /* V3: Address of the trap vector table */
int unused1;
int unused2;
int unused3;
int unused4;
} linux_sun4_romvec;
extern linux_sun4_romvec *sun4_romvec;
#endif /* _SUN4PROM_H_ */
arch/sparc/include/asm/system_32.h
View file @ 07104839
......@@ -34,13 +34,7 @@ enum sparc_cpu {
extern enum sparc_cpu sparc_cpu_model;
#ifndef CONFIG_SUN4
#define ARCH_SUN4C_SUN4 (sparc_cpu_model==sun4c)
#define ARCH_SUN4 0
#else
#define ARCH_SUN4C_SUN4 1
#define ARCH_SUN4 1
#endif
#define ARCH_SUN4C (sparc_cpu_model==sun4c)
#define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */
......@@ -55,6 +49,7 @@ extern unsigned long empty_zero_page;
extern void sun_do_break(void);
extern int serial_console;
extern int stop_a_enabled;
extern int scons_pwroff;
static inline int con_is_present(void)
{
......
arch/sparc/include/asm/system_64.h
View file @ 07104839
......@@ -26,9 +26,8 @@ enum sparc_cpu {
#define sparc_cpu_model sun4u
/* This cannot ever be a sun4c nor sun4 :) That's just history. */
#define ARCH_SUN4C_SUN4 0
#define ARCH_SUN4 0
/* This cannot ever be a sun4c :) That's just history. */
#define ARCH_SUN4C 0
extern char reboot_command[];
......@@ -118,6 +117,7 @@ do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
extern void sun_do_break(void);
extern int stop_a_enabled;
extern int scons_pwroff;
extern void fault_in_user_windows(void);
extern void synchronize_user_stack(void);
......
arch/sparc/include/asm/thread_info_32.h
View file @ 07104839
......@@ -80,11 +80,7 @@ register struct thread_info *current_thread_info_reg asm("g6");
/*
* thread information allocation
*/
#if PAGE_SHIFT == 13
#define THREAD_INFO_ORDER 0
#else /* PAGE_SHIFT */
#define THREAD_INFO_ORDER 1
#endif
#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
......
arch/sparc/include/asm/timer_32.h
View file @ 07104839
......@@ -9,96 +9,9 @@
#define _SPARC_TIMER_H
#include <asm/system.h> /* For SUN4M_NCPUS */
#include <asm/sun4paddr.h>
#include <asm/btfixup.h>
/* Timer structures. The interrupt timer has two properties which
* are the counter (which is handled in do_timer in sched.c) and the limit.
* This limit is where the timer's counter 'wraps' around. Oddly enough,
* the sun4c timer when it hits the limit wraps back to 1 and not zero
* thus when calculating the value at which it will fire a microsecond you
* must adjust by one. Thanks SUN for designing such great hardware ;(
*/
/* Note that I am only going to use the timer that interrupts at
* Sparc IRQ 10. There is another one available that can fire at
* IRQ 14. Currently it is left untouched, we keep the PROM's limit
* register value and let the prom take these interrupts. This allows
* L1-A to work.
*/
struct sun4c_timer_info {
__volatile__ unsigned int cur_count10;
__volatile__ unsigned int timer_limit10;
__volatile__ unsigned int cur_count14;
__volatile__ unsigned int timer_limit14;
};
#define SUN4C_TIMER_PHYSADDR 0xf3000000
#ifdef CONFIG_SUN4
#define SUN_TIMER_PHYSADDR SUN4_300_TIMER_PHYSADDR
#else
#define SUN_TIMER_PHYSADDR SUN4C_TIMER_PHYSADDR
#endif
/* A sun4m has two blocks of registers which are probably of the same
* structure. LSI Logic's L64851 is told to _decrement_ from the limit
* value. Aurora behaves similarly but its limit value is compacted in
* other fashion (it's wider). Documented fields are defined here.
*/
/* As with the interrupt register, we have two classes of timer registers
* which are per-cpu and master. Per-cpu timers only hit that cpu and are
* only level 14 ticks, master timer hits all cpus and is level 10.
*/
#define SUN4M_PRM_CNT_L 0x80000000
#define SUN4M_PRM_CNT_LVALUE 0x7FFFFC00
struct sun4m_timer_percpu_info {
__volatile__ unsigned int l14_timer_limit; /* Initial value is 0x009c4000 */
__volatile__ unsigned int l14_cur_count;
/* This register appears to be write only and/or inaccessible
* on Uni-Processor sun4m machines.
*/
__volatile__ unsigned int l14_limit_noclear; /* Data access error is here */
__volatile__ unsigned int cntrl; /* =1 after POST on Aurora */
__volatile__ unsigned char space[PAGE_SIZE - 16];
};
struct sun4m_timer_regs {
struct sun4m_timer_percpu_info cpu_timers[SUN4M_NCPUS];
volatile unsigned int l10_timer_limit;
volatile unsigned int l10_cur_count;
/* Again, this appears to be write only and/or inaccessible
* on uni-processor sun4m machines.
*/
volatile unsigned int l10_limit_noclear;
/* This register too, it must be magic. */
volatile unsigned int foobar;
volatile unsigned int cfg; /* equals zero at boot time... */
};
#define SUN4D_PRM_CNT_L 0x80000000
#define SUN4D_PRM_CNT_LVALUE 0x7FFFFC00
struct sun4d_timer_regs {
volatile unsigned int l10_timer_limit;
volatile unsigned int l10_cur_countx;
volatile unsigned int l10_limit_noclear;
volatile unsigned int ctrl;
volatile unsigned int l10_cur_count;
};
extern struct sun4d_timer_regs *sun4d_timers;
extern __volatile__ unsigned int *master_l10_counter;
extern __volatile__ unsigned int *master_l10_limit;
/* FIXME: Make do_[gs]ettimeofday btfixup calls */
BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv)
......
arch/sparc/include/asm/vac-ops.h
View file @ 07104839
......@@ -76,11 +76,7 @@
* cacheable bit in the pte's of all such pages.
*/
#ifdef CONFIG_SUN4
#define S4CVAC_BADBITS 0x0001e000
#else
#define S4CVAC_BADBITS 0x0000f000
#endif
/* The following is true if vaddr1 and vaddr2 would cause
* a 'bad alias'.
......@@ -94,10 +90,7 @@
*/
struct sun4c_vac_props {
unsigned int num_bytes; /* Size of the cache */
unsigned int num_lines; /* Number of cache lines */
unsigned int do_hwflushes; /* Hardware flushing available? */
enum { VAC_NONE, VAC_WRITE_THROUGH,
VAC_WRITE_BACK } type; /* What type of VAC? */
unsigned int linesize; /* Size of each line in bytes */
unsigned int log2lsize; /* log2(linesize) */
unsigned int on; /* VAC is enabled */
......
arch/sparc/include/asm/vfc_ioctls.h deleted 100644 → 0
View file @ 589acce5
/* Copyright (c) 1996 by Manish Vachharajani */
#ifndef _LINUX_VFC_IOCTLS_H_
#define _LINUX_VFC_IOCTLS_H_
/* IOCTLs */
#define VFC_IOCTL(a) (('j' << 8) | a)
#define VFCGCTRL (VFC_IOCTL (0)) /* get vfc attributes */
#define VFCSCTRL (VFC_IOCTL (1)) /* set vfc attributes */
#define VFCGVID (VFC_IOCTL (2)) /* get video decoder attributes */
#define VFCSVID (VFC_IOCTL (3)) /* set video decoder attributes */
#define VFCHUE (VFC_IOCTL (4)) /* set hue */
#define VFCPORTCHG (VFC_IOCTL (5)) /* change port */
#define VFCRDINFO (VFC_IOCTL (6)) /* read info */
/* Options for setting the vfc attributes and status */
#define MEMPRST 0x1 /* reset FIFO ptr. */
#define CAPTRCMD 0x2 /* start capture and wait */
#define DIAGMODE 0x3 /* diag mode */
#define NORMMODE 0x4 /* normal mode */
#define CAPTRSTR 0x5 /* start capture */
#define CAPTRWAIT 0x6 /* wait for capture to finish */
/* Options for the decoder */
#define STD_NTSC 0x1 /* NTSC mode */
#define STD_PAL 0x2 /* PAL mode */
#define COLOR_ON 0x3 /* force color ON */
#define MONO 0x4 /* force color OFF */
/* Values returned by ioctl 2 */
#define NO_LOCK 1
#define NTSC_COLOR 2
#define NTSC_NOCOLOR 3
#define PAL_COLOR 4
#define PAL_NOCOLOR 5
/* Not too sure what this does yet */
/* Options for setting Field number */
#define ODD_FIELD 0x1
#define EVEN_FIELD 0x0
#define ACTIVE_ONLY 0x2
#define NON_ACTIVE 0x0
/* Debug options */
#define VFC_I2C_SEND 0
#define VFC_I2C_RECV 1
struct vfc_debug_inout
{
unsigned long addr;
unsigned long ret;
unsigned long len;
unsigned char __user *buffer;
};
#endif /* _LINUX_VFC_IOCTLS_H_ */
arch/sparc/include/asm/visasm.h
View file @ 07104839
......@@ -57,6 +57,7 @@ static inline void save_and_clear_fpu(void) {
" " : : "i" (FPRS_FEF|FPRS_DU) :
"o5", "g1", "g2", "g3", "g7", "cc");
}
extern int vis_emul(struct pt_regs *, unsigned int);
#endif
#endif /* _SPARC64_ASI_H */
arch/sparc/kernel/Makefile
View file @ 07104839
......@@ -13,15 +13,13 @@ obj-y := entry.o wof.o wuf.o etrap.o rtrap.o traps.o $(IRQ_OBJS) \
time.o windows.o cpu.o devices.o \
tadpole.o tick14.o ptrace.o \
unaligned.o una_asm.o muldiv.o \
prom.o of_device.o devres.o
prom.o of_device.o devres.o dma.o
devres-y = ../../../kernel/irq/devres.o
obj-$(CONFIG_PCI) += pcic.o
obj-$(CONFIG_SUN4) += sun4setup.o
obj-$(CONFIG_SMP) += trampoline.o smp.o sun4m_smp.o sun4d_smp.o
obj-$(CONFIG_SUN_AUXIO) += auxio.o
obj-$(CONFIG_PCI) += ebus.o
obj-$(CONFIG_SUN_PM) += apc.o pmc.o
obj-$(CONFIG_MODULES) += module.o sparc_ksyms.o
obj-$(CONFIG_SPARC_LED) += led.o
......
arch/sparc/kernel/apc.c
View file @ 07104839
......@@ -12,9 +12,10 @@
#include <linux/miscdevice.h>
#include <linux/smp_lock.h>
#include <linux/pm.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <asm/io.h>
#include <asm/sbus.h>
#include <asm/oplib.h>
#include <asm/uaccess.h>
#include <asm/auxio.h>
......@@ -29,11 +30,10 @@
#define APC_OBPNAME "power-management"
#define APC_DEVNAME "apc"
volatile static u8 __iomem *regs;
static int apc_regsize;
static u8 __iomem *regs;
static int apc_no_idle __initdata = 0;
#define apc_readb(offs) (sbus_readb(regs+offs))
#define apc_readb(offs) (sbus_readb(regs+offs))
#define apc_writeb(val, offs) (sbus_writeb(val, regs+offs))
/* Specify "apc=noidle" on the kernel command line to
......@@ -69,9 +69,9 @@ static void apc_swift_idle(void)
#endif
}
static inline void apc_free(void)
static inline void apc_free(struct of_device *op)
{
sbus_iounmap(regs, apc_regsize);
of_iounmap(&op->resource[0], regs, resource_size(&op->resource[0]));
}
static int apc_open(struct inode *inode, struct file *f)
......@@ -153,52 +153,56 @@ static const struct file_operations apc_fops = {
static struct miscdevice apc_miscdev = { APC_MINOR, APC_DEVNAME, &apc_fops };
static int __init apc_probe(void)
static int __devinit apc_probe(struct of_device *op,
const struct of_device_id *match)
{
struct sbus_bus *sbus = NULL;
struct sbus_dev *sdev = NULL;
int iTmp = 0;
for_each_sbus(sbus) {
for_each_sbusdev(sdev, sbus) {
if (!strcmp(sdev->prom_name, APC_OBPNAME)) {
goto sbus_done;
}
}
}
int err;
sbus_done:
if (!sdev) {
return -ENODEV;
}
apc_regsize = sdev->reg_addrs[0].reg_size;
regs = sbus_ioremap(&sdev->resource[0], 0,
apc_regsize, APC_OBPNAME);
if(!regs) {
regs = of_ioremap(&op->resource[0], 0,
resource_size(&op->resource[0]), APC_OBPNAME);
if (!regs) {
printk(KERN_ERR "%s: unable to map registers\n", APC_DEVNAME);
return -ENODEV;
}
iTmp = misc_register(&apc_miscdev);
if (iTmp != 0) {
err = misc_register(&apc_miscdev);
if (err) {
printk(KERN_ERR "%s: unable to register device\n", APC_DEVNAME);
apc_free();
apc_free(op);
return -ENODEV;
}
/* Assign power management IDLE handler */
if(!apc_no_idle)
if (!apc_no_idle)
pm_idle = apc_swift_idle;
printk(KERN_INFO "%s: power management initialized%s\n",
APC_DEVNAME, apc_no_idle ? " (CPU idle disabled)" : "");
APC_DEVNAME, apc_no_idle ? " (CPU idle disabled)" : "");
return 0;
}
static struct of_device_id __initdata apc_match[] = {
{
.name = APC_OBPNAME,
},
{},
};
MODULE_DEVICE_TABLE(of, apc_match);
static struct of_platform_driver apc_driver = {
.name = "apc",
.match_table = apc_match,
.probe = apc_probe,
};
static int __init apc_init(void)
{
return of_register_driver(&apc_driver, &of_bus_type);
}
/* This driver is not critical to the boot process
* and is easiest to ioremap when SBus is already
* initialized, so we install ourselves thusly:
*/
__initcall(apc_probe);
__initcall(apc_init);
arch/sparc/kernel/auxio.c
View file @ 07104839
......@@ -6,6 +6,8 @@
#include <linux/stddef.h>
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <asm/oplib.h>
#include <asm/io.h>
#include <asm/auxio.h>
......@@ -59,7 +61,7 @@ void __init auxio_probe(void)
r.flags = auxregs[0].which_io & 0xF;
r.start = auxregs[0].phys_addr;
r.end = auxregs[0].phys_addr + auxregs[0].reg_size - 1;
auxio_register = sbus_ioremap(&r, 0, auxregs[0].reg_size, "auxio");
auxio_register = of_ioremap(&r, 0, auxregs[0].reg_size, "auxio");
/* Fix the address on sun4m and sun4c. */
if((((unsigned long) auxregs[0].phys_addr) & 3) == 3 ||
sparc_cpu_model == sun4c)
......@@ -128,7 +130,7 @@ void __init auxio_power_probe(void)
r.flags = regs.which_io & 0xF;
r.start = regs.phys_addr;
r.end = regs.phys_addr + regs.reg_size - 1;
auxio_power_register = (unsigned char *) sbus_ioremap(&r, 0,
auxio_power_register = (unsigned char *) of_ioremap(&r, 0,
regs.reg_size, "auxpower");
/* Display a quick message on the console. */
......
arch/sparc/kernel/devices.c
View file @ 07104839
......@@ -143,7 +143,7 @@ void __init device_scan(void)
#endif
clock_stop_probe();
if (ARCH_SUN4C_SUN4)
if (ARCH_SUN4C)
sun4c_probe_memerr_reg();
return;
......
arch/sparc/kernel/dma.c 0 → 100644
View file @ 07104839
/* dma.c: PCI and SBUS DMA accessors for 32-bit sparc.
*
* Copyright (C) 2008 David S. Miller <davem@davemloft.net>
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/dma-mapping.h>
#include <linux/scatterlist.h>
#include <linux/mm.h>
#ifdef CONFIG_PCI
#include <linux/pci.h>
#endif
#include "dma.h"
int dma_supported(struct device *dev, u64 mask)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type)
return pci_dma_supported(to_pci_dev(dev), mask);
#endif
return 0;
}
EXPORT_SYMBOL(dma_supported);
int dma_set_mask(struct device *dev, u64 dma_mask)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type)
return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
#endif
return -EOPNOTSUPP;
}
EXPORT_SYMBOL(dma_set_mask);
void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t flag)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type)
return pci_alloc_consistent(to_pci_dev(dev), size, dma_handle);
#endif
return sbus_alloc_consistent(dev, size, dma_handle);
}
EXPORT_SYMBOL(dma_alloc_coherent);
void dma_free_coherent(struct device *dev, size_t size,
void *cpu_addr, dma_addr_t dma_handle)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type) {
pci_free_consistent(to_pci_dev(dev), size,
cpu_addr, dma_handle);
return;
}
#endif
sbus_free_consistent(dev, size, cpu_addr, dma_handle);
}
EXPORT_SYMBOL(dma_free_coherent);
dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
size_t size, enum dma_data_direction direction)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type)
return pci_map_single(to_pci_dev(dev), cpu_addr,
size, (int)direction);
#endif
return sbus_map_single(dev, cpu_addr, size, (int)direction);
}
EXPORT_SYMBOL(dma_map_single);
void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
size_t size,
enum dma_data_direction direction)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type) {
pci_unmap_single(to_pci_dev(dev), dma_addr,
size, (int)direction);
return;
}
#endif
sbus_unmap_single(dev, dma_addr, size, (int)direction);
}
EXPORT_SYMBOL(dma_unmap_single);
dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type)
return pci_map_page(to_pci_dev(dev), page, offset,
size, (int)direction);
#endif
return sbus_map_single(dev, page_address(page) + offset,
size, (int)direction);
}
EXPORT_SYMBOL(dma_map_page);
void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
size_t size, enum dma_data_direction direction)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type) {
pci_unmap_page(to_pci_dev(dev), dma_address,
size, (int)direction);
return;
}
#endif
sbus_unmap_single(dev, dma_address, size, (int)direction);
}
EXPORT_SYMBOL(dma_unmap_page);
int dma_map_sg(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction direction)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type)
return pci_map_sg(to_pci_dev(dev), sg, nents, (int)direction);
#endif
return sbus_map_sg(dev, sg, nents, direction);
}
EXPORT_SYMBOL(dma_map_sg);
void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction direction)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type) {
pci_unmap_sg(to_pci_dev(dev), sg, nents, (int)direction);
return;
}
#endif
sbus_unmap_sg(dev, sg, nents, (int)direction);
}
EXPORT_SYMBOL(dma_unmap_sg);
void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
size_t size, enum dma_data_direction direction)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type) {
pci_dma_sync_single_for_cpu(to_pci_dev(dev), dma_handle,
size, (int)direction);
return;
}
#endif
sbus_dma_sync_single_for_cpu(dev, dma_handle, size, (int) direction);
}
EXPORT_SYMBOL(dma_sync_single_for_cpu);
void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
size_t size, enum dma_data_direction direction)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type) {
pci_dma_sync_single_for_device(to_pci_dev(dev), dma_handle,
size, (int)direction);
return;
}
#endif
sbus_dma_sync_single_for_device(dev, dma_handle, size, (int) direction);
}
EXPORT_SYMBOL(dma_sync_single_for_device);
void dma_sync_single_range_for_cpu(struct device *dev,
dma_addr_t dma_handle,
unsigned long offset,
size_t size,
enum dma_data_direction direction)
{
dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction);
}
EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
dma_sync_single_for_device(dev, dma_handle+offset, size, direction);
}
EXPORT_SYMBOL(dma_sync_single_range_for_device);
void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
int nelems, enum dma_data_direction direction)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type) {
pci_dma_sync_sg_for_cpu(to_pci_dev(dev), sg,
nelems, (int)direction);
return;
}
#endif
BUG();
}
EXPORT_SYMBOL(dma_sync_sg_for_cpu);
void dma_sync_sg_for_device(struct device *dev,
struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
#ifdef CONFIG_PCI
if (dev->bus == &pci_bus_type) {
pci_dma_sync_sg_for_device(to_pci_dev(dev), sg,
nelems, (int)direction);
return;
}
#endif
BUG();
}
EXPORT_SYMBOL(dma_sync_sg_for_device);
int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
return (dma_addr == DMA_ERROR_CODE);
}
EXPORT_SYMBOL(dma_mapping_error);
int dma_get_cache_alignment(void)
{
return 32;
}
EXPORT_SYMBOL(dma_get_cache_alignment);
arch/sparc/kernel/dma.h 0 → 100644
View file @ 07104839
void *sbus_alloc_consistent(struct device *dev, long len, u32 *dma_addrp);
void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba);
dma_addr_t sbus_map_single(struct device *dev, void *va,
size_t len, int direction);
void sbus_unmap_single(struct device *dev, dma_addr_t ba,
size_t n, int direction);
int sbus_map_sg(struct device *dev, struct scatterlist *sg,
int n, int direction);
void sbus_unmap_sg(struct device *dev, struct scatterlist *sg,
int n, int direction);
void sbus_dma_sync_single_for_cpu(struct device *dev, dma_addr_t ba,
size_t size, int direction);
void sbus_dma_sync_single_for_device(struct device *dev, dma_addr_t ba,
size_t size, int direction);
arch/sparc/kernel/ebus.c deleted 100644 → 0
View file @ 589acce5
/*
* ebus.c: PCI to EBus bridge device.
*
* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
*
* Adopted for sparc by V. Roganov and G. Raiko.
* Fixes for different platforms by Pete Zaitcev.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <asm/system.h>
#include <asm/page.h>
#include <asm/pbm.h>
#include <asm/ebus.h>
#include <asm/io.h>
#include <asm/oplib.h>
#include <asm/prom.h>
#include <asm/bpp.h>
struct linux_ebus *ebus_chain = NULL;
/* We are together with pcic.c under CONFIG_PCI. */
extern unsigned int pcic_pin_to_irq(unsigned int, const char *name);
/*
* IRQ Blacklist
* Here we list PROMs and systems that are known to supply crap as IRQ numbers.
*/
struct ebus_device_irq {
char *name;
unsigned int pin;
};
struct ebus_system_entry {
char *esname;
struct ebus_device_irq *ipt;
};
static struct ebus_device_irq je1_1[] = {
{ "8042", 3 },
{ "SUNW,CS4231", 0 },
{ "parallel", 0 },
{ "se", 2 },
{ NULL, 0 }
};
/*
* Gleb's JE1 supplied reasonable pin numbers, but mine did not (OBP 2.32).
* Blacklist the sucker... Note that Gleb's system will work.
*/
static struct ebus_system_entry ebus_blacklist[] = {
{ "SUNW,JavaEngine1", je1_1 },
{ NULL, NULL }
};
static struct ebus_device_irq *ebus_blackp = NULL;
/*
*/
static inline unsigned long ebus_alloc(size_t size)
{
return (unsigned long)kmalloc(size, GFP_ATOMIC);
}
/*
*/
static int __init ebus_blacklist_irq(const char *name)
{
struct ebus_device_irq *dp;
if ((dp = ebus_blackp) != NULL) {
for (; dp->name != NULL; dp++) {
if (strcmp(name, dp->name) == 0) {
return pcic_pin_to_irq(dp->pin, name);
}
}
}
return 0;
}
static void __init fill_ebus_child(struct device_node *dp,
struct linux_ebus_child *dev)
{
const int *regs;
const int *irqs;
int i, len;
dev->prom_node = dp;
regs = of_get_property(dp, "reg", &len);
if (!regs)
len = 0;
dev->num_addrs = len / sizeof(regs[0]);
for (i = 0; i < dev->num_addrs; i++) {
if (regs[i] >= dev->parent->num_addrs) {
prom_printf("UGH: property for %s was %d, need < %d\n",
dev->prom_node->name, len,
dev->parent->num_addrs);
panic(__func__);
}
/* XXX resource */
dev->resource[i].start =
dev->parent->resource[regs[i]].start;
}
for (i = 0; i < PROMINTR_MAX; i++)
dev->irqs[i] = PCI_IRQ_NONE;
if ((dev->irqs[0] = ebus_blacklist_irq(dev->prom_node->name)) != 0) {
dev->num_irqs = 1;
} else {
irqs = of_get_property(dp, "interrupts", &len);
if (!irqs) {
dev->num_irqs = 0;
dev->irqs[0] = 0;
if (dev->parent->num_irqs != 0) {
dev->num_irqs = 1;
dev->irqs[0] = dev->parent->irqs[0];
}
} else {
dev->num_irqs = len / sizeof(irqs[0]);
if (irqs[0] == 0 || irqs[0] >= 8) {
/*
* XXX Zero is a valid pin number...
* This works as long as Ebus is not wired
* to INTA#.
*/
printk("EBUS: %s got bad irq %d from PROM\n",
dev->prom_node->name, irqs[0]);
dev->num_irqs = 0;
dev->irqs[0] = 0;
} else {
dev->irqs[0] =
pcic_pin_to_irq(irqs[0],
dev->prom_node->name);
}
}
}
}
static void __init fill_ebus_device(struct device_node *dp,
struct linux_ebus_device *dev)
{
const struct linux_prom_registers *regs;
struct linux_ebus_child *child;
struct dev_archdata *sd;
const int *irqs;
int i, n, len;
unsigned long baseaddr;
dev->prom_node = dp;
regs = of_get_property(dp, "reg", &len);
if (!regs)
len = 0;
if (len % sizeof(struct linux_prom_registers)) {
prom_printf("UGH: proplen for %s was %d, need multiple of %d\n",
dev->prom_node->name, len,
(int)sizeof(struct linux_prom_registers));
panic(__func__);
}
dev->num_addrs = len / sizeof(struct linux_prom_registers);
for (i = 0; i < dev->num_addrs; i++) {
/*
* XXX Collect JE-1 PROM
*
* Example - JS-E with 3.11:
* /ebus
* regs
* 0x00000000, 0x0, 0x00000000, 0x0, 0x00000000,
* 0x82000010, 0x0, 0xf0000000, 0x0, 0x01000000,
* 0x82000014, 0x0, 0x38800000, 0x0, 0x00800000,
* ranges
* 0x00, 0x00000000, 0x02000010, 0x0, 0x0, 0x01000000,
* 0x01, 0x01000000, 0x02000014, 0x0, 0x0, 0x00800000,
* /ebus/8042
* regs
* 0x00000001, 0x00300060, 0x00000008,
* 0x00000001, 0x00300060, 0x00000008,
*/
n = regs[i].which_io;
if (n >= 4) {
/* XXX This is copied from old JE-1 by Gleb. */
n = (regs[i].which_io - 0x10) >> 2;
} else {
;
}
/*
* XXX Now as we have regions, why don't we make an on-demand allocation...
*/
dev->resource[i].start = 0;
if ((baseaddr = dev->bus->self->resource[n].start +
regs[i].phys_addr) != 0) {
/* dev->resource[i].name = dev->prom_name; */
if ((baseaddr = (unsigned long) ioremap(baseaddr,
regs[i].reg_size)) == 0) {
panic("ebus: unable to remap dev %s",
dev->prom_node->name);
}
}
dev->resource[i].start = baseaddr; /* XXX Unaligned */
}
for (i = 0; i < PROMINTR_MAX; i++)
dev->irqs[i] = PCI_IRQ_NONE;
if ((dev->irqs[0] = ebus_blacklist_irq(dev->prom_node->name)) != 0) {
dev->num_irqs = 1;
} else {
irqs = of_get_property(dp, "interrupts", &len);
if (!irqs) {
dev->num_irqs = 0;
if ((dev->irqs[0] = dev->bus->self->irq) != 0) {
dev->num_irqs = 1;
/* P3 */ /* printk("EBUS: child %s irq %d from parent\n", dev->prom_name, dev->irqs[0]); */
}
} else {
dev->num_irqs = 1; /* dev->num_irqs = len / sizeof(irqs[0]); */
if (irqs[0] == 0 || irqs[0] >= 8) {
/* See above for the parent. XXX */
printk("EBUS: %s got bad irq %d from PROM\n",
dev->prom_node->name, irqs[0]);
dev->num_irqs = 0;
dev->irqs[0] = 0;
} else {
dev->irqs[0] =
pcic_pin_to_irq(irqs[0],
dev->prom_node->name);
}
}
}
sd = &dev->ofdev.dev.archdata;
sd->prom_node = dp;
sd->op = &dev->ofdev;
sd->iommu = dev->bus->ofdev.dev.parent->archdata.iommu;
dev->ofdev.node = dp;
dev->ofdev.dev.parent = &dev->bus->ofdev.dev;
dev->ofdev.dev.bus = &ebus_bus_type;
sprintf(dev->ofdev.dev.bus_id, "ebus[%08x]", dp->node);
/* Register with core */
if (of_device_register(&dev->ofdev) != 0)
printk(KERN_DEBUG "ebus: device registration error for %s!\n",
dp->path_component_name);
if ((dp = dp->child) != NULL) {
dev->children = (struct linux_ebus_child *)
ebus_alloc(sizeof(struct linux_ebus_child));
child = dev->children;
child->next = NULL;
child->parent = dev;
child->bus = dev->bus;
fill_ebus_child(dp, child);
while ((dp = dp->sibling) != NULL) {
child->next = (struct linux_ebus_child *)
ebus_alloc(sizeof(struct linux_ebus_child));
child = child->next;
child->next = NULL;
child->parent = dev;
child->bus = dev->bus;
fill_ebus_child(dp, child);
}
}
}
void __init ebus_init(void)
{
const struct linux_prom_pci_registers *regs;
struct linux_pbm_info *pbm;
struct linux_ebus_device *dev;
struct linux_ebus *ebus;
struct ebus_system_entry *sp;
struct pci_dev *pdev;
struct pcidev_cookie *cookie;
struct device_node *dp;
struct resource *p;
unsigned short pci_command;
int len, reg, nreg;
int num_ebus = 0;
dp = of_find_node_by_path("/");
for (sp = ebus_blacklist; sp->esname != NULL; sp++) {
if (strcmp(dp->name, sp->esname) == 0) {
ebus_blackp = sp->ipt;
break;
}
}
pdev = pci_get_device(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_EBUS, NULL);
if (!pdev)
return;
cookie = pdev->sysdata;
dp = cookie->prom_node;
ebus_chain = ebus = (struct linux_ebus *)
ebus_alloc(sizeof(struct linux_ebus));
ebus->next = NULL;
while (dp) {
struct device_node *nd;
ebus->prom_node = dp;
ebus->self = pdev;
ebus->parent = pbm = cookie->pbm;
/* Enable BUS Master. */
pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
pci_command |= PCI_COMMAND_MASTER;
pci_write_config_word(pdev, PCI_COMMAND, pci_command);
regs = of_get_property(dp, "reg", &len);
if (!regs) {
prom_printf("%s: can't find reg property\n",
__func__);
prom_halt();
}
nreg = len / sizeof(struct linux_prom_pci_registers);
p = &ebus->self->resource[0];
for (reg = 0; reg < nreg; reg++) {
if (!(regs[reg].which_io & 0x03000000))
continue;
(p++)->start = regs[reg].phys_lo;
}
ebus->ofdev.node = dp;
ebus->ofdev.dev.parent = &pdev->dev;
ebus->ofdev.dev.bus = &ebus_bus_type;
sprintf(ebus->ofdev.dev.bus_id, "ebus%d", num_ebus);
/* Register with core */
if (of_device_register(&ebus->ofdev) != 0)
printk(KERN_DEBUG "ebus: device registration error for %s!\n",
dp->path_component_name);
nd = dp->child;
if (!nd)
goto next_ebus;
ebus->devices = (struct linux_ebus_device *)
ebus_alloc(sizeof(struct linux_ebus_device));
dev = ebus->devices;
dev->next = NULL;
dev->children = NULL;
dev->bus = ebus;
fill_ebus_device(nd, dev);
while ((nd = nd->sibling) != NULL) {
dev->next = (struct linux_ebus_device *)
ebus_alloc(sizeof(struct linux_ebus_device));
dev = dev->next;
dev->next = NULL;
dev->children = NULL;
dev->bus = ebus;
fill_ebus_device(nd, dev);
}
next_ebus:
pdev = pci_get_device(PCI_VENDOR_ID_SUN,
PCI_DEVICE_ID_SUN_EBUS, pdev);
if (!pdev)
break;
cookie = pdev->sysdata;
dp = cookie->prom_node;
ebus->next = (struct linux_ebus *)
ebus_alloc(sizeof(struct linux_ebus));
ebus = ebus->next;
ebus->next = NULL;
++num_ebus;
}
if (pdev)
pci_dev_put(pdev);
}
arch/sparc/kernel/entry.S
View file @ 07104839
......@@ -20,11 +20,7 @@
#include <asm/memreg.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#ifdef CONFIG_SUN4
#include <asm/pgtsun4.h>
#else
#include <asm/pgtsun4c.h>
#endif
#include <asm/winmacro.h>
#include <asm/signal.h>
#include <asm/obio.h>
......@@ -276,17 +272,18 @@ smp4m_ticker:
*/
maybe_smp4m_msg:
GET_PROCESSOR4M_ID(o3)
set sun4m_interrupts, %l5
ld [%l5], %o5
sethi %hi(sun4m_irq_percpu), %l5
sll %o3, 2, %o3
or %l5, %lo(sun4m_irq_percpu), %o5
sethi %hi(0x40000000), %o2
sll %o3, 12, %o3
ld [%o5 + %o3], %o1
andcc %o1, %o2, %g0
ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
andcc %o3, %o2, %g0
be,a smp4m_ticker
cmp %l7, 14
st %o2, [%o5 + 0x4]
st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x40000000
WRITE_PAUSE
ld [%o5], %g0
ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
WRITE_PAUSE
or %l0, PSR_PIL, %l4
wr %l4, 0x0, %psr
......@@ -304,16 +301,16 @@ linux_trap_ipi15_sun4m:
SAVE_ALL
sethi %hi(0x80000000), %o2
GET_PROCESSOR4M_ID(o0)
set sun4m_interrupts, %l5
ld [%l5], %o5
sll %o0, 12, %o0
add %o5, %o0, %o5
ld [%o5], %o3
sethi %hi(sun4m_irq_percpu), %l5
or %l5, %lo(sun4m_irq_percpu), %o5
sll %o0, 2, %o0
ld [%o5 + %o0], %o5
ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
andcc %o3, %o2, %g0
be 1f ! Must be an NMI async memory error
st %o2, [%o5 + 4]
st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
WRITE_PAUSE
ld [%o5], %g0
ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
WRITE_PAUSE
or %l0, PSR_PIL, %l4
wr %l4, 0x0, %psr
......@@ -327,12 +324,11 @@ linux_trap_ipi15_sun4m:
1:
/* NMI async memory error handling. */
sethi %hi(0x80000000), %l4
sethi %hi(0x4000), %o3
sub %o5, %o0, %o5
add %o5, %o3, %l5
st %l4, [%l5 + 0xc]
sethi %hi(sun4m_irq_global), %o5
ld [%o5 + %lo(sun4m_irq_global)], %l5
st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
WRITE_PAUSE
ld [%l5], %g0
ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
WRITE_PAUSE
or %l0, PSR_PIL, %l4
wr %l4, 0x0, %psr
......@@ -341,9 +337,9 @@ linux_trap_ipi15_sun4m:
WRITE_PAUSE
call sun4m_nmi
nop
st %l4, [%l5 + 0x8]
st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
WRITE_PAUSE
ld [%l5], %g0
ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
WRITE_PAUSE
RESTORE_ALL
......@@ -775,11 +771,7 @@ vac_linesize_patch_32: subcc %l7, 32, %l7
* Ugly, but we cant use hardware flushing on the sun4 and we'd require
* two instructions (Anton)
*/
#ifdef CONFIG_SUN4
vac_hwflush_patch1_on: nop
#else
vac_hwflush_patch1_on: addcc %l7, -PAGE_SIZE, %l7
#endif
vac_hwflush_patch2_on: sta %g0, [%l3 + %l7] ASI_HWFLUSHSEG
......@@ -798,42 +790,10 @@ vac_hwflush_patch2_on: sta %g0, [%l3 + %l7] ASI_HWFLUSHSEG
! %l7 = 1 for textfault
! We want error in %l5, vaddr in %l6
sun4c_fault:
#ifdef CONFIG_SUN4
sethi %hi(sun4c_memerr_reg), %l4
ld [%l4+%lo(sun4c_memerr_reg)], %l4 ! memerr ctrl reg addr
ld [%l4], %l6 ! memerr ctrl reg
ld [%l4 + 4], %l5 ! memerr vaddr reg
andcc %l6, 0x80, %g0 ! check for error type
st %g0, [%l4 + 4] ! clear the error
be 0f ! normal error
sethi %hi(AC_BUS_ERROR), %l4 ! bus err reg addr
call prom_halt ! something weird happened
! what exactly did happen?
! what should we do here?
0: or %l4, %lo(AC_BUS_ERROR), %l4 ! bus err reg addr
lduba [%l4] ASI_CONTROL, %l6 ! bus err reg
cmp %l7, 1 ! text fault?
be 1f ! yes
nop
ld [%l1], %l4 ! load instruction that caused fault
srl %l4, 21, %l4
andcc %l4, 1, %g0 ! store instruction?
be 1f ! no
sethi %hi(SUN4C_SYNC_BADWRITE), %l4 ! yep
! %lo(SUN4C_SYNC_BADWRITE) = 0
or %l4, %l6, %l6 ! set write bit to emulate sun4c
1:
#else
sethi %hi(AC_SYNC_ERR), %l4
add %l4, 0x4, %l6 ! AC_SYNC_VA in %l6
lda [%l6] ASI_CONTROL, %l5 ! Address
lda [%l4] ASI_CONTROL, %l6 ! Error, retained for a bit
#endif
andn %l5, 0xfff, %l5 ! Encode all info into l7
srl %l6, 14, %l4
......@@ -880,12 +840,7 @@ sun4c_fault:
or %l4, %lo(swapper_pg_dir), %l4
sll %l6, 2, %l6
ld [%l4 + %l6], %l4
#ifdef CONFIG_SUN4
sethi %hi(PAGE_MASK), %l6
andcc %l4, %l6, %g0
#else
andcc %l4, PAGE_MASK, %g0
#endif
be sun4c_fault_fromuser
lduXa [%l5] ASI_SEGMAP, %l4
......@@ -937,11 +892,7 @@ invalid_segment_patch1:
ld [%l6 + 0x08], %l3 ! tmp = entry->vaddr
! Flush segment from the cache.
#ifdef CONFIG_SUN4
sethi %hi((128 * 1024)), %l7
#else
sethi %hi((64 * 1024)), %l7
#endif
9:
vac_hwflush_patch1:
vac_linesize_patch:
......@@ -1029,12 +980,7 @@ invalid_segment_patch2:
or %l4, %lo(swapper_pg_dir), %l4
sll %l3, 2, %l3
ld [%l4 + %l3], %l4
#ifndef CONFIG_SUN4
and %l4, PAGE_MASK, %l4
#else
sethi %hi(PAGE_MASK), %l6
and %l4, %l6, %l4
#endif
srl %l5, (PAGE_SHIFT - 2), %l6
and %l6, ((SUN4C_PTRS_PER_PTE - 1) << 2), %l6
......
arch/sparc/kernel/head.S
View file @ 07104839
......@@ -63,15 +63,9 @@ cputypvar_sun4m:
.align 4
#ifndef CONFIG_SUN4
sun4_notsup:
.asciz "Sparc-Linux sun4 needs a specially compiled kernel, turn CONFIG_SUN4 on.\n\n"
.asciz "Sparc-Linux sun4 support does no longer exist.\n\n"
.align 4
#else
sun4cdm_notsup:
.asciz "Kernel compiled with CONFIG_SUN4 cannot run on SUN4C/SUN4M/SUN4D\nTurn CONFIG_SUN4 off.\n\n"
.align 4
#endif
sun4e_notsup:
.asciz "Sparc-Linux sun4e support does not exist\n\n"
......@@ -780,15 +774,6 @@ execute_in_high_mem:
nop
found_version:
#ifdef CONFIG_SUN4
/* For people who try sun4 kernels, even if Configure.help advises them. */
ld [%g7 + 0x68], %o1
set sun4cdm_notsup, %o0
call %o1
nop
b halt_me
nop
#endif
/* Get the machine type via the mysterious romvec node operations. */
add %g7, 0x1c, %l1
......@@ -1150,15 +1135,6 @@ sun4c_continue_boot:
nop
sun4_init:
#ifdef CONFIG_SUN4
/* There, happy now Adrian? */
set cputypval, %o2 ! Let everyone know we
set ' ', %o0 ! are a "sun4 " architecture
stb %o0, [%o2 + 0x4]
b got_prop
nop
#else
sethi %hi(SUN4_PROM_VECTOR+0x84), %o1
ld [%o1 + %lo(SUN4_PROM_VECTOR+0x84)], %o1
set sun4_notsup, %o0
......@@ -1170,7 +1146,7 @@ sun4_init:
nop
1: ba 1b ! Cannot exit into KMON
nop
#endif
no_sun4e_here:
ld [%g7 + 0x68], %o1
set sun4e_notsup, %o0
......
arch/sparc/kernel/idprom.c
View file @ 07104839
......@@ -12,10 +12,6 @@
#include <asm/oplib.h>
#include <asm/idprom.h>
#include <asm/machines.h> /* Fun with Sun released architectures. */
#ifdef CONFIG_SUN4
#include <asm/sun4paddr.h>
extern void sun4setup(void);
#endif
struct idprom *idprom;
static struct idprom idprom_buffer;
......@@ -101,7 +97,4 @@ void __init idprom_init(void)
idprom->id_ethaddr[0], idprom->id_ethaddr[1],
idprom->id_ethaddr[2], idprom->id_ethaddr[3],
idprom->id_ethaddr[4], idprom->id_ethaddr[5]);
#ifdef CONFIG_SUN4
sun4setup();
#endif
}
arch/sparc/kernel/ioport.c
View file @ 07104839
......@@ -42,10 +42,13 @@
#include <asm/vaddrs.h>
#include <asm/oplib.h>
#include <asm/prom.h>
#include <asm/sbus.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
#include <asm/dma.h>
#include <asm/iommu.h>
#include <asm/io-unit.h>
#include "dma.h"
#define mmu_inval_dma_area(p, l) /* Anton pulled it out for 2.4.0-xx */
......@@ -139,15 +142,6 @@ void iounmap(volatile void __iomem *virtual)
}
}
/*
*/
void __iomem *sbus_ioremap(struct resource *phyres, unsigned long offset,
unsigned long size, char *name)
{
return _sparc_alloc_io(phyres->flags & 0xF,
phyres->start + offset, size, name);
}
void __iomem *of_ioremap(struct resource *res, unsigned long offset,
unsigned long size, char *name)
{
......@@ -163,13 +157,6 @@ void of_iounmap(struct resource *res, void __iomem *base, unsigned long size)
}
EXPORT_SYMBOL(of_iounmap);
/*
*/
void sbus_iounmap(volatile void __iomem *addr, unsigned long size)
{
iounmap(addr);
}
/*
* Meat of mapping
*/
......@@ -246,63 +233,19 @@ static void _sparc_free_io(struct resource *res)
#ifdef CONFIG_SBUS
void sbus_set_sbus64(struct sbus_dev *sdev, int x)
void sbus_set_sbus64(struct device *dev, int x)
{
printk("sbus_set_sbus64: unsupported\n");
}
extern unsigned int sun4d_build_irq(struct sbus_dev *sdev, int irq);
void __init sbus_fill_device_irq(struct sbus_dev *sdev)
{
struct linux_prom_irqs irqs[PROMINTR_MAX];
int len;
len = prom_getproperty(sdev->prom_node, "intr",
(char *)irqs, sizeof(irqs));
if (len != -1) {
sdev->num_irqs = len / 8;
if (sdev->num_irqs == 0) {
sdev->irqs[0] = 0;
} else if (sparc_cpu_model == sun4d) {
for (len = 0; len < sdev->num_irqs; len++)
sdev->irqs[len] =
sun4d_build_irq(sdev, irqs[len].pri);
} else {
for (len = 0; len < sdev->num_irqs; len++)
sdev->irqs[len] = irqs[len].pri;
}
} else {
int interrupts[PROMINTR_MAX];
/* No "intr" node found-- check for "interrupts" node.
* This node contains SBus interrupt levels, not IPLs
* as in "intr", and no vector values. We convert
* SBus interrupt levels to PILs (platform specific).
*/
len = prom_getproperty(sdev->prom_node, "interrupts",
(char *)interrupts, sizeof(interrupts));
if (len == -1) {
sdev->irqs[0] = 0;
sdev->num_irqs = 0;
} else {
sdev->num_irqs = len / sizeof(int);
for (len = 0; len < sdev->num_irqs; len++) {
sdev->irqs[len] =
sbint_to_irq(sdev, interrupts[len]);
}
}
}
}
/*
* Allocate a chunk of memory suitable for DMA.
* Typically devices use them for control blocks.
* CPU may access them without any explicit flushing.
*
* XXX Some clever people know that sdev is not used and supply NULL. Watch.
*/
void *sbus_alloc_consistent(struct sbus_dev *sdev, long len, u32 *dma_addrp)
void *sbus_alloc_consistent(struct device *dev, long len, u32 *dma_addrp)
{
struct of_device *op = to_of_device(dev);
unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK;
unsigned long va;
struct resource *res;
......@@ -336,13 +279,10 @@ void *sbus_alloc_consistent(struct sbus_dev *sdev, long len, u32 *dma_addrp)
* XXX That's where sdev would be used. Currently we load
* all iommu tables with the same translations.
*/
if (mmu_map_dma_area(dma_addrp, va, res->start, len_total) != 0)
if (mmu_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0)
goto err_noiommu;
/* Set the resource name, if known. */
if (sdev) {
res->name = sdev->prom_name;
}
res->name = op->node->name;
return (void *)(unsigned long)res->start;
......@@ -356,7 +296,7 @@ void *sbus_alloc_consistent(struct sbus_dev *sdev, long len, u32 *dma_addrp)
return NULL;
}
void sbus_free_consistent(struct sbus_dev *sdev, long n, void *p, u32 ba)
void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba)
{
struct resource *res;
struct page *pgv;
......@@ -383,8 +323,8 @@ void sbus_free_consistent(struct sbus_dev *sdev, long n, void *p, u32 ba)
kfree(res);
/* mmu_inval_dma_area(va, n); */ /* it's consistent, isn't it */
pgv = mmu_translate_dvma(ba);
mmu_unmap_dma_area(ba, n);
pgv = virt_to_page(p);
mmu_unmap_dma_area(dev, ba, n);
__free_pages(pgv, get_order(n));
}
......@@ -394,7 +334,7 @@ void sbus_free_consistent(struct sbus_dev *sdev, long n, void *p, u32 ba)
* CPU view of this memory may be inconsistent with
* a device view and explicit flushing is necessary.
*/
dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *va, size_t len, int direction)
dma_addr_t sbus_map_single(struct device *dev, void *va, size_t len, int direction)
{
/* XXX why are some lengths signed, others unsigned? */
if (len <= 0) {
......@@ -404,17 +344,17 @@ dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *va, size_t len, int dire
if (len > 256*1024) { /* __get_free_pages() limit */
return 0;
}
return mmu_get_scsi_one(va, len, sdev->bus);
return mmu_get_scsi_one(dev, va, len);
}
void sbus_unmap_single(struct sbus_dev *sdev, dma_addr_t ba, size_t n, int direction)
void sbus_unmap_single(struct device *dev, dma_addr_t ba, size_t n, int direction)
{
mmu_release_scsi_one(ba, n, sdev->bus);
mmu_release_scsi_one(dev, ba, n);
}
int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg, int n, int direction)
int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, int direction)
{
mmu_get_scsi_sgl(sg, n, sdev->bus);
mmu_get_scsi_sgl(dev, sg, n);
/*
* XXX sparc64 can return a partial length here. sun4c should do this
......@@ -423,145 +363,28 @@ int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg, int n, int direct
return n;
}
void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sg, int n, int direction)
{
mmu_release_scsi_sgl(sg, n, sdev->bus);
}
/*
*/
void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev, dma_addr_t ba, size_t size, int direction)
{
#if 0
unsigned long va;
struct resource *res;
/* We do not need the resource, just print a message if invalid. */
res = _sparc_find_resource(&_sparc_dvma, ba);
if (res == NULL)
panic("sbus_dma_sync_single: 0x%x\n", ba);
va = page_address(mmu_translate_dvma(ba)); /* XXX higmem */
/*
* XXX This bogosity will be fixed with the iommu rewrite coming soon
* to a kernel near you. - Anton
*/
/* mmu_inval_dma_area(va, (size + PAGE_SIZE-1) & PAGE_MASK); */
#endif
}
void sbus_dma_sync_single_for_device(struct sbus_dev *sdev, dma_addr_t ba, size_t size, int direction)
void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n, int direction)
{
#if 0
unsigned long va;
struct resource *res;
/* We do not need the resource, just print a message if invalid. */
res = _sparc_find_resource(&_sparc_dvma, ba);
if (res == NULL)
panic("sbus_dma_sync_single: 0x%x\n", ba);
va = page_address(mmu_translate_dvma(ba)); /* XXX higmem */
/*
* XXX This bogosity will be fixed with the iommu rewrite coming soon
* to a kernel near you. - Anton
*/
/* mmu_inval_dma_area(va, (size + PAGE_SIZE-1) & PAGE_MASK); */
#endif
mmu_release_scsi_sgl(dev, sg, n);
}
void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev, struct scatterlist *sg, int n, int direction)
void sbus_dma_sync_single_for_cpu(struct device *dev, dma_addr_t ba, size_t size, int direction)
{
printk("sbus_dma_sync_sg_for_cpu: not implemented yet\n");
}
void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev, struct scatterlist *sg, int n, int direction)
void sbus_dma_sync_single_for_device(struct device *dev, dma_addr_t ba, size_t size, int direction)
{
printk("sbus_dma_sync_sg_for_device: not implemented yet\n");
}
/* Support code for sbus_init(). */
/*
* XXX This functions appears to be a distorted version of
* prom_sbus_ranges_init(), with all sun4d stuff cut away.
* Ask DaveM what is going on here, how is sun4d supposed to work... XXX
*/
/* added back sun4d patch from Thomas Bogendoerfer - should be OK (crn) */
void __init sbus_arch_bus_ranges_init(struct device_node *pn, struct sbus_bus *sbus)
{
int parent_node = pn->node;
if (sparc_cpu_model == sun4d) {
struct linux_prom_ranges iounit_ranges[PROMREG_MAX];
int num_iounit_ranges, len;
len = prom_getproperty(parent_node, "ranges",
(char *) iounit_ranges,
sizeof (iounit_ranges));
if (len != -1) {
num_iounit_ranges =
(len / sizeof(struct linux_prom_ranges));
prom_adjust_ranges(sbus->sbus_ranges,
sbus->num_sbus_ranges,
iounit_ranges, num_iounit_ranges);
}
}
}
void __init sbus_setup_iommu(struct sbus_bus *sbus, struct device_node *dp)
{
#ifndef CONFIG_SUN4
struct device_node *parent = dp->parent;
if (sparc_cpu_model != sun4d &&
parent != NULL &&
!strcmp(parent->name, "iommu")) {
extern void iommu_init(int iommu_node, struct sbus_bus *sbus);
iommu_init(parent->node, sbus);
}
if (sparc_cpu_model == sun4d) {
extern void iounit_init(int sbi_node, int iounit_node,
struct sbus_bus *sbus);
iounit_init(dp->node, parent->node, sbus);
}
#endif
}
void __init sbus_setup_arch_props(struct sbus_bus *sbus, struct device_node *dp)
{
if (sparc_cpu_model == sun4d) {
struct device_node *parent = dp->parent;
sbus->devid = of_getintprop_default(parent, "device-id", 0);
sbus->board = of_getintprop_default(parent, "board#", 0);
}
}
int __init sbus_arch_preinit(void)
static int __init sparc_register_ioport(void)
{
register_proc_sparc_ioport();
#ifdef CONFIG_SUN4
{
extern void sun4_dvma_init(void);
sun4_dvma_init();
}
return 1;
#else
return 0;
#endif
}
void __init sbus_arch_postinit(void)
{
if (sparc_cpu_model == sun4d) {
extern void sun4d_init_sbi_irq(void);
sun4d_init_sbi_irq();
}
}
arch_initcall(sparc_register_ioport);
#endif /* CONFIG_SBUS */
#ifdef CONFIG_PCI
......
arch/sparc/kernel/irq.h
View file @ 07104839
......@@ -13,7 +13,6 @@ BTFIXUPDEF_CALL(void, enable_irq, unsigned int)
BTFIXUPDEF_CALL(void, disable_pil_irq, unsigned int)
BTFIXUPDEF_CALL(void, enable_pil_irq, unsigned int)
BTFIXUPDEF_CALL(void, clear_clock_irq, void)
BTFIXUPDEF_CALL(void, clear_profile_irq, int)
BTFIXUPDEF_CALL(void, load_profile_irq, int, unsigned int)
static inline void __disable_irq(unsigned int irq)
......@@ -41,11 +40,6 @@ static inline void clear_clock_irq(void)
BTFIXUP_CALL(clear_clock_irq)();
}
static inline void clear_profile_irq(int irq)
{
BTFIXUP_CALL(clear_profile_irq)(irq);
}
static inline void load_profile_irq(int cpu, int limit)
{
BTFIXUP_CALL(load_profile_irq)(cpu, limit);
......
arch/sparc/kernel/of_device.c
View file @ 07104839
......@@ -29,15 +29,38 @@ struct of_device *of_find_device_by_node(struct device_node *dp)
}
EXPORT_SYMBOL(of_find_device_by_node);
#ifdef CONFIG_PCI
struct bus_type ebus_bus_type;
EXPORT_SYMBOL(ebus_bus_type);
#endif
unsigned int irq_of_parse_and_map(struct device_node *node, int index)
{
struct of_device *op = of_find_device_by_node(node);
if (!op || index >= op->num_irqs)
return 0;
return op->irqs[index];
}
EXPORT_SYMBOL(irq_of_parse_and_map);
/* Take the archdata values for IOMMU, STC, and HOSTDATA found in
* BUS and propagate to all child of_device objects.
*/
void of_propagate_archdata(struct of_device *bus)
{
struct dev_archdata *bus_sd = &bus->dev.archdata;
struct device_node *bus_dp = bus->node;
struct device_node *dp;
for (dp = bus_dp->child; dp; dp = dp->sibling) {
struct of_device *op = of_find_device_by_node(dp);
#ifdef CONFIG_SBUS
struct bus_type sbus_bus_type;
EXPORT_SYMBOL(sbus_bus_type);
#endif
op->dev.archdata.iommu = bus_sd->iommu;
op->dev.archdata.stc = bus_sd->stc;
op->dev.archdata.host_controller = bus_sd->host_controller;
op->dev.archdata.numa_node = bus_sd->numa_node;
if (dp->child)
of_propagate_archdata(op);
}
}
struct bus_type of_platform_bus_type;
EXPORT_SYMBOL(of_platform_bus_type);
......@@ -327,6 +350,27 @@ static int __init build_one_resource(struct device_node *parent,
return 1;
}
static int __init use_1to1_mapping(struct device_node *pp)
{
/* If we have a ranges property in the parent, use it. */
if (of_find_property(pp, "ranges", NULL) != NULL)
return 0;
/* Some SBUS devices use intermediate nodes to express
* hierarchy within the device itself. These aren't
* real bus nodes, and don't have a 'ranges' property.
* But, we should still pass the translation work up
* to the SBUS itself.
*/
if (!strcmp(pp->name, "dma") ||
!strcmp(pp->name, "espdma") ||
!strcmp(pp->name, "ledma") ||
!strcmp(pp->name, "lebuffer"))
return 0;
return 1;
}
static int of_resource_verbose;
static void __init build_device_resources(struct of_device *op,
......@@ -373,10 +417,7 @@ static void __init build_device_resources(struct of_device *op,
flags = bus->get_flags(reg, 0);
/* If the immediate parent has no ranges property to apply,
* just use a 1<->1 mapping.
*/
if (of_find_property(pp, "ranges", NULL) == NULL) {
if (use_1to1_mapping(pp)) {
result = of_read_addr(addr, na);
goto build_res;
}
......@@ -565,15 +606,6 @@ static int __init of_bus_driver_init(void)
int err;
err = of_bus_type_init(&of_platform_bus_type, "of");
#ifdef CONFIG_PCI
if (!err)
err = of_bus_type_init(&ebus_bus_type, "ebus");
#endif
#ifdef CONFIG_SBUS
if (!err)
err = of_bus_type_init(&sbus_bus_type, "sbus");
#endif
if (!err)
scan_of_devices();
......
arch/sparc/kernel/pcic.c
View file @ 07104839
......@@ -17,8 +17,6 @@
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <asm/ebus.h>
#include <asm/sbus.h> /* for sanity check... */
#include <asm/swift.h> /* for cache flushing. */
#include <asm/io.h>
......@@ -430,7 +428,6 @@ static int __init pcic_init(void)
pcic_pbm_scan_bus(pcic);
ebus_init();
return 0;
}
......@@ -493,10 +490,6 @@ static void pcic_map_pci_device(struct linux_pcic *pcic,
* do ioremap() before accessing PC-style I/O,
* we supply virtual, ready to access address.
*
* Ebus devices do not come here even if
* CheerIO makes a similar conversion.
* See ebus.c for details.
*
* Note that request_region()
* works for these devices.
*
......@@ -677,7 +670,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
}
/*
* pcic_pin_to_irq() is exported to ebus.c.
* pcic_pin_to_irq() is exported to bus probing code
*/
unsigned int
pcic_pin_to_irq(unsigned int pin, const char *name)
......@@ -904,11 +897,6 @@ static void pcic_enable_irq(unsigned int irq_nr)
local_irq_restore(flags);
}
static void pcic_clear_profile_irq(int cpu)
{
printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__);
}
static void pcic_load_profile_irq(int cpu, unsigned int limit)
{
printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__);
......@@ -934,7 +922,6 @@ void __init sun4m_pci_init_IRQ(void)
BTFIXUPSET_CALL(enable_pil_irq, pcic_enable_pil_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(disable_pil_irq, pcic_disable_pil_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(clear_profile_irq, pcic_clear_profile_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM);
}
......
arch/sparc/kernel/pmc.c
View file @ 07104839
......@@ -8,11 +8,11 @@
#include <linux/fs.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/miscdevice.h>
#include <linux/pm.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <asm/io.h>
#include <asm/sbus.h>
#include <asm/oplib.h>
#include <asm/uaccess.h>
#include <asm/auxio.h>
......@@ -23,17 +23,15 @@
* #define PMC_NO_IDLE
*/
#define PMC_MINOR MISC_DYNAMIC_MINOR
#define PMC_OBPNAME "SUNW,pmc"
#define PMC_DEVNAME "pmc"
#define PMC_IDLE_REG 0x00
#define PMC_IDLE_ON 0x01
volatile static u8 __iomem *regs;
static int pmc_regsize;
static u8 __iomem *regs;
#define pmc_readb(offs) (sbus_readb(regs+offs))
#define pmc_readb(offs) (sbus_readb(regs+offs))
#define pmc_writeb(val, offs) (sbus_writeb(val, regs+offs))
/*
......@@ -53,31 +51,11 @@ void pmc_swift_idle(void)
#endif
}
static inline void pmc_free(void)
static int __devinit pmc_probe(struct of_device *op,
const struct of_device_id *match)
{
sbus_iounmap(regs, pmc_regsize);
}
static int __init pmc_probe(void)
{
struct sbus_bus *sbus = NULL;
struct sbus_dev *sdev = NULL;
for_each_sbus(sbus) {
for_each_sbusdev(sdev, sbus) {
if (!strcmp(sdev->prom_name, PMC_OBPNAME)) {
goto sbus_done;
}
}
}
sbus_done:
if (!sdev) {
return -ENODEV;
}
pmc_regsize = sdev->reg_addrs[0].reg_size;
regs = sbus_ioremap(&sdev->resource[0], 0,
pmc_regsize, PMC_OBPNAME);
regs = of_ioremap(&op->resource[0], 0,
resource_size(&op->resource[0]), PMC_OBPNAME);
if (!regs) {
printk(KERN_ERR "%s: unable to map registers\n", PMC_DEVNAME);
return -ENODEV;
......@@ -92,8 +70,27 @@ static int __init pmc_probe(void)
return 0;
}
static struct of_device_id __initdata pmc_match[] = {
{
.name = PMC_OBPNAME,
},
{},
};
MODULE_DEVICE_TABLE(of, pmc_match);
static struct of_platform_driver pmc_driver = {
.name = "pmc",
.match_table = pmc_match,
.probe = pmc_probe,
};
static int __init pmc_init(void)
{
return of_register_driver(&pmc_driver, &of_bus_type);
}
/* This driver is not critical to the boot process
* and is easiest to ioremap when SBus is already
* initialized, so we install ourselves thusly:
*/
__initcall(pmc_probe);
__initcall(pmc_init);
arch/sparc/kernel/process.c
View file @ 07104839
......@@ -75,7 +75,7 @@ void cpu_idle(void)
{
/* endless idle loop with no priority at all */
for (;;) {
if (ARCH_SUN4C_SUN4) {
if (ARCH_SUN4C) {
static int count = HZ;
static unsigned long last_jiffies;
static unsigned long last_faults;
......
arch/sparc/kernel/prom.c
View file @ 07104839
......@@ -54,6 +54,9 @@ int of_getintprop_default(struct device_node *np, const char *name, int def)
}
EXPORT_SYMBOL(of_getintprop_default);
DEFINE_MUTEX(of_set_property_mutex);
EXPORT_SYMBOL(of_set_property_mutex);
int of_set_property(struct device_node *dp, const char *name, void *val, int len)
{
struct property **prevp;
......@@ -77,7 +80,10 @@ int of_set_property(struct device_node *dp, const char *name, void *val, int len
void *old_val = prop->value;
int ret;
mutex_lock(&of_set_property_mutex);
ret = prom_setprop(dp->node, (char *) name, val, len);
mutex_unlock(&of_set_property_mutex);
err = -EINVAL;
if (ret >= 0) {
prop->value = new_val;
......@@ -436,7 +442,6 @@ static void __init of_console_init(void)
switch (prom_vers) {
case PROM_V0:
case PROM_SUN4:
skip = 0;
switch (*romvec->pv_stdout) {
case PROMDEV_SCREEN:
......
arch/sparc/kernel/setup.c
View file @ 07104839
......@@ -213,23 +213,25 @@ void __init setup_arch(char **cmdline_p)
/* Initialize PROM console and command line. */
*cmdline_p = prom_getbootargs();
strcpy(boot_command_line, *cmdline_p);
parse_early_param();
/* Set sparc_cpu_model */
sparc_cpu_model = sun_unknown;
if(!strcmp(&cputypval,"sun4 ")) { sparc_cpu_model=sun4; }
if(!strcmp(&cputypval,"sun4c")) { sparc_cpu_model=sun4c; }
if(!strcmp(&cputypval,"sun4m")) { sparc_cpu_model=sun4m; }
if(!strcmp(&cputypval,"sun4s")) { sparc_cpu_model=sun4m; } /* CP-1200 with PROM 2.30 -E */
if(!strcmp(&cputypval,"sun4d")) { sparc_cpu_model=sun4d; }
if(!strcmp(&cputypval,"sun4e")) { sparc_cpu_model=sun4e; }
if(!strcmp(&cputypval,"sun4u")) { sparc_cpu_model=sun4u; }
#ifdef CONFIG_SUN4
if (sparc_cpu_model != sun4) {
prom_printf("This kernel is for Sun4 architecture only.\n");
prom_halt();
}
#endif
if (!strcmp(&cputypval,"sun4 "))
sparc_cpu_model = sun4;
if (!strcmp(&cputypval,"sun4c"))
sparc_cpu_model = sun4c;
if (!strcmp(&cputypval,"sun4m"))
sparc_cpu_model = sun4m;
if (!strcmp(&cputypval,"sun4s"))
sparc_cpu_model = sun4m; /* CP-1200 with PROM 2.30 -E */
if (!strcmp(&cputypval,"sun4d"))
sparc_cpu_model = sun4d;
if (!strcmp(&cputypval,"sun4e"))
sparc_cpu_model = sun4e;
if (!strcmp(&cputypval,"sun4u"))
sparc_cpu_model = sun4u;
printk("ARCH: ");
switch(sparc_cpu_model) {
case sun4:
......@@ -263,7 +265,7 @@ void __init setup_arch(char **cmdline_p)
boot_flags_init(*cmdline_p);
idprom_init();
if (ARCH_SUN4C_SUN4)
if (ARCH_SUN4C)
sun4c_probe_vac();
load_mmu();
......
arch/sparc/kernel/sparc_ksyms.c
View file @ 07104839
......@@ -38,17 +38,12 @@
#include <asm/idprom.h>
#include <asm/head.h>
#include <asm/smp.h>
#include <asm/mostek.h>
#include <asm/ptrace.h>
#include <asm/uaccess.h>
#include <asm/checksum.h>
#ifdef CONFIG_SBUS
#include <asm/sbus.h>
#include <asm/dma.h>
#endif
#ifdef CONFIG_PCI
#include <asm/ebus.h>
#endif
#include <asm/io-unit.h>
#include <asm/bug.h>
......@@ -127,16 +122,11 @@ EXPORT_SYMBOL(phys_cpu_present_map);
EXPORT_SYMBOL(__udelay);
EXPORT_SYMBOL(__ndelay);
EXPORT_SYMBOL(rtc_lock);
EXPORT_SYMBOL(mostek_lock);
EXPORT_SYMBOL(mstk48t02_regs);
#ifdef CONFIG_SUN_AUXIO
EXPORT_SYMBOL(set_auxio);
EXPORT_SYMBOL(get_auxio);
#endif
EXPORT_SYMBOL(io_remap_pfn_range);
/* P3: iounit_xxx may be needed, sun4d users */
/* EXPORT_SYMBOL(iounit_map_dma_init); */
/* EXPORT_SYMBOL(iounit_map_dma_page); */
#ifndef CONFIG_SMP
EXPORT_SYMBOL(BTFIXUP_CALL(___xchg32));
......@@ -153,24 +143,9 @@ EXPORT_SYMBOL(BTFIXUP_CALL(mmu_release_scsi_one));
EXPORT_SYMBOL(BTFIXUP_CALL(pgprot_noncached));
#ifdef CONFIG_SBUS
EXPORT_SYMBOL(sbus_root);
EXPORT_SYMBOL(dma_chain);
EXPORT_SYMBOL(sbus_set_sbus64);
EXPORT_SYMBOL(sbus_alloc_consistent);
EXPORT_SYMBOL(sbus_free_consistent);
EXPORT_SYMBOL(sbus_map_single);
EXPORT_SYMBOL(sbus_unmap_single);
EXPORT_SYMBOL(sbus_map_sg);
EXPORT_SYMBOL(sbus_unmap_sg);
EXPORT_SYMBOL(sbus_dma_sync_single_for_cpu);
EXPORT_SYMBOL(sbus_dma_sync_single_for_device);
EXPORT_SYMBOL(sbus_dma_sync_sg_for_cpu);
EXPORT_SYMBOL(sbus_dma_sync_sg_for_device);
EXPORT_SYMBOL(sbus_iounmap);
EXPORT_SYMBOL(sbus_ioremap);
#endif
#ifdef CONFIG_PCI
EXPORT_SYMBOL(ebus_chain);
EXPORT_SYMBOL(insb);
EXPORT_SYMBOL(outsb);
EXPORT_SYMBOL(insw);
......
arch/sparc/kernel/sun4c_irq.c
View file @ 07104839
This diff is collapsed.
arch/sparc/kernel/sun4d_irq.c
View file @ 07104839
This diff is collapsed.
arch/sparc/kernel/sun4d_smp.c
View file @ 07104839
......@@ -30,7 +30,6 @@
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
#include <asm/oplib.h>
#include <asm/sbus.h>
#include <asm/sbi.h>
#include <asm/tlbflush.h>
#include <asm/cacheflush.h>
......@@ -72,6 +71,17 @@ static void smp_setup_percpu_timer(void);
extern void cpu_probe(void);
extern void sun4d_distribute_irqs(void);
static unsigned char cpu_leds[32];
static inline void show_leds(int cpuid)
{
cpuid &= 0x1e;
__asm__ __volatile__ ("stba %0, [%1] %2" : :
"r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]),
"r" (ECSR_BASE(cpuid) | BB_LEDS),
"i" (ASI_M_CTL));
}
void __init smp4d_callin(void)
{
int cpuid = hard_smp4d_processor_id();
......
arch/sparc/kernel/sun4m_irq.c
View file @ 07104839
This diff is collapsed.
arch/sparc/kernel/sun4m_smp.c
View file @ 07104839
......@@ -315,6 +315,8 @@ void smp4m_cross_call_irq(void)
ccall_info.processors_out[i] = 1;
}
extern void sun4m_clear_profile_irq(int cpu);
void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
{
struct pt_regs *old_regs;
......@@ -322,7 +324,7 @@ void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
old_regs = set_irq_regs(regs);
clear_profile_irq(cpu);
sun4m_clear_profile_irq(cpu);
profile_tick(CPU_PROFILING);
......
arch/sparc/kernel/sun4setup.c deleted 100644 → 0
View file @ 589acce5
This diff is collapsed.
arch/sparc/kernel/sys_sparc.c
View file @ 07104839
This diff is collapsed.
arch/sparc/kernel/tick14.c
View file @ 07104839
This diff is collapsed.
arch/sparc/kernel/time.c
View file @ 07104839
This diff is collapsed.
arch/sparc/kernel/traps.c
View file @ 07104839
......@@ -43,23 +43,6 @@ void syscall_trace_exit(struct pt_regs *regs)
{
}
void sun4m_nmi(struct pt_regs *regs)
{
unsigned long afsr, afar;
printk("Aieee: sun4m NMI received!\n");
/* XXX HyperSparc hack XXX */
__asm__ __volatile__("mov 0x500, %%g1\n\t"
"lda [%%g1] 0x4, %0\n\t"
"mov 0x600, %%g1\n\t"
"lda [%%g1] 0x4, %1\n\t" :
"=r" (afsr), "=r" (afar));
printk("afsr=%08lx afar=%08lx\n", afsr, afar);
printk("you lose buddy boy...\n");
show_regs(regs);
prom_halt();
}
void sun4d_nmi(struct pt_regs *regs)
{
printk("Aieee: sun4d NMI received!\n");
......
arch/sparc/mm/Makefile
View file @ 07104839
This diff is collapsed.
arch/sparc/mm/btfixup.c
View file @ 07104839
This diff is collapsed.
arch/sparc/mm/fault.c
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