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Commit 08c8d743 authored by James Simmons's avatar James Simmons
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[FBDEV] Updates for the SIS fbdev driver to the new api. Removed poll. We wil... 

[FBDEV] Updates for the SIS fbdev driver to the new api. Removed poll. We wil use signals in the future instead.
parent fdd82b90
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drivers/video/Makefile
View file @ 08c8d743
......@@ -57,7 +57,7 @@ obj-$(CONFIG_FB_TX3912) += tx3912fb.o cfbfillrect.o cfbcopyarea.o cfbi
obj-$(CONFIG_FB_MATROX) += matrox/
obj-$(CONFIG_FB_RIVA) += riva/ cfbimgblt.o vgastate.o
obj-$(CONFIG_FB_SIS) += sis/
obj-$(CONFIG_FB_SIS) += sis/ cfbimgblt.o cfbfillrect.o cfbcopyarea.o
obj-$(CONFIG_FB_ATY) += aty/ cfbimgblt.o cfbfillrect.o cfbcopyarea.o
obj-$(CONFIG_FB_I810) += i810/ cfbfillrect.o cfbcopyarea.o \
cfbimgblt.o vgastate.o
......
drivers/video/hitfb.c
View file @ 08c8d743
......@@ -107,14 +107,12 @@ static int hitfb_setcolreg(unsigned regno, unsigned red, unsigned green,
if (regno < 16) {
switch(info->var.bits_per_pixel) {
#ifdef FBCON_HAS_CFB16
case 16:
((u16 *)(info->pseudo_palette))[regno] =
((red & 0xf800) ) |
((green & 0xfc00) >> 5) |
((blue & 0xf800) >> 11);
break;
#endif
}
}
return 0;
......
drivers/video/sis/300vtbl.h
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drivers/video/sis/310vtbl.h
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drivers/video/sis/init.c
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drivers/video/sis/init.h
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drivers/video/sis/init301.c
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drivers/video/sis/init301.h
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drivers/video/sis/initdef.h
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......@@ -15,8 +15,19 @@
#define VB_SIS302B 0x0004
#define VB_SIS301LV 0x0008
#define VB_SIS302LV 0x0010
#define VB_SIS30xLV VB_SIS301LV
#define VB_SIS30xNEW VB_SIS302LV
#define VB_NoLCD 0x8000
#define VB_SIS301BLV302BLV (VB_SIS301B|VB_SIS302B|VB_SIS301LV|VB_SIS302LV)
#define VB_SIS301B302B (VB_SIS301B|VB_SIS302B)
#define VB_SIS301LV302LV (VB_SIS301LV|VB_SIS302LV)
#define IS_SIS650740 ((HwDeviceExtension->jChipType >= SIS_650) && (HwDeviceExtension->jChipType < SIS_330))
#define IS_SIS650 (HwDeviceExtension->jChipType == SIS_650)
#define IS_SIS740 (HwDeviceExtension->jChipType == SIS_740)
#define IS_SIS330 (HwDeviceExtension->jChipType == SIS_330)
#define IS_SIS550 (HwDeviceExtension->jChipType == SIS_550)
#define CRT1Len 17
#define LVDSCRT1Len 15
......@@ -35,9 +46,9 @@
#define ModeInfoFlag 0x07
#define IsTextMode 0x07
#define DACInfoFlag 0x18
#define MemoryInfoFlag 0x1E0
#define MemorySizeShift 0x05
#define DACInfoFlag 0x0018
#define MemoryInfoFlag 0x01E0
#define MemorySizeShift 5
/* modeflag */
#define Charx8Dot 0x0200
......@@ -57,8 +68,9 @@
#define NoSupportHiVisionTV 0x0060
#define NoSupportLCD 0x0058
#define SupportCHTV 0x0800
#define SupportTV1024 0x0800 /*301b*/
#define SupportTV1024 0x0800
#define InterlaceMode 0x0080
#define SupportHiVisionTV2 0x1000
#define SyncPP 0x0000
#define SyncPN 0x4000
#define SyncNP 0x8000
......@@ -72,13 +84,13 @@
/* VBInfo */
#define SetSimuScanMode 0x0001 /* CR 30 */
#define SwitchToCRT2 0x0002
#define SetCRT2ToTV 0x009C
#define SetCRT2ToAVIDEO 0x0004
#define SetCRT2ToSVIDEO 0x0008
#define SetCRT2ToSCART 0x0010
#define SetCRT2ToLCD 0x0020
#define SetCRT2ToRAMDAC 0x0040
#define SetCRT2ToHiVisionTV 0x0080
#define SetCRT2ToTV 0x009C /* alias */
#define SetNTSCTV 0x0000 /* CR 31 */
#define SetPALTV 0x0100
#define SetInSlaveMode 0x0200
......@@ -92,6 +104,7 @@
#define DriverMode 0x4000
#define HotKeySwitch 0x8000 /* TW: ? */
#define SetCRT2ToLCDA 0x8000
#define PanelRGB18Bit 0x0100
#define PanelRGB24Bit 0x0000
......@@ -126,12 +139,12 @@
010 LVDS
011 LVDS + Chrontel 7019
All other combinations reserved
[4] LVDS: Expanding(0)/Non-expanding(1) LCD display
30x: SiS30x(0)/LCD monitor(1) scaling display
[4] LVDS: 0: Panel Link expands / 1: Panel Link does not expand
30x: 0: Bridge scales / 1: Bridge does not scale = Panel scales (if possible)
[5] LCD polarity select
0: VESA DMT Standard
1: EDID 2.x defined
[6] LCD honrizontal polarity select
[6] LCD horizontal polarity select
0: High active
1: Low active
[7] LCD vertical polarity select
......@@ -139,12 +152,37 @@
1: Low active
*/
#define EnableDualEdge 0x01 /* CR38 (310/325 series) */
/* #define PAL_NTSC 0x01 (only on 315PRO) */
#define SetToLCDA 0x02 /* TW: LCD channel A (302 only) */
#define SetYPbPr 0x10 /* TW: ? */
#define EnablePALMN 0x40
#define EnablePALN 0x80
/* CR37: LCDInfo */
#define LCDRGB18Bit 0x0001
#define LCDNonExpanding 0x0010
#define DontExpandLCD LCDNonExpanding
#define LCDNonExpandingShift 4
#define DontExpandLCDShift LCDNonExpandingShift
#define LCDSync 0x0020
#define LCDPass11 0x0100
#define LCDSyncBit 0x00e0
#define LCDSyncShift 6
/* CR38 (310/325 series) */
#define EnableDualEdge 0x01
#define SetToLCDA 0x02 /* LCD channel A (302B/LV and 650+LVDS only) */
#define EnableSiSHiVision 0x04 /* HiVision (HDTV) on SiS bridge */
#define EnableLVDSScart 0x04 /* Scart on Ch7019 (unofficial definition - TW) */
#define EnableLVDSHiVision 0x08 /* YPbPr color format (480i HDTV); only on 650/Ch7019 systems */
#define SiSHiVision1 0x10 /* See SetHiVision() */
#define SiSHiVision2 0x20
#define EnablePALM 0x40 /* 1 = Set PALM */
#define EnablePALN 0x80 /* 1 = Set PALN */
#define SetSCARTOutput 0x01
#define BoardTVType 0x02
#define EnablePALMN 0x40 /* Romflag: 1 = Allow PALM/PALN */
/* CR39 (650) */
#define LCDPass1_1 0x01 /* LVDS only; set by driver to pass 1:1 data to LVDS output */
#define Enable302LV_DualLink 0x04 /* 30xNEW (302LV) only; set by mode switching function */
/* CR79 (310/325 series only)
[3-0] Notify driver
......@@ -155,16 +193,15 @@
0101 Set Contrast event
0110 Set Mute event
0111 Set Volume Up/Down event
[4] Enable Backlight Control by BIOS/driver (set by driver)
[4] Enable Backlight Control by BIOS/driver
(set by driver; set means that the BIOS should
not touch the backlight registers because eg.
the driver already switched off the backlight)
[5] PAL/NTSC (set by BIOS)
[6] Expansion On/Off (set by BIOS)
[6] Expansion On/Off (set by BIOS; copied to CR32[4])
[7] TV UnderScan/OverScan (set by BIOS)
*/
#define SetSCARTOutput 0x01
#define BoardTVType 0x02
/* SetFlag */
#define ProgrammingCRT2 0x01
#define TVSimuMode 0x02
......@@ -173,8 +210,7 @@
#define EnableLVDSDDA 0x10
#define SetDispDevSwitchFlag 0x20
#define CheckWinDos 0x40
#define SetJDOSMode 0x80
#define CRT2IsVGA 0x80 /* TW: Not sure about this name... */
#define SetDOSMode 0x80
/* LCDResInfo */
#define Panel300_800x600 0x01 /* CR36 */
......@@ -184,7 +220,6 @@
#define Panel300_640x480 0x05
#define Panel300_1024x600 0x06
#define Panel300_1152x768 0x07
/* #define Panel300_1600x1200 0x06 OLD */
#define Panel300_320x480 0x08 /* fstn - TW: This is fake, can be any */
#define Panel310_800x600 0x01
......@@ -194,35 +229,40 @@
#define Panel310_1024x600 0x05
#define Panel310_1152x864 0x06
#define Panel310_1280x960 0x07
#define Panel310_1152x768 0x08
#define Panel310_1152x768 0x08 /* LVDS only */
#define Panel310_1400x1050 0x09
#define Panel310_1280x768 0x0a
#define Panel310_1280x768 0x0a /* LVDS only */
#define Panel310_1600x1200 0x0b
#define Panel310_320x480 0x0c /* fstn - TW: This is fake, can be any */
#define Panel310_320x480 0x0c /* fstn - TW: This is fake, can be any */
#define Panel_800x600 0x01 /* Unified values */
#define Panel_1024x768 0x02
#define Panel_1280x1024 0x03
#define Panel_640x480 0x04
#define Panel_1024x600 0x05
#define Panel_1152x864 0x06
#define Panel_1280x960 0x07
#define Panel_1152x768 0x08 /* LVDS only */
#define Panel_1400x1050 0x09
#define Panel_1280x768 0x0a /* LVDS only */
#define Panel_1600x1200 0x0b
#define Panel_320x480 0x0c /* fstn - TW: This is fake, can be any */
#define ExtChipType 0x0e
#define ExtChip301 0x02
#define ExtChipLVDS 0x04
#define ExtChipTrumpion 0x06
#define ExtChipCH7005 0x08
#define ExtChipMitacTV 0x0a /* TW: Incorrect, 0x0a = Chrontel 7005 only */
#define IsM650 0x80 /* TW: CR5F */
#define ExtChipMitacTV 0x0a /* TW: Incorrect, 0x0a = Chrontel 7005 only */
/* LCDInfo */
#define LCDRGB18Bit 0x01
#define LCDNonExpandingShift 0x04
#define LCDNonExpanding 0x10
#define LCDSync 0x20
/* TW: What is.. */ /* 0x100 */
#define LCDSyncBit 0xe0
#define LCDSyncShift 6
#define IsM650 0x80 /* TW: CR5F */
#define LCDDataLen 8
#define HiTVDataLen 12
#define TVDataLen 16
#define SetPALTV 0x0100
#define HalfDCLK 0x1000 /* modeflag */
#define NTSCHT 1716
#define NTSC2HT 1920
#define NTSCVT 525
......
drivers/video/sis/oem300.h
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drivers/video/sis/oem310.h
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/* OEM Data for 300 series */
/* OEM Data for 310/325/330 series */
UCHAR SiS310_CRT2DelayCompensation1 = 0x04; /* 301A */
const UCHAR SiS310_LCDDelayCompensation_301[] = /* 301 */
{
0x00,0x00,0x00, /* 800x600 */
0x0b,0x0b,0x0b, /* 1024x768 */
0x08,0x08,0x08, /* 1280x1024 */
0x00,0x00,0x00, /* 640x480 (unknown) */
0x00,0x00,0x00, /* 1024x600 (unknown) */
0x00,0x00,0x00, /* 1152x864 (unknown) */
0x08,0x08,0x08, /* 1280x960 (guessed) */
0x00,0x00,0x00, /* 1152x768 (unknown) */
0x08,0x08,0x08, /* 1400x1050 */
0x08,0x08,0x08, /* 1280x768 (guessed) */
0x00,0x00,0x00, /* 1600x1200 */
0x00,0x00,0x00, /* 320x480 (unknown) */
0x00,0x00,0x00,
0x00,0x00,0x00,
0x00,0x00,0x00
};
/* This is contained in 650+301B BIOSes, but it is wrong - so we don't use it */
UCHAR SiS310_LCDDelayCompensation_650301B[] = /* 30xB,LV */
{
0x01,0x01,0x01, /* 800x600 */
0x01,0x01,0x01, /* 1024x768 */
0x01,0x01,0x01, /* 1280x1024 */
0x01,0x01,0x01, /* 640x480 (unknown) */
0x01,0x01,0x01, /* 1024x600 (unknown) */
0x01,0x01,0x01, /* 1152x864 (unknown) */
0x01,0x01,0x01, /* 1280x960 (guessed) */
0x01,0x01,0x01, /* 1152x768 (unknown) */
0x01,0x01,0x01, /* 1400x1050 */
0x01,0x01,0x01, /* 1280x768 (guessed) */
0x01,0x01,0x01, /* 1600x1200 */
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02
};
/* This data is correct, so we use it instead of the table above */
UCHAR SiS310_LCDDelayCompensation_3xx301B[] = /* 30xB,LV */
{
0x01,0x01,0x01, /* 800x600 */
0x0C,0x0C,0x0C, /* 1024x768 */
0x0C,0x0C,0x0C, /* 1280x1024 */
0x08,0x08,0x08, /* 640x480 */
0x0C,0x0C,0x0C, /* 1024x600 (guessed) */
0x0C,0x0C,0x0C, /* 1152x864 (guessed) */
0x0C,0x0C,0x0C, /* 1280x960 (guessed) */
0x0C,0x0C,0x0C, /* 1152x768 (guessed) */
0x0C,0x0C,0x0C, /* 1400x1050 (guessed) */
0x0C,0x0C,0x0C, /* 1280x768 (guessed) */
0x0C,0x0C,0x0C, /* 1600x1200 (guessed) */
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02,
0x02,0x02,0x02
};
UCHAR SiS310_LCDDelayCompensation1[] =
const UCHAR SiS310_LCDDelayCompensation_LVDS[] = /* LVDS */
{
0x00,0x00,0x00, /* 800x600 */
0x00,0x00,0x00, /* 1024x768 */
0x00,0x00,0x00, /* 1280x1024 */
0x00,0x00,0x00, /* 640x480 (unknown) */
0x00,0x00,0x00, /* 1024x600 (unknown) */
0x00,0x00,0x00, /* 1152x864 (unknown) */
0x00,0x00,0x00, /* 1280x960 (guessed) */
0x00,0x00,0x00, /* 1152x768 (unknown) */
0x00,0x00,0x00, /* 1400x1050 */
0x00,0x00,0x00, /* 1280x768 (guessed) */
0x00,0x00,0x00, /* 1600x1200 */
0x00,0x00,0x00,
0x0b,0x0b,0x0b,
0x08,0x08,0x08,
0x08,0x08,0x08,
0x00,0x00,0x00,
0x00,0x00,0x00,
0x00,0x00,0x00
};
UCHAR SiS310_TVDelayCompensation1[] =
const UCHAR SiS310_LCDDelayCompensation_651301LV[] = /* M650/651 301LV */
{
0x02,0x02, /* NTSC Enhanced, Standard */
0x02,0x02, /* PAL */
0x08,0x0b /* HiVision */
0x33,0x33,0x33, /* 800x600 (guessed) */
0x33,0x33,0x33, /* 1024x768 */
0x33,0x33,0x33, /* 1280x1024 */
0x33,0x33,0x33, /* 640x480 (unknown) */
0x33,0x33,0x33, /* 1024x600 (unknown) */
0x33,0x33,0x33, /* 1152x864 (unknown) */
0x33,0x33,0x33, /* 1280x960 (guessed) */
0x33,0x33,0x33, /* 1152x768 (unknown) */
0x33,0x33,0x33, /* 1400x1050 */
0x33,0x33,0x33, /* 1280x768 (guessed) */
0x33,0x33,0x33, /* 1600x1200 */
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33
};
UCHAR SiS310_CRT2DelayCompensation2 = 0x00; /* TW: From 650/301LV BIOS; was 0x0C; */ /* 301B */
const UCHAR SiS310_LCDDelayCompensation_651302LV[] = /* M650/651 302LV */
{
0x33,0x33,0x33, /* 800x600 (guessed) */
0x33,0x33,0x33, /* 1024x768 */
0x33,0x33,0x33, /* 1280x1024 */
0x33,0x33,0x33, /* 640x480 (unknown) */
0x33,0x33,0x33, /* 1024x600 (unknown) */
0x33,0x33,0x33, /* 1152x864 (unknown) */
0x33,0x33,0x33, /* 1280x960 (guessed) */
0x33,0x33,0x33, /* 1152x768 (unknown) */
0x33,0x33,0x33, /* 1400x1050 */
0x33,0x33,0x33, /* 1280x768 (guessed) */
0x33,0x33,0x33, /* 1600x1200 */
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33,
0x33,0x33,0x33
};
const UCHAR SiS310_TVDelayCompensation_301[] = /* 301 */
{
0x02,0x02, /* NTSC Enhanced, Standard */
0x02,0x02, /* PAL */
0x08,0x0b /* HiVision */
};
UCHAR SiS310_LCDDelayCompensation2[] =
const UCHAR SiS310_TVDelayCompensation_301B[] = /* 30xB, 30xLV */
{
0x01,0x01,0x01, /* TW: From 650/301LV BIOS */
0x01,0x01,0x01,
0x01,0x01,0x01,
0x01,0x01,0x01,
0x01,0x01,0x01,
0x01,0x01,0x01,
0x01,0x01,0x01
#if 0
0x00,0x00,0x00, /* 800x600 VESA, non-VESA, non-expanding */
0x0C,0x0C,0x0C, /* 1024x768 */
0x0C,0x0C,0x0C, /* 1280x1024 */
0x08,0x08,0x08, /* 1280x960 */
0x00,0x00,0x00, /* 640x480 */
0x00,0x00,0x00, /* 1600x1200 */
0x00,0x00,0x00 /* 1920x1440 */
#endif
0x03,0x03,
0x03,0x03,
0x03,0x03
};
UCHAR SiS310_TVDelayCompensation2[] =
const UCHAR SiS310_TVDelayCompensation_740301B[] = /* 740 + 30xB (30xLV?) */
{
0x05,0x05, /* TW: From 650/301LV BIOS */
0x05,0x05,
0x05,0x05
#if 0
0x03,0x03, /* NTSC Enhanced, Standard */
0x03,0x03, /* PAL */
0x08,0x0b /* HiVision */
#endif
0x05,0x05,
0x05,0x05,
0x05,0x05
};
UCHAR SiS310_CRT2DelayCompensation3 = 0x00; /* LVDS */
const UCHAR SiS310_TVDelayCompensation_LVDS[] = /* LVDS */
{
0x0a,0x0a,
0x0a,0x0a,
0x0a,0x0a
};
UCHAR SiS310_LCDDelayCompensation3[] =
const UCHAR SiS310_TVDelayCompensation_651301LV[] = /* M650, 651, 301LV */
{
0x00,0x00,0x00, /* 800x600 */
0x00,0x00,0x00, /* 1024x768 */
0x00,0x00,0x00, /* 1280x1024 */
0x00,0x00,0x00, /* 1400x1050 */
0x00,0x00,0x00 /* 1600x1200 */
0x33,0x33,
0x33,0x33,
0x33,0x33
};
UCHAR SiS310_TVDelayCompensation3[] =
const UCHAR SiS310_TVDelayCompensation_651302LV[] = /* M650, 651, 302LV */
{
0x0a,0x0a,
0x0a,0x0a,
0x0a,0x0a
0x33,0x33,
0x33,0x33,
0x33,0x33
};
UCHAR SiS310_TVAntiFlick1[3][2] =
const UCHAR SiS310_TVAntiFlick1[3][2] =
{
{0x4,0x0},
{0x4,0x8},
{0x0,0x0}
};
UCHAR SiS310_TVEdge1[3][2] =
const UCHAR SiS310_TVEdge1[3][2] =
{
{0x0,0x4},
{0x0,0x4},
{0x0,0x0}
};
UCHAR SiS310_TVYFilter1[3][8][4] =
const UCHAR SiS310_TVYFilter1[3][8][4] =
{
{
{0x00,0xf4,0x10,0x38},
......@@ -121,7 +207,7 @@ UCHAR SiS310_TVYFilter1[3][8][4] =
}
};
UCHAR SiS310_TVYFilter2[3][9][7] =
const UCHAR SiS310_TVYFilter2[3][9][7] =
{
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
......@@ -135,7 +221,7 @@ UCHAR SiS310_TVYFilter2[3][9][7] =
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
},
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
......@@ -157,7 +243,7 @@ UCHAR SiS310_TVYFilter2[3][9][7] =
}
};
UCHAR SiS310_PALMFilter[17][4] =
const UCHAR SiS310_PALMFilter[16][4] =
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
......@@ -174,11 +260,10 @@ UCHAR SiS310_PALMFilter[17][4] =
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xff,0xff,0xff,0xff}
{0xeb,0x04,0x25,0x18}
};
UCHAR SiS310_PALNFilter[17][4] =
const UCHAR SiS310_PALNFilter[16][4] =
{
{0x00,0xf4,0x10,0x38},
{0x00,0xf4,0x10,0x38},
......@@ -195,12 +280,11 @@ UCHAR SiS310_PALNFilter[17][4] =
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xeb,0x04,0x25,0x18},
{0xff,0xff,0xff,0xff}
{0xeb,0x04,0x25,0x18}
};
UCHAR SiS310_PALMFilter2[9][7] =
const UCHAR SiS310_PALMFilter2[9][7] =
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
......@@ -213,7 +297,7 @@ UCHAR SiS310_PALMFilter2[9][7] =
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
};
UCHAR SiS310_PALNFilter2[9][7] =
const UCHAR SiS310_PALNFilter2[9][7] =
{
{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
......@@ -226,7 +310,7 @@ UCHAR SiS310_PALNFilter2[9][7] =
{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
};
UCHAR SiS310_TVPhaseIncr1[3][2][4]=
const UCHAR SiS310_TVPhaseIncr1[3][2][4] =
{
{
{0x21,0xed,0xba,0x08},
......@@ -242,15 +326,15 @@ UCHAR SiS310_TVPhaseIncr1[3][2][4]=
}
};
UCHAR SiS310_TVPhaseIncr2[3][2][4]=
const UCHAR SiS310_TVPhaseIncr2[3][2][4] =
{
{
{0x21,0xF1,0x37,0x56},
{0x21,0xF1,0x37,0x56}
{0x21,0xf0,0x7b,0xd6}, /* 1.10.7w; 1.10.6s: {0x1e,0x8b,0xda,0xa7}, old: {0x21,0xF1,0x37,0x56} */
{0x21,0xf0,0x7b,0xd6} /* 1.10.7w; 1.10.6s: {0x1e,0x8b,0xda,0xa7} old: {0x21,0xF1,0x37,0x56} */
},
{
{0x2a,0x09,0x86,0xe9},
{0x2a,0x09,0x86,0xe9}
{0x2a,0x0a,0x41,0xe9}, /* 1.10.7w, 1.10.6s. old: {0x2a,0x09,0x86,0xe9}, */
{0x2a,0x0a,0x41,0xe9} /* 1.10.7w, 1.10.6s. old: {0x2a,0x09,0x86,0xe9} */
},
{
{0x2a,0x05,0xd3,0x00},
......
drivers/video/sis/osdef.h
View file @ 08c8d743
......@@ -7,6 +7,7 @@
/**********************************************************************/
#ifdef LINUX_KERNEL
#include <linux/config.h>
#include <linux/version.h>
#ifdef CONFIG_FB_SIS_300
#define SIS300
#endif
......@@ -14,6 +15,12 @@
#ifdef CONFIG_FB_SIS_315
#define SIS315H
#endif
#if 1
#define SISFBACCEL /* Include 2D acceleration */
#endif
#if 1
#define SISFB_PAN /* Include Y-Panning code */
#endif
#else
/* #define SIS300*/
#define SIS315H
......@@ -122,6 +129,10 @@
#define InPortLong(p) inl((CARD16)(p))
#endif
/**********************************************************************/
/* LINUX KERNEL */
/**********************************************************************/
#ifdef LINUX_KERNEL
#define OutPortByte(p,v) outb((u8)(v),(u16)(p))
#define OutPortWord(p,v) outw((u16)(v),(u16)(p))
......@@ -146,7 +157,7 @@
/**********************************************************************/
/* WIN CE */
/* WIN CE */
/**********************************************************************/
#ifdef WINCE_HEADER
......
drivers/video/sis/sis.h 0 → 100644
View file @ 08c8d743
#ifndef _SIS_H
#define _SIS_H
#if 1
#define TWDEBUG(x)
#else
#define TWDEBUG(x) printk(KERN_INFO x "\n");
#endif
#endif
drivers/video/sis/sis_accel.c
View file @ 08c8d743
......@@ -37,13 +37,21 @@
#include <linux/agp_backend.h>
#include <linux/types.h>
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
#include <linux/sisfb.h>
#else
#include <video/sisfb.h>
#endif
#include <asm/io.h>
#ifdef CONFIG_MTRR
#include <asm/mtrr.h>
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
#include <video/fbcon.h>
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,33)
#include <video/fbcon-cfb8.h>
#include <video/fbcon-cfb16.h>
#include <video/fbcon-cfb24.h>
......@@ -54,9 +62,11 @@
#include "vgatypes.h"
#include "vstruct.h"
#include "sis_accel.h"
#include "sis.h"
extern struct video_info ivideo;
extern VGA_ENGINE sisvga_engine;
extern int sisfb_accel;
static const int sisALUConv[] =
{
......@@ -228,15 +238,38 @@ SiS310SubsequentScreenToScreenCopy(int src_x, int src_y, int dst_x, int dst_y,
int width, int height)
{
long srcbase, dstbase;
int mymin, mymax;
srcbase = dstbase = 0;
if (src_y >= 2048) {
srcbase = ivideo.video_linelength * src_y;
src_y = 0;
}
if (dst_y >= 2048) {
dstbase = ivideo.video_linelength * dst_y;
dst_y = 0;
mymin = min(src_y, dst_y);
mymax = max(src_y, dst_y);
/* Although the chip knows the direction to use
* if the source and destination areas overlap,
* that logic fails if we fiddle with the bitmap
* addresses. Therefore, we check if the source
* and destination blitting areas overlap and
* adapt the bitmap addresses synchronously
* if the coordinates exceed the valid range.
* The the areas do not overlap, we do our
* normal check.
*/
if((mymax - mymin) < height) {
if((src_y >= 2048) || (dst_y >= 2048)) {
srcbase = ivideo.video_linelength * mymin;
dstbase = ivideo.video_linelength * mymin;
src_y -= mymin;
dst_y -= mymin;
}
} else {
if(src_y >= 2048) {
srcbase = ivideo.video_linelength * src_y;
src_y = 0;
}
if(dst_y >= 2048) {
dstbase = ivideo.video_linelength * dst_y;
dst_y = 0;
}
}
SiS310SetupSRCBase(srcbase);
......@@ -286,25 +319,62 @@ int sisfb_initaccel(void)
return(0);
}
void sisfb_syncaccel(void)
{
if(sisvga_engine == SIS_300_VGA) {
SiS300Sync();
} else {
SiS310Sync();
}
}
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34) /* --- KERNEL 2.5.34 and later --- */
void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
int sisfb_sync(struct fb_info *info)
{
if(!sisfb_accel) return 0;
CRITFLAGS
if(sisvga_engine == SIS_300_VGA) {
SiS300Sync();
} else {
SiS310Sync();
}
CRITEND
return 0;
}
void sisfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
{
int col=0;
CRITFLAGS
TWDEBUG("Inside sisfb_fillrect");
if(!rect->width || !rect->height)
return;
if(!sisfb_accel) {
cfb_fillrect(info, rect);
return;
}
switch(info->var.bits_per_pixel) {
case 8: col = rect->color;
break;
case 16: col = ((u32 *)(info->pseudo_palette))[rect->color];
break;
case 32: col = ((u32 *)(info->pseudo_palette))[rect->color];
break;
}
if(sisvga_engine == SIS_300_VGA) {
CRITBEGIN
SiS300SetupForSolidFill(rect->color, myrops[rect->rop], 0);
SiS300SetupForSolidFill(col, myrops[rect->rop], 0);
SiS300SubsequentSolidFillRect(rect->dx, rect->dy, rect->width, rect->height);
CRITEND
SiS300Sync();
} else {
CRITBEGIN
SiS310SetupForSolidFill(rect->color, myrops[rect->rop], 0);
SiS310SetupForSolidFill(col, myrops[rect->rop], 0);
SiS310SubsequentSolidFillRect(rect->dx, rect->dy, rect->width, rect->height);
CRITEND
SiS310Sync();
......@@ -312,11 +382,17 @@ void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
}
void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area)
void sisfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
{
int xdir, ydir;
CRITFLAGS
TWDEBUG("Inside sis_copyarea");
if(!sisfb_accel) {
cfb_copyarea(info, area);
return;
}
if(!area->width || !area->height)
return;
......@@ -350,6 +426,27 @@ void fbcon_sis_bmove(struct display *p, int srcy, int srcx,
int xdir, ydir;
CRITFLAGS
if(!ivideo.accel) {
switch(ivideo.video_bpp) {
case 8:
#ifdef FBCON_HAS_CFB8
fbcon_cfb8_bmove(p, srcy, srcx, dsty, dstx, height, width);
#endif
break;
case 16:
#ifdef FBCON_HAS_CFB16
fbcon_cfb16_bmove(p, srcy, srcx, dsty, dstx, height, width);
#endif
break;
case 32:
#ifdef FBCON_HAS_CFB32
fbcon_cfb32_bmove(p, srcy, srcx, dsty, dstx, height, width);
#endif
break;
}
return;
}
srcx *= fontwidth(p);
srcy *= fontheight(p);
dstx *= fontwidth(p);
......@@ -357,7 +454,6 @@ void fbcon_sis_bmove(struct display *p, int srcy, int srcx,
width *= fontwidth(p);
height *= fontheight(p);
if(srcx < dstx) xdir = 0;
else xdir = 1;
if(srcy < dsty) ydir = 0;
......@@ -375,6 +471,10 @@ void fbcon_sis_bmove(struct display *p, int srcy, int srcx,
SiS310SubsequentScreenToScreenCopy(srcx, srcy, dstx, dsty, width, height);
CRITEND
SiS310Sync();
#if 0
printk(KERN_INFO "sis_bmove sx %d sy %d dx %d dy %d w %d h %d\n",
srcx, srcy, dstx, dsty, width, height);
#endif
}
}
......@@ -409,6 +509,13 @@ void fbcon_sis_clear8(struct vc_data *conp, struct display *p,
{
u32 bgx;
if(!ivideo.accel) {
#ifdef FBCON_HAS_CFB8
fbcon_cfb8_clear(conp, p, srcy, srcx, height, width);
#endif
return;
}
bgx = attr_bgcol_ec(p, conp);
fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
}
......@@ -417,6 +524,12 @@ void fbcon_sis_clear16(struct vc_data *conp, struct display *p,
int srcy, int srcx, int height, int width)
{
u32 bgx;
if(!ivideo.accel) {
#ifdef FBCON_HAS_CFB16
fbcon_cfb16_clear(conp, p, srcy, srcx, height, width);
#endif
return;
}
bgx = ((u_int16_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
......@@ -427,6 +540,13 @@ void fbcon_sis_clear32(struct vc_data *conp, struct display *p,
{
u32 bgx;
if(!ivideo.accel) {
#ifdef FBCON_HAS_CFB32
fbcon_cfb32_clear(conp, p, srcy, srcx, height, width);
#endif
return;
}
bgx = ((u_int32_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
}
......@@ -435,6 +555,22 @@ void fbcon_sis_revc(struct display *p, int srcx, int srcy)
{
CRITFLAGS
if(!ivideo.accel) {
switch(ivideo.video_bpp) {
case 16:
#ifdef FBCON_HAS_CFB16
fbcon_cfb16_revc(p, srcx, srcy);
#endif
break;
case 32:
#ifdef FBCON_HAS_CFB32
fbcon_cfb32_revc(p, srcx, srcy);
#endif
break;
}
return;
}
srcx *= fontwidth(p);
srcy *= fontheight(p);
......
drivers/video/sis/sis_accel.h 0 → 100644
View file @ 08c8d743
This diff is collapsed.
drivers/video/sis/sis_main.c
View file @ 08c8d743
This diff is collapsed.
drivers/video/sis/sis_main.h
View file @ 08c8d743
This diff is collapsed.
drivers/video/sis/vgatypes.h
View file @ 08c8d743
......@@ -99,9 +99,8 @@ typedef enum _SIS_CHIP_TYPE {
SIS_315,
SIS_315PRO, /* SiS 325 */
SIS_550,
SIS_640,
SIS_740,
SIS_650,
SIS_740,
SIS_330,
MAX_SIS_CHIP
} SIS_CHIP_TYPE;
......@@ -119,7 +118,6 @@ typedef enum _SIS_VB_CHIP_TYPE {
VB_CHIP_302,
VB_CHIP_302B,
VB_CHIP_302LV,
VB_CHIP_303,
VB_CHIP_UNKNOWN, /* other video bridge or no video bridge */
MAX_VB_CHIP
} SIS_VB_CHIP_TYPE;
......@@ -174,6 +172,7 @@ struct _SIS_HW_DEVICE_INFO
/* if NULL, then read from pjROMImage; */
/* Note:ROM image file is the file of VBIOS ROM */
BOOLEAN UseROM; /* TW: Use the ROM image if provided */
UCHAR *pjCustomizedROMImage;/* base virtual address of ROM image file. */
/* wincE:ROM image file is the file for OEM */
......@@ -208,6 +207,7 @@ struct _SIS_HW_DEVICE_INFO
/* 011:Trumpion LVDS Scaling Chip */
/* 100:LVDS(LCD-out)+Chrontel 7005 */
/* 101:Single Chrontel 7005 */
/* TW: This has changed on 310/325 series! */
ULONG ulCRT2LCDType; /* defined in the data structure type */
/* "SIS_LCD_TYPE" */
......@@ -234,13 +234,17 @@ struct _SIS_HW_DEVICE_INFO
UCHAR szVBIOSVer[VBIOS_VER_MAX_LENGTH];
UCHAR pdc; /* TW: PanelDelayCompensation */
#ifdef LINUX_KERNEL
BOOLEAN Is301BDH;
#endif
#ifdef LINUX_XF86
PCITAG PciTag; /* PCI Tag for Linux XF86 */
#endif
};
#endif
#endif /*~ mark by Paul ,Move definition to sisv.h */
#endif
/* TW: Addtional IOCTL for communication sisfb <> X driver */
......@@ -268,7 +272,19 @@ struct _SISFB_INFO {
unsigned char sisfb_revision;
unsigned char sisfb_patchlevel;
char reserved[253]; /* for future use */
unsigned char sisfb_caps; /* sisfb's capabilities */
int sisfb_tqlen; /* turbo queue length (in KB) */
unsigned int sisfb_pcibus; /* The card's PCI ID */
unsigned int sisfb_pcislot;
unsigned int sisfb_pcifunc;
unsigned char sisfb_lcdpdc;
unsigned char sisfb_lcda;
char reserved[235]; /* for future use */
};
#endif
......
drivers/video/sis/vstruct.h
View file @ 08c8d743
This diff is collapsed.
include/linux/fb.h
View file @ 08c8d743
......@@ -98,6 +98,8 @@
#define FB_ACCEL_3DLABS_PERMEDIA3 37 /* 3Dlabs Permedia 3 */
#define FB_ACCEL_ATI_RADEON 38 /* ATI Radeon family */
#define FB_ACCEL_I810 39 /* Intel 810/815 */
#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 650, 740 */
#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre") */
#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
......@@ -345,7 +347,6 @@ struct fb_pixmap {
#ifdef __KERNEL__
#include <linux/fs.h>
#include <linux/poll.h>
#include <linux/init.h>
#include <linux/devfs_fs_kernel.h>
......@@ -386,8 +387,6 @@ struct fb_ops {
int (*fb_cursor)(struct fb_info *info, struct fb_cursor *cursor);
/* Rotates the display */
void (*fb_rotate)(struct fb_info *info, int angle);
/* perform polling on fb device */
int (*fb_poll)(struct fb_info *info, poll_table *wait);
/* wait for blit idle, optional */
int (*fb_sync)(struct fb_info *info);
/* perform fb specific ioctl (optional) */
......
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