staging: mt7621-mmc: Correct datatypes for io and sanitize io access

Current code discard the address space information on the base address
of the mmc controller, that causes sparse warnings. It uses the raw
read write function, that is correct for the mips architecture (little
endian), but for portability the non-raw function should be used. Also
the clear/set bit macros do direct memory access, that is also correct
for mips, but not portable.

So the type of the base address is changed to void __iomem *, that is
the type returned by the ioremap function. The set/clear bit macros
are changed to functions, that use the portable read and write
functions. The use of the raw access functions is changed to use the
non-raw ones.
Signed-off-by: Christian Lütke-Stetzkamp <christian@lkamp.de>
Reviewed-by: NeilBrown <neil@brown.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

drivers/staging/mt7621-mmc/mt6575_sd.h

@@ -44,7 +44,7 @@
 /*--------------------------------------------------------------------------*/
 /* Common Macro                                                             */
 /*--------------------------------------------------------------------------*/
-#define REG_ADDR(x)                 ((volatile u32*)(base + OFFSET_##x))
+#define REG_ADDR(x)                 (base + OFFSET_##x)
 
 /*--------------------------------------------------------------------------*/
 /* Common Definition                                                        */
@@ -914,7 +914,7 @@ struct msdc_host {
 	struct semaphore            sem;
 
 	u32                         blksz;          /* host block size */
-	u32                         base;           /* host base address */
+	void __iomem                *base;           /* host base address */
 	int                         id;             /* host id */
 	int                         pwr_ref;        /* core power reference count */
 
@@ -984,15 +984,28 @@ static inline unsigned int uffs(unsigned int x)
 	return r;
 }
 
-#define sdr_read8(reg)           __raw_readb(reg)
-#define sdr_read16(reg)          __raw_readw(reg)
-#define sdr_read32(reg)          __raw_readl(reg)
-#define sdr_write8(reg, val)      __raw_writeb(val, reg)
-#define sdr_write16(reg, val)     __raw_writew(val, reg)
-#define sdr_write32(reg, val)     __raw_writel(val, reg)
+#define sdr_read8(reg)            readb(reg)
+#define sdr_read16(reg)           readw(reg)
+#define sdr_read32(reg)           readl(reg)
+#define sdr_write8(reg, val)      writeb(val, reg)
+#define sdr_write16(reg, val)     writew(val, reg)
+#define sdr_write32(reg, val)     writel(val, reg)
 
-#define sdr_set_bits(reg, bs)     ((*(volatile u32*)(reg)) |= (u32)(bs))
-#define sdr_clr_bits(reg, bs)     ((*(volatile u32*)(reg)) &= ~((u32)(bs)))
+static inline void sdr_set_bits(void __iomem *reg, u32 bs)
+{
+	u32 val = readl(reg);
+
+	val |= bs;
+	writel(val, reg);
+}
+
+static inline void sdr_clr_bits(void __iomem *reg, u32 bs)
+{
+	u32 val = readl(reg);
+
+	val &= ~bs;
+	writel(val, reg);
+}
 
 #define sdr_set_field(reg, field, val)					\
 do {								\