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Commit 0bd2cbcd authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'next-devicetree' of git://git.secretlab.ca/git/linux-2.6 

* 'next-devicetree' of git://git.secretlab.ca/git/linux-2.6: (29 commits)
  of/flattree: forward declare struct device_node in of_fdt.h
  ipmi: explicitly include of_address.h and of_irq.h
  sparc: explicitly cast negative phandle checks to s32
  powerpc/405: Fix missing #{address,size}-cells in i2c node
  powerpc/5200: dts: refactor dts files
  powerpc/5200: dts: Change combatible strings on localbus
  powerpc/5200: dts: remove unused properties
  powerpc/5200: dts: rename nodes to prepare for refactoring dts files
  of/flattree: Update dtc to current mainline.
  of/device: Don't register disabled devices
  powerpc/dts: fix syntax bugs in bluestone.dts
  of: Fixes for OF probing on little endian systems
  of: make drivers depend on CONFIG_OF instead of CONFIG_PPC_OF
  of/flattree: Add of_flat_dt_match() helper function
  of_serial: explicitly include of_irq.h
  of/flattree: Refactor unflatten_device_tree and add fdt_unflatten_tree
  of/flattree: Reorder unflatten_dt_node
  of/flattree: Refactor unflatten_dt_node
  of/flattree: Add non-boottime device tree functions
  of/flattree: Add Kconfig for EARLY_FLATTREE
  ...

Fix up trivial conflict in arch/sparc/prom/tree_32.c as per Grant.
parents 57cc7215 a0817487
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Showing with 2890 additions and 3404 deletions
Documentation/kbuild/makefiles.txt
View file @ 0bd2cbcd
......@@ -1136,6 +1136,21 @@ When kbuild executes, the following steps are followed (roughly):
resulting in the target file being recompiled for no
obvious reason.
dtc
Create flattend device tree blob object suitable for linking
into vmlinux. Device tree blobs linked into vmlinux are placed
in an init section in the image. Platform code *must* copy the
blob to non-init memory prior to calling unflatten_device_tree().
Example:
#arch/x86/platform/ce4100/Makefile
clean-files := *dtb.S
DTC_FLAGS := -p 1024
obj-y += foo.dtb.o
$(obj)/%.dtb: $(src)/%.dts
$(call cmd,dtc)
--- 6.7 Custom kbuild commands
......
Documentation/powerpc/dts-bindings/eeprom.txt 0 → 100644
View file @ 0bd2cbcd
EEPROMs (I2C)
Required properties:
- compatible : should be "<manufacturer>,<type>"
If there is no specific driver for <manufacturer>, a generic
driver based on <type> is selected. Possible types are:
24c00, 24c01, 24c02, 24c04, 24c08, 24c16, 24c32, 24c64,
24c128, 24c256, 24c512, 24c1024, spd
- reg : the I2C address of the EEPROM
Optional properties:
- pagesize : the length of the pagesize for writing. Please consult the
manual of your device, that value varies a lot. A wrong value
may result in data loss! If not specified, a safety value of
'1' is used which will be very slow.
- read-only: this parameterless property disables writes to the eeprom
Example:
eeprom@52 {
compatible = "atmel,24c32";
reg = <0x52>;
pagesize = <32>;
};
arch/microblaze/Kconfig
View file @ 0bd2cbcd
......@@ -14,7 +14,7 @@ config MICROBLAZE
select HAVE_DMA_API_DEBUG
select TRACING_SUPPORT
select OF
select OF_FLATTREE
select OF_EARLY_FLATTREE
config SWAP
def_bool n
......
arch/microblaze/boot/Makefile
View file @ 0bd2cbcd
......@@ -10,9 +10,6 @@ targets := linux.bin linux.bin.gz simpleImage.%
OBJCOPYFLAGS := -O binary
# Where the DTS files live
dtstree := $(srctree)/$(src)/dts
# Ensure system.dtb exists
$(obj)/linked_dtb.o: $(obj)/system.dtb
......@@ -51,14 +48,11 @@ $(obj)/simpleImage.%: vmlinux FORCE
$(call if_changed,strip)
@echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
# Rule to build device tree blobs
DTC = $(objtree)/scripts/dtc/dtc
# Rule to build device tree blobs
quiet_cmd_dtc = DTC $@
cmd_dtc = $(DTC) -O dtb -o $(obj)/$*.dtb -b 0 -p 1024 $(dtstree)/$*.dts
DTC_FLAGS := -p 1024
$(obj)/%.dtb: $(dtstree)/%.dts FORCE
$(call if_changed,dtc)
$(obj)/%.dtb: $(src)/dts/%.dts FORCE
$(call cmd,dtc)
clean-files += *.dtb simpleImage.*.unstrip linux.bin.ub
arch/microblaze/include/asm/prom.h
View file @ 0bd2cbcd
......@@ -64,9 +64,6 @@ extern void kdump_move_device_tree(void);
/* CPU OF node matching */
struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
/* Get the MAC address */
extern const void *of_get_mac_address(struct device_node *np);
/**
* of_irq_map_pci - Resolve the interrupt for a PCI device
* @pdev: the device whose interrupt is to be resolved
......
arch/microblaze/kernel/prom_parse.c
View file @ 0bd2cbcd
......@@ -110,41 +110,3 @@ void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
cells = prop ? *(u32 *)prop : of_n_size_cells(dn);
*size = of_read_number(dma_window, cells);
}
/**
* Search the device tree for the best MAC address to use. 'mac-address' is
* checked first, because that is supposed to contain to "most recent" MAC
* address. If that isn't set, then 'local-mac-address' is checked next,
* because that is the default address. If that isn't set, then the obsolete
* 'address' is checked, just in case we're using an old device tree.
*
* Note that the 'address' property is supposed to contain a virtual address of
* the register set, but some DTS files have redefined that property to be the
* MAC address.
*
* All-zero MAC addresses are rejected, because those could be properties that
* exist in the device tree, but were not set by U-Boot. For example, the
* DTS could define 'mac-address' and 'local-mac-address', with zero MAC
* addresses. Some older U-Boots only initialized 'local-mac-address'. In
* this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
* but is all zeros.
*/
const void *of_get_mac_address(struct device_node *np)
{
struct property *pp;
pp = of_find_property(np, "mac-address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
pp = of_find_property(np, "local-mac-address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
pp = of_find_property(np, "address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
return NULL;
}
EXPORT_SYMBOL(of_get_mac_address);
arch/mips/Kconfig
View file @ 0bd2cbcd
......@@ -2218,7 +2218,7 @@ config SECCOMP
config USE_OF
bool "Flattened Device Tree support"
select OF
select OF_FLATTREE
select OF_EARLY_FLATTREE
help
Include support for flattened device tree machine descriptions.
......
arch/powerpc/Kconfig
View file @ 0bd2cbcd
......@@ -116,7 +116,7 @@ config PPC
bool
default y
select OF
select OF_FLATTREE
select OF_EARLY_FLATTREE
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_DYNAMIC_FTRACE
select HAVE_FUNCTION_TRACER
......
arch/powerpc/boot/Makefile
View file @ 0bd2cbcd
......@@ -35,7 +35,7 @@ endif
BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj)
DTS_FLAGS ?= -p 1024
DTC_FLAGS ?= -p 1024
$(obj)/4xx.o: BOOTCFLAGS += -mcpu=405
$(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
......@@ -332,10 +332,8 @@ $(obj)/treeImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb)
# Rule to build device tree blobs
DTC = $(objtree)/scripts/dtc/dtc
$(obj)/%.dtb: $(dtstree)/%.dts
$(DTC) -O dtb -o $(obj)/$*.dtb -b 0 $(DTS_FLAGS) $(dtstree)/$*.dts
$(obj)/%.dtb: $(src)/dts/%.dts
$(call cmd,dtc)
# If there isn't a platform selected then just strip the vmlinux.
ifeq (,$(image-y))
......
arch/powerpc/boot/dts/bluestone.dts
View file @ 0bd2cbcd
......@@ -33,7 +33,7 @@ / {
aliases {
ethernet0 = &EMAC0;
serial0 = &UART0;
serial1 = &UART1;
//serial1 = &UART1; --gcl missing UART1 label
};
cpus {
......@@ -52,7 +52,7 @@ cpu@0 {
d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
next-level-cache = <&L2C0>;
//next-level-cache = <&L2C0>; --gcl missing L2C0 label
};
};
......@@ -142,7 +142,7 @@ MAL0: mcmal {
/*RXEOB*/ 0x7 0x4
/*SERR*/ 0x3 0x4
/*TXDE*/ 0x4 0x4
/*RXDE*/ 0x5 0x4
/*RXDE*/ 0x5 0x4>;
};
POB0: opb {
......@@ -182,7 +182,7 @@ partition@1a0000 {
reg = <0x001a0000 0x00060000>;
};
};
}
};
UART0: serial@ef600300 {
device_type = "serial";
......
arch/powerpc/boot/dts/cm5200.dts
View file @ 0bd2cbcd
......@@ -10,220 +10,74 @@
* option) any later version.
*/
/dts-v1/;
/include/ "mpc5200b.dtsi"
/ {
model = "schindler,cm5200";
compatible = "schindler,cm5200";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x04000000>; // 64MB
};
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 0xf0000000 0x0000c000>;
reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <0x200 0x38>;
};
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
fsl,has-wdt;
};
timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
};
timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
};
timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x630 0x10>;
interrupts = <1 12 0>;
};
timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x640 0x10>;
interrupts = <1 13 0>;
};
timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x650 0x10>;
interrupts = <1 14 0>;
};
timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x660 0x10>;
interrupts = <1 15 0>;
};
timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x670 0x10>;
interrupts = <1 16 0>;
can@900 {
status = "disabled";
};
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
can@980 {
status = "disabled";
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
gpio-controller;
#gpio-cells = <2>;
};
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
};
usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
};
dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
psc@2000 { // PSC1
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
};
xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <0x1f00 0x100>;
psc@2200 { // PSC2
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
};
serial@2000 { // PSC1
psc@2400 { // PSC3
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
};
serial@2200 { // PSC2
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2200 0x100>;
interrupts = <2 2 0>;
psc@2600 { // PSC4
status = "disabled";
};
serial@2400 { // PSC3
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2400 0x100>;
interrupts = <2 3 0>;
psc@2800 { // PSC5
status = "disabled";
};
serial@2c00 { // PSC6
psc@2c00 { // PSC6
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2c00 0x100>;
interrupts = <2 4 0>;
};
ethernet@3000 {
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
phy-handle = <&phy0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
phy0: ethernet-phy@0 {
reg = <0>;
};
};
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
ata@3a00 {
status = "disabled";
};
sram@8000 {
compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <0x8000 0x4000>;
i2c@3d00 {
status = "disabled";
};
};
localbus {
compatible = "fsl,mpc5200b-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0xfc000000 0x2000000>;
pci@f0000d00 {
status = "disabled";
};
localbus {
// 16-bit flash device at LocalPlus Bus CS0
flash@0,0 {
compatible = "cfi-flash";
......
arch/powerpc/boot/dts/digsy_mtc.dts
View file @ 0bd2cbcd
......@@ -11,195 +11,68 @@
* option) any later version.
*/
/dts-v1/;
/include/ "mpc5200b.dtsi"
/ {
model = "intercontrol,digsy-mtc";
compatible = "intercontrol,digsy-mtc";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x02000000>; // 32MB
};
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 0xf0000000 0x0000c000>;
reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <0x200 0x38>;
};
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
fsl,has-wdt;
};
timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
};
timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
};
timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x630 0x10>;
interrupts = <1 12 0>;
};
timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x640 0x10>;
interrupts = <1 13 0>;
};
timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x650 0x10>;
interrupts = <1 14 0>;
rtc@800 {
status = "disabled";
};
timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x660 0x10>;
interrupts = <1 15 0>;
can@900 {
status = "disabled";
};
timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x670 0x10>;
interrupts = <1 16 0>;
can@980 {
status = "disabled";
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
psc@2000 { // PSC1
status = "disabled";
};
gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
gpio-controller;
#gpio-cells = <2>;
psc@2200 { // PSC2
status = "disabled";
};
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
psc@2400 { // PSC3
status = "disabled";
};
usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
};
dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
};
xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <0x1f00 0x100>;
psc@2600 { // PSC4
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
};
serial@2600 { // PSC4
psc@2800 { // PSC5
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2600 0x100>;
interrupts = <2 11 0>;
};
serial@2800 { // PSC5
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2800 0x100>;
interrupts = <2 12 0>;
psc@2c00 { // PSC6
status = "disabled";
};
ethernet@3000 {
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
phy-handle = <&phy0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ata@3a00 {
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
};
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d00 0x40>;
interrupts = <2 15 0>;
rtc@50 {
compatible = "at,24c08";
reg = <0x50>;
......@@ -211,16 +84,16 @@ rtc@68 {
};
};
sram@8000 {
compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <0x8000 0x4000>;
i2c@3d40 {
status = "disabled";
};
};
lpb {
compatible = "fsl,mpc5200b-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
pci@f0000d00 {
status = "disabled";
};
localbus {
ranges = <0 0 0xff000000 0x1000000>;
// 16-bit flash device at LocalPlus Bus CS0
......
arch/powerpc/boot/dts/hotfoot.dts
View file @ 0bd2cbcd
......@@ -117,6 +117,8 @@ UART1: serial@ef600300 {
};
IIC: i2c@ef600500 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "ibm,iic-405ep", "ibm,iic";
reg = <0xef600500 0x00000011>;
interrupt-parent = <&UIC0>;
......
arch/powerpc/boot/dts/lite5200b.dts
View file @ 0bd2cbcd
......@@ -10,256 +10,75 @@
* option) any later version.
*/
/dts-v1/;
/include/ "mpc5200b.dtsi"
/ {
model = "fsl,lite5200b";
compatible = "fsl,lite5200b";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>; // 256MB
};
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 0xf0000000 0x0000c000>;
reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <0x200 0x38>;
};
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
fsl,has-wdt;
};
timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
};
timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
};
timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x630 0x10>;
interrupts = <1 12 0>;
};
timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x640 0x10>;
interrupts = <1 13 0>;
};
timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x650 0x10>;
interrupts = <1 14 0>;
};
timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x660 0x10>;
interrupts = <1 15 0>;
};
timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x670 0x10>;
interrupts = <1 16 0>;
};
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
};
can@900 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 17 0>;
reg = <0x900 0x80>;
};
can@980 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 18 0>;
reg = <0x980 0x80>;
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
gpio-controller;
#gpio-cells = <2>;
psc@2000 { // PSC1
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
cell-index = <0>;
};
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
psc@2200 { // PSC2
status = "disabled";
};
usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
psc@2400 { // PSC3
status = "disabled";
};
dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
psc@2600 { // PSC4
status = "disabled";
};
xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <0x1f00 0x100>;
psc@2800 { // PSC5
status = "disabled";
};
serial@2000 { // PSC1
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
cell-index = <0>;
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
psc@2c00 { // PSC6
status = "disabled";
};
// PSC2 in ac97 mode example
//ac97@2200 { // PSC2
// compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
// cell-index = <1>;
// reg = <0x2200 0x100>;
// interrupts = <2 2 0>;
//};
// PSC3 in CODEC mode example
//i2s@2400 { // PSC3
// compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
// cell-index = <2>;
// reg = <0x2400 0x100>;
// interrupts = <2 3 0>;
//};
// PSC4 in uart mode example
//serial@2600 { // PSC4
// compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
// cell-index = <3>;
// reg = <0x2600 0x100>;
// interrupts = <2 11 0>;
//};
// PSC5 in uart mode example
//serial@2800 { // PSC5
// compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
// cell-index = <4>;
// reg = <0x2800 0x100>;
// interrupts = <2 12 0>;
//};
// PSC6 in spi mode example
//spi@2c00 { // PSC6
// compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
// cell-index = <5>;
// reg = <0x2c00 0x100>;
// interrupts = <2 4 0>;
//};
ethernet@3000 {
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
phy-handle = <&phy0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ata@3a00 {
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
};
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d00 0x40>;
interrupts = <2 15 0>;
};
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
......@@ -273,12 +92,6 @@ sram@8000 {
};
pci@f0000d00 {
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <0xf0000d00 0x100>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
0xc000 0 0 2 &mpc5200_pic 1 1 3
......@@ -298,11 +111,6 @@ pci@f0000d00 {
};
localbus {
compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0xfe000000 0x02000000>;
flash@0,0 {
......
arch/powerpc/boot/dts/media5200.dts
View file @ 0bd2cbcd
......@@ -11,14 +11,11 @@
* option) any later version.
*/
/dts-v1/;
/include/ "mpc5200b.dtsi"
/ {
model = "fsl,media5200";
compatible = "fsl,media5200";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&mpc5200_pic>;
aliases {
console = &console;
......@@ -30,16 +27,7 @@ chosen {
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <33000000>; // 33 MHz, these were configured by U-Boot
bus-frequency = <132000000>; // 132 MHz
clock-frequency = <396000000>; // 396 MHz
......@@ -47,205 +35,57 @@ PowerPC,5200@0 {
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; // 128MB RAM
};
soc@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 0xf0000000 0x0000c000>;
reg = <0xf0000000 0x00000100>;
soc5200@f0000000 {
bus-frequency = <132000000>;// 132 MHz
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <0x200 0x38>;
};
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
fsl,has-wdt;
};
timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
};
timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
};
timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x630 0x10>;
interrupts = <1 12 0>;
};
timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x640 0x10>;
interrupts = <1 13 0>;
};
timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x650 0x10>;
interrupts = <1 14 0>;
};
timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x660 0x10>;
interrupts = <1 15 0>;
};
timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x670 0x10>;
interrupts = <1 16 0>;
};
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
};
can@900 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 17 0>;
reg = <0x900 0x80>;
psc@2000 { // PSC1
status = "disabled";
};
can@980 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 18 0>;
reg = <0x980 0x80>;
psc@2200 { // PSC2
status = "disabled";
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
psc@2400 { // PSC3
status = "disabled";
};
gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
gpio-controller;
#gpio-cells = <2>;
psc@2600 { // PSC4
status = "disabled";
};
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
};
usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0x100>;
interrupts = <2 6 0>;
};
dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
};
xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <0x1f00 0x100>;
psc@2800 { // PSC5
status = "disabled";
};
// PSC6 in uart mode
console: serial@2c00 { // PSC6
console: psc@2c00 { // PSC6
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
cell-index = <5>;
port-number = <0>; // Logical port assignment
reg = <0x2c00 0x100>;
interrupts = <2 4 0>;
};
eth0: ethernet@3000 {
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
ethernet@3000 {
phy-handle = <&phy0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ata@3a00 {
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
};
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d00 0x40>;
interrupts = <2 15 0>;
};
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
};
sram@8000 {
compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <0x8000 0x4000>;
usb@1000 {
reg = <0x1000 0x100>;
};
};
pci@f0000d00 {
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <0xf0000d00 0x100>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <0xc000 0 0 1 &media5200_fpga 0 2 // 1st slot
0xc000 0 0 2 &media5200_fpga 0 3
......@@ -262,37 +102,29 @@ pci@f0000d00 {
0xe000 0 0 1 &media5200_fpga 0 5 // CoralIP
>;
clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 10 0>;
interrupt-parent = <&mpc5200_pic>;
bus-range = <0 0>;
ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
interrupt-parent = <&mpc5200_pic>;
};
localbus {
compatible = "fsl,mpc5200b-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = < 0 0 0xfc000000 0x02000000
1 0 0xfe000000 0x02000000
2 0 0xf0010000 0x00010000
3 0 0xf0020000 0x00010000 >;
flash@0,0 {
compatible = "amd,am29lv28ml", "cfi-flash";
reg = <0 0x0 0x2000000>; // 32 MB
bank-width = <4>; // Width in bytes of the flash bank
device-width = <2>; // Two devices on each bank
reg = <0 0x0 0x2000000>; // 32 MB
bank-width = <4>; // Width in bytes of the flash bank
device-width = <2>; // Two devices on each bank
};
flash@1,0 {
compatible = "amd,am29lv28ml", "cfi-flash";
reg = <1 0 0x2000000>; // 32 MB
bank-width = <4>; // Width in bytes of the flash bank
device-width = <2>; // Two devices on each bank
reg = <1 0 0x2000000>; // 32 MB
bank-width = <4>; // Width in bytes of the flash bank
device-width = <2>; // Two devices on each bank
};
media5200_fpga: fpga@2,0 {
......
arch/powerpc/boot/dts/motionpro.dts
View file @ 0bd2cbcd
......@@ -10,219 +10,73 @@
* option) any later version.
*/
/dts-v1/;
/include/ "mpc5200b.dtsi"
/ {
model = "promess,motionpro";
compatible = "promess,motionpro";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x04000000>; // 64MB
};
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 0xf0000000 0x0000c000>;
reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <0x200 0x38>;
};
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
fsl,has-wdt;
};
timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
};
timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
};
timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x630 0x10>;
interrupts = <1 12 0>;
};
timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x640 0x10>;
interrupts = <1 13 0>;
};
timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x650 0x10>;
interrupts = <1 14 0>;
};
motionpro-led@660 { // Motion-PRO status LED
timer@660 { // Motion-PRO status LED
compatible = "promess,motionpro-led";
label = "motionpro-statusled";
reg = <0x660 0x10>;
interrupts = <1 15 0>;
blink-delay = <100>; // 100 msec
};
motionpro-led@670 { // Motion-PRO ready LED
timer@670 { // Motion-PRO ready LED
compatible = "promess,motionpro-led";
label = "motionpro-readyled";
reg = <0x670 0x10>;
interrupts = <1 16 0>;
};
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
};
can@980 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 18 0>;
reg = <0x980 0x80>;
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
can@900 {
status = "disabled";
};
gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
gpio-controller;
#gpio-cells = <2>;
};
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
psc@2000 { // PSC1
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
};
usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
// PSC2 in spi master mode
psc@2200 { // PSC2
compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
cell-index = <1>;
};
dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
psc@2400 { // PSC3
status = "disabled";
};
xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <0x1f00 0x100>;
psc@2600 { // PSC4
status = "disabled";
};
serial@2000 { // PSC1
psc@2800 { // PSC5
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
};
// PSC2 in spi master mode
spi@2200 { // PSC2
compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
cell-index = <1>;
reg = <0x2200 0x100>;
interrupts = <2 2 0>;
};
// PSC5 in uart mode
serial@2800 { // PSC5
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2800 0x100>;
interrupts = <2 12 0>;
psc@2c00 { // PSC6
status = "disabled";
};
ethernet@3000 {
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
phy-handle = <&phy0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
phy0: ethernet-phy@2 {
reg = <2>;
};
};
ata@3a00 {
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
i2c@3d00 {
status = "disabled";
};
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
......@@ -235,10 +89,11 @@ sram@8000 {
};
};
pci@f0000d00 {
status = "disabled";
};
localbus {
compatible = "fsl,mpc5200b-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0xff000000 0x01000000
1 0 0x50000000 0x00010000
2 0 0x50010000 0x00010000
......@@ -280,5 +135,6 @@ flash@0,0 {
#size-cells = <1>;
#address-cells = <1>;
};
};
};
arch/powerpc/boot/dts/mpc5200b.dtsi 0 → 100644
View file @ 0bd2cbcd
/*
* base MPC5200b Device Tree Source
*
* Copyright (C) 2010 SecretLab
* Grant Likely <grant@secretlab.ca>
* John Bonesio <bones@secretlab.ca>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "fsl,mpc5200b";
compatible = "fsl,mpc5200b";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
powerpc: PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
};
};
memory: memory {
device_type = "memory";
reg = <0x00000000 0x04000000>; // 64MB
};
soc: soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 0xf0000000 0x0000c000>;
reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <0x200 0x38>;
};
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
};
timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
};
timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
};
timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x630 0x10>;
interrupts = <1 12 0>;
};
timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x640 0x10>;
interrupts = <1 13 0>;
};
timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x650 0x10>;
interrupts = <1 14 0>;
};
timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x660 0x10>;
interrupts = <1 15 0>;
};
timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x670 0x10>;
interrupts = <1 16 0>;
};
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
};
can@900 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 17 0>;
reg = <0x900 0x80>;
};
can@980 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 18 0>;
reg = <0x980 0x80>;
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
gpio-controller;
#gpio-cells = <2>;
};
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
};
usb: usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
};
dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
};
xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <0x1f00 0x100>;
};
psc1: psc@2000 { // PSC1
compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
};
psc2: psc@2200 { // PSC2
compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
reg = <0x2200 0x100>;
interrupts = <2 2 0>;
};
psc3: psc@2400 { // PSC3
compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
reg = <0x2400 0x100>;
interrupts = <2 3 0>;
};
psc4: psc@2600 { // PSC4
compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
reg = <0x2600 0x100>;
interrupts = <2 11 0>;
};
psc5: psc@2800 { // PSC5
compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
reg = <0x2800 0x100>;
interrupts = <2 12 0>;
};
psc6: psc@2c00 { // PSC6
compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
reg = <0x2c00 0x100>;
interrupts = <2 4 0>;
};
eth0: ethernet@3000 {
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
};
ata@3a00 {
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
};
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d00 0x40>;
interrupts = <2 15 0>;
};
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
};
sram@8000 {
compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <0x8000 0x4000>;
};
};
pci: pci@f0000d00 {
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <0xf0000d00 0x100>;
// interrupt-map-mask = need to add
// interrupt-map = need to add
clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 10 0>;
bus-range = <0 0>;
// ranges = need to add
};
localbus: localbus {
compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0xfc000000 0x2000000>;
};
};
arch/powerpc/boot/dts/mucmc52.dts
View file @ 0bd2cbcd
......@@ -11,172 +11,109 @@
* option) any later version.
*/
/dts-v1/;
/include/ "mpc5200b.dtsi"
/ {
model = "manroland,mucmc52";
compatible = "manroland,mucmc52";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x04000000>; // 64MB
};
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 0xf0000000 0x0000c000>;
reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <0x200 0x38>;
};
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
gpt0: timer@600 { // GPT 0 in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt1: timer@610 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt2: timer@620 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt3: timer@630 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x630 0x10>;
interrupts = <1 12 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
timer@640 {
status = "disabled";
};
gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
gpio-controller;
#gpio-cells = <2>;
timer@650 {
status = "disabled";
};
timer@660 {
status = "disabled";
};
timer@670 {
status = "disabled";
};
dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
rtc@800 {
status = "disabled";
};
xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <0x1f00 0x100>;
can@900 {
status = "disabled";
};
serial@2000 { /* PSC1 in UART mode */
can@980 {
status = "disabled";
};
spi@f00 {
status = "disabled";
};
usb@1000 {
status = "disabled";
};
psc@2000 { // PSC1
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
};
serial@2200 { /* PSC2 in UART mode */
psc@2200 { // PSC2
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2200 0x100>;
interrupts = <2 2 0>;
};
serial@2c00 { /* PSC6 in UART mode */
psc@2400 { // PSC3
status = "disabled";
};
psc@2600 { // PSC4
status = "disabled";
};
psc@2800 { // PSC5
status = "disabled";
};
psc@2c00 { // PSC6
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2c00 0x100>;
interrupts = <2 4 0>;
};
ethernet@3000 {
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
phy-handle = <&phy0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
phy0: ethernet-phy@0 {
compatible = "intel,lxt971";
reg = <0>;
};
};
ata@3a00 {
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
i2c@3d00 {
status = "disabled";
};
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
hwmon@2c {
compatible = "ad,adm9240";
reg = <0x2c>;
......@@ -186,20 +123,9 @@ rtc@51 {
reg = <0x51>;
};
};
sram@8000 {
compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <0x8000 0x4000>;
};
};
pci@f0000d00 {
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <0xf0000d00 0x100>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x10 */
......@@ -208,20 +134,12 @@ pci@f0000d00 {
0x8000 0 0 3 &mpc5200_pic 0 2 3
0x8000 0 0 4 &mpc5200_pic 0 1 3
>;
clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 10 0>;
bus-range = <0 0>;
ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000
0x02000000 0 0x90000000 0x90000000 0 0x10000000
0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
};
localbus {
compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0xff800000 0x00800000
1 0 0x80000000 0x00800000
3 0 0x80000000 0x00800000>;
......
arch/powerpc/boot/dts/pcm030.dts
View file @ 0bd2cbcd
......@@ -12,246 +12,92 @@
* option) any later version.
*/
/dts-v1/;
/include/ "mpc5200b.dtsi"
/ {
model = "phytec,pcm030";
compatible = "phytec,pcm030";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x04000000>; // 64MB
};
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 0xf0000000 0x0000c000>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <0x200 0x38>;
};
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
timer@600 { // General Purpose Timer
fsl,has-wdt;
};
timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
};
gpt2: timer@620 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt3: timer@630 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
reg = <0x630 0x10>;
interrupts = <1 12 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt4: timer@640 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
reg = <0x640 0x10>;
interrupts = <1 13 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt5: timer@650 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
reg = <0x650 0x10>;
interrupts = <1 14 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt6: timer@660 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
reg = <0x660 0x10>;
interrupts = <1 15 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt7: timer@670 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
reg = <0x670 0x10>;
interrupts = <1 16 0>;
gpio-controller;
#gpio-cells = <2>;
};
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
};
can@900 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 17 0>;
reg = <0x900 0x80>;
};
can@980 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 18 0>;
reg = <0x980 0x80>;
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
gpio-controller;
#gpio-cells = <2>;
};
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
};
usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
};
dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
};
xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <0x1f00 0x100>;
};
ac97@2000 { /* PSC1 in ac97 mode */
psc@2000 { /* PSC1 in ac97 mode */
compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
cell-index = <0>;
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
};
/* PSC2 port is used by CAN1/2 */
psc@2200 {
status = "disabled";
};
serial@2400 { /* PSC3 in UART mode */
psc@2400 { /* PSC3 in UART mode */
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
cell-index = <2>;
reg = <0x2400 0x100>;
interrupts = <2 3 0>;
};
/* PSC4 is ??? */
psc@2600 {
status = "disabled";
};
/* PSC5 is ??? */
psc@2800 {
status = "disabled";
};
serial@2c00 { /* PSC6 in UART mode */
psc@2c00 { /* PSC6 in UART mode */
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
cell-index = <5>;
reg = <0x2c00 0x100>;
interrupts = <2 4 0>;
};
ethernet@3000 {
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
phy-handle = <&phy0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ata@3a00 {
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
};
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d00 0x40>;
interrupts = <2 15 0>;
};
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
......@@ -259,6 +105,7 @@ rtc@51 {
eeprom@52 {
compatible = "catalyst,24c32";
reg = <0x52>;
pagesize = <32>;
};
};
......@@ -269,12 +116,6 @@ sram@8000 {
};
pci@f0000d00 {
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <0xf0000d00 0x100>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
0xc000 0 0 2 &mpc5200_pic 1 1 3
......@@ -285,11 +126,12 @@ pci@f0000d00 {
0xc800 0 0 2 &mpc5200_pic 1 2 3
0xc800 0 0 3 &mpc5200_pic 1 3 3
0xc800 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 10 0>;
bus-range = <0 0>;
ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
};
localbus {
status = "disabled";
};
};
arch/powerpc/boot/dts/pcm032.dts
View file @ 0bd2cbcd
......@@ -12,99 +12,37 @@
* option) any later version.
*/
/dts-v1/;
/include/ "mpc5200b.dtsi"
/ {
model = "phytec,pcm032";
compatible = "phytec,pcm032";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; // 128MB
};
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 0xf0000000 0x0000c000>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <0x200 0x38>;
};
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
timer@600 { // General Purpose Timer
fsl,has-wdt;
};
timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
};
gpt2: timer@620 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt3: timer@630 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x630 0x10>;
interrupts = <1 12 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt4: timer@640 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x640 0x10>;
interrupts = <1 13 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt5: timer@650 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x650 0x10>;
interrupts = <1 14 0>;
gpio-controller;
#gpio-cells = <2>;
};
......@@ -118,163 +56,62 @@ gpt6: timer@660 { // General Purpose Timer in GPIO mode
};
gpt7: timer@670 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x670 0x10>;
interrupts = <1 16 0>;
gpio-controller;
#gpio-cells = <2>;
};
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
};
can@900 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 17 0>;
reg = <0x900 0x80>;
};
can@980 {
compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 18 0>;
reg = <0x980 0x80>;
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
gpio-controller;
#gpio-cells = <2>;
};
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
};
usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
};
dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
};
xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <0x1f00 0x100>;
};
ac97@2000 { /* PSC1 is ac97 */
psc@2000 { /* PSC1 is ac97 */
compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
cell-index = <0>;
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
};
/* PSC2 port is used by CAN1/2 */
psc@2200 {
status = "disabled";
};
serial@2400 { /* PSC3 in UART mode */
psc@2400 { /* PSC3 in UART mode */
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
cell-index = <2>;
reg = <0x2400 0x100>;
interrupts = <2 3 0>;
};
/* PSC4 is ??? */
psc@2600 {
status = "disabled";
};
/* PSC5 is ??? */
psc@2800 {
status = "disabled";
};
serial@2c00 { /* PSC6 in UART mode */
psc@2c00 { /* PSC6 in UART mode */
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
cell-index = <5>;
reg = <0x2c00 0x100>;
interrupts = <2 4 0>;
};
ethernet@3000 {
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
phy-handle = <&phy0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ata@3a00 {
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
};
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d00 0x40>;
interrupts = <2 15 0>;
};
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
eeprom@52 {
compatible = "at24,24c32";
compatible = "catalyst,24c32";
reg = <0x52>;
pagesize = <32>;
};
};
sram@8000 {
compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <0x8000 0x4000>;
};
};
pci@f0000d00 {
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <0xf0000d00 0x100>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
0xc000 0 0 2 &mpc5200_pic 1 1 3
......@@ -285,20 +122,12 @@ pci@f0000d00 {
0xc800 0 0 2 &mpc5200_pic 1 2 3
0xc800 0 0 3 &mpc5200_pic 1 3 3
0xc800 0 0 4 &mpc5200_pic 0 0 3>;
clock-frequency = <0>; // From boot loader
interrupts = <2 8 0 2 9 0 2 10 0>;
bus-range = <0 0>;
ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
};
localbus {
compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0xfe000000 0x02000000
1 0 0xfc000000 0x02000000
2 0 0xfbe00000 0x00200000
......@@ -351,40 +180,39 @@ sram@2,0 {
bank-width = <2>;
};
/*
/*
* example snippets for FPGA
*
* fpga@3,0 {
* compatible = "fpga_driver";
* reg = <3 0 0x02000000>;
* bank-width = <4>;
* compatible = "fpga_driver";
* reg = <3 0 0x02000000>;
* bank-width = <4>;
* };
*
* fpga@4,0 {
* compatible = "fpga_driver";
* reg = <4 0 0x02000000>;
* bank-width = <4>;
* compatible = "fpga_driver";
* reg = <4 0 0x02000000>;
* bank-width = <4>;
* };
*/
*/
/*
/*
* example snippets for free chipselects
*
*
* device@5,0 {
* compatible = "custom_driver";
* reg = <5 0 0x02000000>;
* compatible = "custom_driver";
* reg = <5 0 0x02000000>;
* };
*
*
* device@6,0 {
* compatible = "custom_driver";
* reg = <6 0 0x02000000>;
* compatible = "custom_driver";
* reg = <6 0 0x02000000>;
* };
*
*
* device@7,0 {
* compatible = "custom_driver";
* reg = <7 0 0x02000000>;
* compatible = "custom_driver";
* reg = <7 0 0x02000000>;
* };
*/
*/
};
};
arch/powerpc/boot/dts/uc101.dts
View file @ 0bd2cbcd
......@@ -11,79 +11,24 @@
* option) any later version.
*/
/dts-v1/;
/include/ "mpc5200b.dtsi"
/ {
model = "manroland,uc101";
compatible = "manroland,uc101";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&mpc5200_pic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x04000000>; // 64MB
};
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 0xf0000000 0x0000c000>;
reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <0x200 0x38>;
};
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <0x500 0x80>;
};
gpt0: timer@600 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x600 0x10>;
interrupts = <1 9 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt1: timer@610 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x610 0x10>;
interrupts = <1 10 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt2: timer@620 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
gpio-controller;
#gpio-cells = <2>;
};
......@@ -97,118 +42,85 @@ gpt3: timer@630 { // General Purpose Timer in GPIO mode
};
gpt4: timer@640 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x640 0x10>;
interrupts = <1 13 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt5: timer@650 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x650 0x10>;
interrupts = <1 14 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt6: timer@660 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x660 0x10>;
interrupts = <1 15 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpt7: timer@670 { // General Purpose Timer in GPIO mode
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <0x670 0x10>;
interrupts = <1 16 0>;
gpio-controller;
#gpio-cells = <2>;
};
gpio_simple: gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
gpio-controller;
#gpio-cells = <2>;
rtc@800 {
status = "disabled";
};
gpio_wkup: gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
gpio-controller;
#gpio-cells = <2>;
can@900 {
status = "disabled";
};
can@980 {
status = "disabled";
};
dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
spi@f00 {
status = "disabled";
};
xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <0x1f00 0x100>;
usb@1000 {
status = "disabled";
};
serial@2000 { /* PSC1 in UART mode */
psc@2000 { // PSC1
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
};
serial@2200 { /* PSC2 in UART mode */
psc@2200 { // PSC2
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2200 0x100>;
interrupts = <2 2 0>;
};
serial@2c00 { /* PSC6 in UART mode */
psc@2400 { // PSC3
status = "disabled";
};
psc@2600 { // PSC4
status = "disabled";
};
psc@2800 { // PSC5
status = "disabled";
};
psc@2c00 { // PSC6
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2c00 0x100>;
interrupts = <2 4 0>;
};
ethernet@3000 {
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
phy-handle = <&phy0>;
};
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
phy0: ethernet-phy@0 {
compatible = "intel,lxt971";
reg = <0>;
};
};
ata@3a00 {
compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <0x3a00 0x100>;
interrupts = <2 7 0>;
i2c@3d00 {
status = "disabled";
};
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
fsl,preserve-clocking;
clock-frequency = <400000>;
......@@ -221,19 +133,13 @@ rtc@51 {
reg = <0x51>;
};
};
};
sram@8000 {
compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <0x8000 0x4000>;
};
pci@f0000d00 {
status = "disabled";
};
localbus {
compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0xff800000 0x00800000
1 0 0x80000000 0x00800000
3 0 0x80000000 0x00800000>;
......
arch/powerpc/include/asm/prom.h
View file @ 0bd2cbcd
......@@ -42,7 +42,7 @@ extern void pci_create_OF_bus_map(void);
/* Translate a DMA address from device space to CPU space */
extern u64 of_translate_dma_address(struct device_node *dev,
const u32 *in_addr);
const __be32 *in_addr);
#ifdef CONFIG_PCI
extern unsigned long pci_address_to_pio(phys_addr_t address);
......@@ -63,9 +63,6 @@ struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
/* cache lookup */
struct device_node *of_find_next_cache_node(struct device_node *np);
/* Get the MAC address */
extern const void *of_get_mac_address(struct device_node *np);
#ifdef CONFIG_NUMA
extern int of_node_to_nid(struct device_node *device);
#else
......
arch/powerpc/kernel/prom_parse.c
View file @ 0bd2cbcd
......@@ -117,41 +117,3 @@ void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
cells = prop ? *(u32 *)prop : of_n_size_cells(dn);
*size = of_read_number(dma_window, cells);
}
/**
* Search the device tree for the best MAC address to use. 'mac-address' is
* checked first, because that is supposed to contain to "most recent" MAC
* address. If that isn't set, then 'local-mac-address' is checked next,
* because that is the default address. If that isn't set, then the obsolete
* 'address' is checked, just in case we're using an old device tree.
*
* Note that the 'address' property is supposed to contain a virtual address of
* the register set, but some DTS files have redefined that property to be the
* MAC address.
*
* All-zero MAC addresses are rejected, because those could be properties that
* exist in the device tree, but were not set by U-Boot. For example, the
* DTS could define 'mac-address' and 'local-mac-address', with zero MAC
* addresses. Some older U-Boots only initialized 'local-mac-address'. In
* this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
* but is all zeros.
*/
const void *of_get_mac_address(struct device_node *np)
{
struct property *pp;
pp = of_find_property(np, "mac-address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
pp = of_find_property(np, "local-mac-address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
pp = of_find_property(np, "address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
return NULL;
}
EXPORT_SYMBOL(of_get_mac_address);
arch/powerpc/platforms/40x/ppc40x_simple.c
View file @ 0bd2cbcd
......@@ -50,7 +50,7 @@ machine_device_initcall(ppc40x_simple, ppc40x_device_probe);
* Again, if your board needs to do things differently then create a
* board.c file for it rather than adding it to this list.
*/
static char *board[] __initdata = {
static const char *board[] __initdata = {
"amcc,acadia",
"amcc,haleakala",
"amcc,kilauea",
......@@ -60,14 +60,9 @@ static char *board[] __initdata = {
static int __init ppc40x_probe(void)
{
unsigned long root = of_get_flat_dt_root();
int i = 0;
for (i = 0; i < ARRAY_SIZE(board); i++) {
if (of_flat_dt_is_compatible(root, board[i])) {
ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
return 1;
}
if (of_flat_dt_match(of_get_flat_dt_root(), board)) {
ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
return 1;
}
return 0;
......
arch/powerpc/platforms/512x/mpc5121_generic.c
View file @ 0bd2cbcd
......@@ -26,7 +26,7 @@
/*
* list of supported boards
*/
static char *board[] __initdata = {
static const char *board[] __initdata = {
"prt,prtlvt",
NULL
};
......@@ -36,16 +36,7 @@ static char *board[] __initdata = {
*/
static int __init mpc5121_generic_probe(void)
{
unsigned long node = of_get_flat_dt_root();
int i = 0;
while (board[i]) {
if (of_flat_dt_is_compatible(node, board[i]))
break;
i++;
}
return board[i] != NULL;
return of_flat_dt_match(of_get_flat_dt_root(), board);
}
define_machine(mpc5121_generic) {
......
arch/powerpc/platforms/52xx/lite5200.c
View file @ 0bd2cbcd
......@@ -172,20 +172,18 @@ static void __init lite5200_setup_arch(void)
mpc52xx_setup_pci();
}
static const char *board[] __initdata = {
"fsl,lite5200",
"fsl,lite5200b",
NULL,
};
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init lite5200_probe(void)
{
unsigned long node = of_get_flat_dt_root();
const char *model = of_get_flat_dt_prop(node, "model", NULL);
if (!of_flat_dt_is_compatible(node, "fsl,lite5200") &&
!of_flat_dt_is_compatible(node, "fsl,lite5200b"))
return 0;
pr_debug("%s board found\n", model ? model : "unknown");
return 1;
return of_flat_dt_match(of_get_flat_dt_root(), board);
}
define_machine(lite5200) {
......
arch/powerpc/platforms/52xx/media5200.c
View file @ 0bd2cbcd
......@@ -239,7 +239,7 @@ static void __init media5200_setup_arch(void)
}
/* list of the supported boards */
static char *board[] __initdata = {
static const char *board[] __initdata = {
"fsl,media5200",
NULL
};
......@@ -249,16 +249,7 @@ static char *board[] __initdata = {
*/
static int __init media5200_probe(void)
{
unsigned long node = of_get_flat_dt_root();
int i = 0;
while (board[i]) {
if (of_flat_dt_is_compatible(node, board[i]))
break;
i++;
}
return (board[i] != NULL);
return of_flat_dt_match(of_get_flat_dt_root(), board);
}
define_machine(media5200_platform) {
......
arch/powerpc/platforms/52xx/mpc5200_simple.c
View file @ 0bd2cbcd
......@@ -49,7 +49,7 @@ static void __init mpc5200_simple_setup_arch(void)
}
/* list of the supported boards */
static char *board[] __initdata = {
static const char *board[] __initdata = {
"intercontrol,digsy-mtc",
"manroland,mucmc52",
"manroland,uc101",
......@@ -66,16 +66,7 @@ static char *board[] __initdata = {
*/
static int __init mpc5200_simple_probe(void)
{
unsigned long node = of_get_flat_dt_root();
int i = 0;
while (board[i]) {
if (of_flat_dt_is_compatible(node, board[i]))
break;
i++;
}
return (board[i] != NULL);
return of_flat_dt_match(of_get_flat_dt_root(), board);
}
define_machine(mpc5200_simple_platform) {
......
arch/powerpc/platforms/83xx/mpc830x_rdb.c
View file @ 0bd2cbcd
......@@ -57,16 +57,19 @@ static void __init mpc830x_rdb_init_IRQ(void)
ipic_set_default_priority();
}
struct const char *board[] __initdata = {
"MPC8308RDB",
"fsl,mpc8308rdb",
"denx,mpc8308_p1m",
NULL
}
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc830x_rdb_probe(void)
{
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "MPC8308RDB") ||
of_flat_dt_is_compatible(root, "fsl,mpc8308rdb") ||
of_flat_dt_is_compatible(root, "denx,mpc8308_p1m");
return of_flat_dt_match(of_get_flat_dt_root(), board);
}
static struct of_device_id __initdata of_bus_ids[] = {
......
arch/powerpc/platforms/83xx/mpc831x_rdb.c
View file @ 0bd2cbcd
......@@ -60,15 +60,18 @@ static void __init mpc831x_rdb_init_IRQ(void)
ipic_set_default_priority();
}
struct const char *board[] __initdata = {
"MPC8313ERDB",
"fsl,mpc8315erdb",
NULL
}
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc831x_rdb_probe(void)
{
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "MPC8313ERDB") ||
of_flat_dt_is_compatible(root, "fsl,mpc8315erdb");
return of_flat_dt_match(of_get_flat_dt_root(), board);
}
static struct of_device_id __initdata of_bus_ids[] = {
......
arch/powerpc/platforms/83xx/mpc837x_rdb.c
View file @ 0bd2cbcd
......@@ -101,17 +101,20 @@ static void __init mpc837x_rdb_init_IRQ(void)
ipic_set_default_priority();
}
static const char *board[] __initdata = {
"fsl,mpc8377rdb",
"fsl,mpc8378rdb",
"fsl,mpc8379rdb",
"fsl,mpc8377wlan",
NULL
};
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc837x_rdb_probe(void)
{
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "fsl,mpc8377rdb") ||
of_flat_dt_is_compatible(root, "fsl,mpc8378rdb") ||
of_flat_dt_is_compatible(root, "fsl,mpc8379rdb") ||
of_flat_dt_is_compatible(root, "fsl,mpc8377wlan");
return of_flat_dt_match(of_get_flat_dt_root(), board);
}
define_machine(mpc837x_rdb) {
......
arch/powerpc/platforms/85xx/tqm85xx.c
View file @ 0bd2cbcd
......@@ -186,21 +186,21 @@ static int __init declare_of_platform_devices(void)
}
machine_device_initcall(tqm85xx, declare_of_platform_devices);
static const char *board[] __initdata = {
"tqc,tqm8540",
"tqc,tqm8541",
"tqc,tqm8548",
"tqc,tqm8555",
"tqc,tqm8560",
NULL
};
/*
* Called very early, device-tree isn't unflattened
*/
static int __init tqm85xx_probe(void)
{
unsigned long root = of_get_flat_dt_root();
if ((of_flat_dt_is_compatible(root, "tqc,tqm8540")) ||
(of_flat_dt_is_compatible(root, "tqc,tqm8541")) ||
(of_flat_dt_is_compatible(root, "tqc,tqm8548")) ||
(of_flat_dt_is_compatible(root, "tqc,tqm8555")) ||
(of_flat_dt_is_compatible(root, "tqc,tqm8560")))
return 1;
return 0;
return of_flat_dt_match(of_get_flat_dt_root(), board);
}
define_machine(tqm85xx) {
......
arch/powerpc/sysdev/mv64x60_dev.c
View file @ 0bd2cbcd
......@@ -16,6 +16,7 @@
#include <linux/mv643xx.h>
#include <linux/platform_device.h>
#include <linux/of_platform.h>
#include <linux/of_net.h>
#include <linux/dma-mapping.h>
#include <asm/prom.h>
......
arch/powerpc/sysdev/tsi108_dev.c
View file @ 0bd2cbcd
......@@ -19,6 +19,7 @@
#include <linux/module.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/of_net.h>
#include <asm/tsi108.h>
#include <asm/system.h>
......
arch/sparc/kernel/auxio_32.c
View file @ 0bd2cbcd
......@@ -121,7 +121,7 @@ void __init auxio_power_probe(void)
node = prom_searchsiblings(node, "obio");
node = prom_getchild(node);
node = prom_searchsiblings(node, "power");
if (node == 0 || node == -1)
if (node == 0 || (s32)node == -1)
return;
/* Map the power control register. */
......
arch/sparc/kernel/starfire.c
View file @ 0bd2cbcd
......@@ -24,7 +24,7 @@ int this_is_starfire = 0;
void check_if_starfire(void)
{
phandle ssnode = prom_finddevice("/ssp-serial");
if (ssnode != 0 && ssnode != -1)
if (ssnode != 0 && (s32)ssnode != -1)
this_is_starfire = 1;
}
......
arch/sparc/prom/init_32.c
View file @ 0bd2cbcd
......@@ -60,7 +60,7 @@ void __init prom_init(struct linux_romvec *rp)
prom_nodeops = romvec->pv_nodeops;
prom_root_node = prom_getsibling(0);
if((prom_root_node == 0) || (prom_root_node == -1))
if ((prom_root_node == 0) || ((s32)prom_root_node == -1))
prom_halt();
if((((unsigned long) prom_nodeops) == 0) ||
......
arch/sparc/prom/init_64.c
View file @ 0bd2cbcd
......@@ -35,13 +35,13 @@ void __init prom_init(void *cif_handler, void *cif_stack)
prom_cif_init(cif_handler, cif_stack);
prom_chosen_node = prom_finddevice(prom_chosen_path);
if (!prom_chosen_node || prom_chosen_node == -1)
if (!prom_chosen_node || (s32)prom_chosen_node == -1)
prom_halt();
prom_stdout = prom_getint(prom_chosen_node, "stdout");
node = prom_finddevice("/openprom");
if (!node || node == -1)
if (!node || (s32)node == -1)
prom_halt();
prom_getstring(node, "version", prom_version, sizeof(prom_version));
......
arch/sparc/prom/tree_32.c
View file @ 0bd2cbcd
......@@ -40,11 +40,11 @@ phandle prom_getchild(phandle node)
{
phandle cnode;
if (node == -1)
if ((s32)node == -1)
return 0;
cnode = __prom_getchild(node);
if (cnode == 0 || cnode == -1)
if (cnode == 0 || (s32)cnode == -1)
return 0;
return cnode;
......@@ -72,11 +72,11 @@ phandle prom_getsibling(phandle node)
{
phandle sibnode;
if (node == -1)
if ((s32)node == -1)
return 0;
sibnode = __prom_getsibling(node);
if (sibnode == 0 || sibnode == -1)
if (sibnode == 0 || (s32)sibnode == -1)
return 0;
return sibnode;
......@@ -219,7 +219,7 @@ static char *__prom_nextprop(phandle node, char * oprop)
*/
char *prom_nextprop(phandle node, char *oprop, char *buffer)
{
if (node == 0 || node == -1)
if (node == 0 || (s32)node == -1)
return "";
return __prom_nextprop(node, oprop);
......@@ -253,7 +253,7 @@ phandle prom_finddevice(char *name)
if (d != s + 3 && (!*d || *d == '/')
&& d <= s + 3 + 8) {
node2 = node;
while (node2 && node2 != -1) {
while (node2 && (s32)node2 != -1) {
if (prom_getproperty (node2, "reg", (char *)reg, sizeof (reg)) > 0) {
if (which_io == reg[0].which_io && phys_addr == reg[0].phys_addr) {
node = node2;
......@@ -261,7 +261,7 @@ phandle prom_finddevice(char *name)
}
}
node2 = prom_getsibling(node2);
if (!node2 || node2 == -1)
if (!node2 || (s32)node2 == -1)
break;
node2 = prom_searchsiblings(prom_getsibling(node2), nbuf);
}
......@@ -303,6 +303,7 @@ phandle prom_inst2pkg(int inst)
node = (*romvec->pv_v2devops.v2_inst2pkg)(inst);
restore_current();
spin_unlock_irqrestore(&prom_lock, flags);
if (node == -1) return 0;
if ((s32)node == -1)
return 0;
return node;
}
arch/sparc/prom/tree_64.c
View file @ 0bd2cbcd
......@@ -43,10 +43,10 @@ inline phandle prom_getchild(phandle node)
{
phandle cnode;
if (node == -1)
if ((s32)node == -1)
return 0;
cnode = __prom_getchild(node);
if (cnode == -1)
if ((s32)cnode == -1)
return 0;
return cnode;
}
......@@ -56,10 +56,10 @@ inline phandle prom_getparent(phandle node)
{
phandle cnode;
if (node == -1)
if ((s32)node == -1)
return 0;
cnode = prom_node_to_node("parent", node);
if (cnode == -1)
if ((s32)cnode == -1)
return 0;
return cnode;
}
......@@ -76,10 +76,10 @@ inline phandle prom_getsibling(phandle node)
{
phandle sibnode;
if (node == -1)
if ((s32)node == -1)
return 0;
sibnode = __prom_getsibling(node);
if (sibnode == -1)
if ((s32)sibnode == -1)
return 0;
return sibnode;
......@@ -240,7 +240,7 @@ inline char *prom_firstprop(phandle node, char *buffer)
unsigned long args[7];
*buffer = 0;
if (node == -1)
if ((s32)node == -1)
return buffer;
args[0] = (unsigned long) prom_nextprop_name;
......@@ -266,7 +266,7 @@ inline char *prom_nextprop(phandle node, const char *oprop, char *buffer)
unsigned long args[7];
char buf[32];
if (node == -1) {
if ((s32)node == -1) {
*buffer = 0;
return buffer;
}
......@@ -369,7 +369,7 @@ inline phandle prom_inst2pkg(int inst)
p1275_cmd_direct(args);
node = (int) args[4];
if (node == -1)
if ((s32)node == -1)
return 0;
return node;
}
......
drivers/char/ipmi/ipmi_si_intf.c
View file @ 0bd2cbcd
......@@ -69,6 +69,8 @@
#ifdef CONFIG_PPC_OF
#include <linux/of_device.h>
#include <linux/of_platform.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#endif
#define PFX "ipmi_si: "
......@@ -2546,7 +2548,7 @@ static int __devinit ipmi_of_probe(struct platform_device *dev,
{
struct smi_info *info;
struct resource resource;
const int *regsize, *regspacing, *regshift;
const __be32 *regsize, *regspacing, *regshift;
struct device_node *np = dev->dev.of_node;
int ret;
int proplen;
......@@ -2599,9 +2601,9 @@ static int __devinit ipmi_of_probe(struct platform_device *dev,
info->io.addr_data = resource.start;
info->io.regsize = regsize ? *regsize : DEFAULT_REGSIZE;
info->io.regspacing = regspacing ? *regspacing : DEFAULT_REGSPACING;
info->io.regshift = regshift ? *regshift : 0;
info->io.regsize = regsize ? be32_to_cpup(regsize) : DEFAULT_REGSIZE;
info->io.regspacing = regspacing ? be32_to_cpup(regspacing) : DEFAULT_REGSPACING;
info->io.regshift = regshift ? be32_to_cpup(regshift) : 0;
info->irq = irq_of_parse_and_map(dev->dev.of_node, 0);
info->dev = &dev->dev;
......
drivers/misc/eeprom/at24.c
View file @ 0bd2cbcd
......@@ -20,6 +20,7 @@
#include <linux/log2.h>
#include <linux/bitops.h>
#include <linux/jiffies.h>
#include <linux/of.h>
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
......@@ -457,6 +458,27 @@ static ssize_t at24_macc_write(struct memory_accessor *macc, const char *buf,
/*-------------------------------------------------------------------------*/
#ifdef CONFIG_OF
static void at24_get_ofdata(struct i2c_client *client,
struct at24_platform_data *chip)
{
const __be32 *val;
struct device_node *node = client->dev.of_node;
if (node) {
if (of_get_property(node, "read-only", NULL))
chip->flags |= AT24_FLAG_READONLY;
val = of_get_property(node, "pagesize", NULL);
if (val)
chip->page_size = be32_to_cpup(val);
}
}
#else
static void at24_get_ofdata(struct i2c_client *client,
struct at24_platform_data *chip)
{ }
#endif /* CONFIG_OF */
static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct at24_platform_data chip;
......@@ -485,6 +507,9 @@ static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
*/
chip.page_size = 1;
/* update chipdata if OF is present */
at24_get_ofdata(client, &chip);
chip.setup = NULL;
chip.context = NULL;
}
......@@ -492,6 +517,11 @@ static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
if (!is_power_of_2(chip.byte_len))
dev_warn(&client->dev,
"byte_len looks suspicious (no power of 2)!\n");
if (!chip.page_size) {
dev_err(&client->dev, "page_size must not be 0!\n");
err = -EINVAL;
goto err_out;
}
if (!is_power_of_2(chip.page_size))
dev_warn(&client->dev,
"page_size looks suspicious (no power of 2)!\n");
......@@ -597,19 +627,15 @@ static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
i2c_set_clientdata(client, at24);
dev_info(&client->dev, "%zu byte %s EEPROM %s\n",
dev_info(&client->dev, "%zu byte %s EEPROM, %s, %u bytes/write\n",
at24->bin.size, client->name,
writable ? "(writable)" : "(read-only)");
writable ? "writable" : "read-only", at24->write_max);
if (use_smbus == I2C_SMBUS_WORD_DATA ||
use_smbus == I2C_SMBUS_BYTE_DATA) {
dev_notice(&client->dev, "Falling back to %s reads, "
"performance will suffer\n", use_smbus ==
I2C_SMBUS_WORD_DATA ? "word" : "byte");
}
dev_dbg(&client->dev,
"page_size %d, num_addresses %d, write_max %d, use_smbus %d\n",
chip.page_size, num_addresses,
at24->write_max, use_smbus);
/* export data to kernel code */
if (chip.setup)
......@@ -660,6 +686,11 @@ static struct i2c_driver at24_driver = {
static int __init at24_init(void)
{
if (!io_limit) {
pr_err("at24: io_limit must not be 0!\n");
return -EINVAL;
}
io_limit = rounddown_pow_of_two(io_limit);
return i2c_add_driver(&at24_driver);
}
......
drivers/mmc/host/Kconfig
View file @ 0bd2cbcd
......@@ -83,7 +83,7 @@ config MMC_RICOH_MMC
config MMC_SDHCI_OF
tristate "SDHCI support on OpenFirmware platforms"
depends on MMC_SDHCI && PPC_OF
depends on MMC_SDHCI && OF
help
This selects the OF support for Secure Digital Host Controller
Interfaces.
......@@ -93,6 +93,7 @@ config MMC_SDHCI_OF
config MMC_SDHCI_OF_ESDHC
bool "SDHCI OF support for the Freescale eSDHC controller"
depends on MMC_SDHCI_OF
depends on PPC_OF
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help
This selects the Freescale eSDHC controller support.
......@@ -102,6 +103,7 @@ config MMC_SDHCI_OF_ESDHC
config MMC_SDHCI_OF_HLWD
bool "SDHCI OF support for the Nintendo Wii SDHCI controllers"
depends on MMC_SDHCI_OF
depends on PPC_OF
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help
This selects the Secure Digital Host Controller Interface (SDHCI)
......
drivers/mmc/host/sdhci-of-core.c
View file @ 0bd2cbcd
......@@ -122,7 +122,7 @@ static int __devinit sdhci_of_probe(struct platform_device *ofdev,
struct sdhci_of_data *sdhci_of_data = match->data;
struct sdhci_host *host;
struct sdhci_of_host *of_host;
const u32 *clk;
const __be32 *clk;
int size;
int ret;
......@@ -166,7 +166,7 @@ static int __devinit sdhci_of_probe(struct platform_device *ofdev,
clk = of_get_property(np, "clock-frequency", &size);
if (clk && size == sizeof(*clk) && *clk)
of_host->clock = *clk;
of_host->clock = be32_to_cpup(clk);
ret = sdhci_add_host(host);
if (ret)
......
drivers/mtd/Kconfig
View file @ 0bd2cbcd
......@@ -159,7 +159,7 @@ config MTD_AFS_PARTS
config MTD_OF_PARTS
tristate "Flash partition map based on OF description"
depends on (MICROBLAZE || PPC_OF) && MTD_PARTITIONS
depends on OF && MTD_PARTITIONS
help
This provides a partition parsing function which derives
the partition map from the children of the flash node,
......
drivers/mtd/maps/Kconfig
View file @ 0bd2cbcd
......@@ -72,7 +72,7 @@ config MTD_PHYSMAP_BANKWIDTH
config MTD_PHYSMAP_OF
tristate "Flash device in physical memory map based on OF description"
depends on (MICROBLAZE || PPC_OF) && (MTD_CFI || MTD_JEDECPROBE || MTD_ROM)
depends on OF && (MTD_CFI || MTD_JEDECPROBE || MTD_ROM)
help
This provides a 'mapping' driver which allows the NOR Flash and
ROM driver code to communicate with chips which are mapped
......
drivers/net/fs_enet/fs_enet-main.c
View file @ 0bd2cbcd
......@@ -40,6 +40,7 @@
#include <linux/of_mdio.h>
#include <linux/of_platform.h>
#include <linux/of_gpio.h>
#include <linux/of_net.h>
#include <linux/vmalloc.h>
#include <asm/pgtable.h>
......
drivers/net/gianfar.c
View file @ 0bd2cbcd
......@@ -95,6 +95,7 @@
#include <linux/phy.h>
#include <linux/phy_fixed.h>
#include <linux/of.h>
#include <linux/of_net.h>
#include "gianfar.h"
#include "fsl_pq_mdio.h"
......
drivers/net/ucc_geth.c
View file @ 0bd2cbcd
......@@ -28,6 +28,7 @@
#include <linux/phy.h>
#include <linux/workqueue.h>
#include <linux/of_mdio.h>
#include <linux/of_net.h>
#include <linux/of_platform.h>
#include <asm/uaccess.h>
......
drivers/net/xilinx_emaclite.c
View file @ 0bd2cbcd
......@@ -24,6 +24,7 @@
#include <linux/of_device.h>
#include <linux/of_platform.h>
#include <linux/of_mdio.h>
#include <linux/of_net.h>
#include <linux/phy.h>
#define DRIVER_NAME "xilinx_emaclite"
......
drivers/of/Kconfig
View file @ 0bd2cbcd
......@@ -19,6 +19,10 @@ config OF_FLATTREE
bool
select DTC
config OF_EARLY_FLATTREE
bool
select OF_FLATTREE
config OF_PROMTREE
bool
......@@ -49,6 +53,10 @@ config OF_I2C
help
OpenFirmware I2C accessors
config OF_NET
depends on NETDEVICES
def_bool y
config OF_SPI
def_tristate SPI
depends on SPI && !SPARC
......
drivers/of/Makefile
View file @ 0bd2cbcd
......@@ -6,5 +6,6 @@ obj-$(CONFIG_OF_IRQ) += irq.o
obj-$(CONFIG_OF_DEVICE) += device.o platform.o
obj-$(CONFIG_OF_GPIO) += gpio.o
obj-$(CONFIG_OF_I2C) += of_i2c.o
obj-$(CONFIG_OF_NET) += of_net.o
obj-$(CONFIG_OF_SPI) += of_spi.o
obj-$(CONFIG_OF_MDIO) += of_mdio.o
drivers/of/address.c
View file @ 0bd2cbcd
......@@ -12,13 +12,13 @@
(ns) > 0)
static struct of_bus *of_match_bus(struct device_node *np);
static int __of_address_to_resource(struct device_node *dev, const u32 *addrp,
u64 size, unsigned int flags,
static int __of_address_to_resource(struct device_node *dev,
const __be32 *addrp, u64 size, unsigned int flags,
struct resource *r);
/* Debug utility */
#ifdef DEBUG
static void of_dump_addr(const char *s, const u32 *addr, int na)
static void of_dump_addr(const char *s, const __be32 *addr, int na)
{
printk(KERN_DEBUG "%s", s);
while (na--)
......@@ -26,7 +26,7 @@ static void of_dump_addr(const char *s, const u32 *addr, int na)
printk("\n");
}
#else
static void of_dump_addr(const char *s, const u32 *addr, int na) { }
static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
#endif
/* Callbacks for bus specific translators */
......@@ -36,10 +36,10 @@ struct of_bus {
int (*match)(struct device_node *parent);
void (*count_cells)(struct device_node *child,
int *addrc, int *sizec);
u64 (*map)(u32 *addr, const u32 *range,
u64 (*map)(u32 *addr, const __be32 *range,
int na, int ns, int pna);
int (*translate)(u32 *addr, u64 offset, int na);
unsigned int (*get_flags)(const u32 *addr);
unsigned int (*get_flags)(const __be32 *addr);
};
/*
......@@ -55,7 +55,7 @@ static void of_bus_default_count_cells(struct device_node *dev,
*sizec = of_n_size_cells(dev);
}
static u64 of_bus_default_map(u32 *addr, const u32 *range,
static u64 of_bus_default_map(u32 *addr, const __be32 *range,
int na, int ns, int pna)
{
u64 cp, s, da;
......@@ -85,7 +85,7 @@ static int of_bus_default_translate(u32 *addr, u64 offset, int na)
return 0;
}
static unsigned int of_bus_default_get_flags(const u32 *addr)
static unsigned int of_bus_default_get_flags(const __be32 *addr)
{
return IORESOURCE_MEM;
}
......@@ -110,10 +110,10 @@ static void of_bus_pci_count_cells(struct device_node *np,
*sizec = 2;
}
static unsigned int of_bus_pci_get_flags(const u32 *addr)
static unsigned int of_bus_pci_get_flags(const __be32 *addr)
{
unsigned int flags = 0;
u32 w = addr[0];
u32 w = be32_to_cpup(addr);
switch((w >> 24) & 0x03) {
case 0x01:
......@@ -129,7 +129,8 @@ static unsigned int of_bus_pci_get_flags(const u32 *addr)
return flags;
}
static u64 of_bus_pci_map(u32 *addr, const u32 *range, int na, int ns, int pna)
static u64 of_bus_pci_map(u32 *addr, const __be32 *range, int na, int ns,
int pna)
{
u64 cp, s, da;
unsigned int af, rf;
......@@ -160,7 +161,7 @@ static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
return of_bus_default_translate(addr + 1, offset, na - 1);
}
const u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
unsigned int *flags)
{
const __be32 *prop;
......@@ -207,7 +208,7 @@ EXPORT_SYMBOL(of_get_pci_address);
int of_pci_address_to_resource(struct device_node *dev, int bar,
struct resource *r)
{
const u32 *addrp;
const __be32 *addrp;
u64 size;
unsigned int flags;
......@@ -237,12 +238,13 @@ static void of_bus_isa_count_cells(struct device_node *child,
*sizec = 1;
}
static u64 of_bus_isa_map(u32 *addr, const u32 *range, int na, int ns, int pna)
static u64 of_bus_isa_map(u32 *addr, const __be32 *range, int na, int ns,
int pna)
{
u64 cp, s, da;
/* Check address type match */
if ((addr[0] ^ range[0]) & 0x00000001)
if ((addr[0] ^ range[0]) & cpu_to_be32(1))
return OF_BAD_ADDR;
/* Read address values, skipping high cell */
......@@ -264,10 +266,10 @@ static int of_bus_isa_translate(u32 *addr, u64 offset, int na)
return of_bus_default_translate(addr + 1, offset, na - 1);
}
static unsigned int of_bus_isa_get_flags(const u32 *addr)
static unsigned int of_bus_isa_get_flags(const __be32 *addr)
{
unsigned int flags = 0;
u32 w = addr[0];
u32 w = be32_to_cpup(addr);
if (w & 1)
flags |= IORESOURCE_IO;
......@@ -330,7 +332,7 @@ static int of_translate_one(struct device_node *parent, struct of_bus *bus,
struct of_bus *pbus, u32 *addr,
int na, int ns, int pna, const char *rprop)
{
const u32 *ranges;
const __be32 *ranges;
unsigned int rlen;
int rone;
u64 offset = OF_BAD_ADDR;
......@@ -398,7 +400,7 @@ static int of_translate_one(struct device_node *parent, struct of_bus *bus,
* that can be mapped to a cpu physical address). This is not really specified
* that way, but this is traditionally the way IBM at least do things
*/
u64 __of_translate_address(struct device_node *dev, const u32 *in_addr,
u64 __of_translate_address(struct device_node *dev, const __be32 *in_addr,
const char *rprop)
{
struct device_node *parent = NULL;
......@@ -475,22 +477,22 @@ u64 __of_translate_address(struct device_node *dev, const u32 *in_addr,
return result;
}
u64 of_translate_address(struct device_node *dev, const u32 *in_addr)
u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
{
return __of_translate_address(dev, in_addr, "ranges");
}
EXPORT_SYMBOL(of_translate_address);
u64 of_translate_dma_address(struct device_node *dev, const u32 *in_addr)
u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
{
return __of_translate_address(dev, in_addr, "dma-ranges");
}
EXPORT_SYMBOL(of_translate_dma_address);
const u32 *of_get_address(struct device_node *dev, int index, u64 *size,
const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
unsigned int *flags)
{
const u32 *prop;
const __be32 *prop;
unsigned int psize;
struct device_node *parent;
struct of_bus *bus;
......@@ -525,8 +527,8 @@ const u32 *of_get_address(struct device_node *dev, int index, u64 *size,
}
EXPORT_SYMBOL(of_get_address);
static int __of_address_to_resource(struct device_node *dev, const u32 *addrp,
u64 size, unsigned int flags,
static int __of_address_to_resource(struct device_node *dev,
const __be32 *addrp, u64 size, unsigned int flags,
struct resource *r)
{
u64 taddr;
......@@ -564,7 +566,7 @@ static int __of_address_to_resource(struct device_node *dev, const u32 *addrp,
int of_address_to_resource(struct device_node *dev, int index,
struct resource *r)
{
const u32 *addrp;
const __be32 *addrp;
u64 size;
unsigned int flags;
......
drivers/of/fdt.c
View file @ 0bd2cbcd
This diff is collapsed.
drivers/of/of_mdio.c
View file @ 0bd2cbcd
......@@ -52,27 +52,35 @@ int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np)
/* Loop over the child nodes and register a phy_device for each one */
for_each_child_of_node(np, child) {
const __be32 *addr;
const __be32 *paddr;
u32 addr;
int len;
/* A PHY must have a reg property in the range [0-31] */
addr = of_get_property(child, "reg", &len);
if (!addr || len < sizeof(*addr) || *addr >= 32 || *addr < 0) {
paddr = of_get_property(child, "reg", &len);
if (!paddr || len < sizeof(*paddr)) {
dev_err(&mdio->dev, "%s has invalid PHY address\n",
child->full_name);
continue;
}
addr = be32_to_cpup(paddr);
if (addr >= 32) {
dev_err(&mdio->dev, "%s PHY address %i is too large\n",
child->full_name, addr);
continue;
}
if (mdio->irq) {
mdio->irq[*addr] = irq_of_parse_and_map(child, 0);
if (!mdio->irq[*addr])
mdio->irq[*addr] = PHY_POLL;
mdio->irq[addr] = irq_of_parse_and_map(child, 0);
if (!mdio->irq[addr])
mdio->irq[addr] = PHY_POLL;
}
phy = get_phy_device(mdio, be32_to_cpup(addr));
phy = get_phy_device(mdio, addr);
if (!phy || IS_ERR(phy)) {
dev_err(&mdio->dev, "error probing PHY at address %i\n",
*addr);
addr);
continue;
}
phy_scan_fixups(phy);
......@@ -91,7 +99,7 @@ int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np)
}
dev_dbg(&mdio->dev, "registered phy %s at address %i\n",
child->name, *addr);
child->name, addr);
}
return 0;
......
drivers/of/of_net.c 0 → 100644
View file @ 0bd2cbcd
/*
* OF helpers for network devices.
*
* This file is released under the GPLv2
*
* Initially copied out of arch/powerpc/kernel/prom_parse.c
*/
#include <linux/etherdevice.h>
#include <linux/kernel.h>
#include <linux/of_net.h>
/**
* Search the device tree for the best MAC address to use. 'mac-address' is
* checked first, because that is supposed to contain to "most recent" MAC
* address. If that isn't set, then 'local-mac-address' is checked next,
* because that is the default address. If that isn't set, then the obsolete
* 'address' is checked, just in case we're using an old device tree.
*
* Note that the 'address' property is supposed to contain a virtual address of
* the register set, but some DTS files have redefined that property to be the
* MAC address.
*
* All-zero MAC addresses are rejected, because those could be properties that
* exist in the device tree, but were not set by U-Boot. For example, the
* DTS could define 'mac-address' and 'local-mac-address', with zero MAC
* addresses. Some older U-Boots only initialized 'local-mac-address'. In
* this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
* but is all zeros.
*/
const void *of_get_mac_address(struct device_node *np)
{
struct property *pp;
pp = of_find_property(np, "mac-address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
pp = of_find_property(np, "local-mac-address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
pp = of_find_property(np, "address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
return NULL;
}
EXPORT_SYMBOL(of_get_mac_address);
drivers/of/platform.c
View file @ 0bd2cbcd
......@@ -633,6 +633,9 @@ EXPORT_SYMBOL(of_device_alloc);
* @np: pointer to node to create device for
* @bus_id: name to assign device
* @parent: Linux device model parent device.
*
* Returns pointer to created platform device, or NULL if a device was not
* registered. Unavailable devices will not get registered.
*/
struct platform_device *of_platform_device_create(struct device_node *np,
const char *bus_id,
......@@ -640,6 +643,9 @@ struct platform_device *of_platform_device_create(struct device_node *np,
{
struct platform_device *dev;
if (!of_device_is_available(np))
return NULL;
dev = of_device_alloc(np, bus_id, parent);
if (!dev)
return NULL;
......@@ -683,8 +689,9 @@ static int of_platform_bus_create(const struct device_node *bus,
pr_debug(" create child: %s\n", child->full_name);
dev = of_platform_device_create(child, NULL, parent);
if (dev == NULL)
rc = -ENOMEM;
else if (!of_match_node(matches, child))
continue;
if (!of_match_node(matches, child))
continue;
if (rc == 0) {
pr_debug(" and sub busses\n");
......@@ -733,10 +740,9 @@ int of_platform_bus_probe(struct device_node *root,
if (of_match_node(matches, root)) {
pr_debug(" root match, create all sub devices\n");
dev = of_platform_device_create(root, NULL, parent);
if (dev == NULL) {
rc = -ENOMEM;
if (dev == NULL)
goto bail;
}
pr_debug(" create all sub busses\n");
rc = of_platform_bus_create(root, matches, &dev->dev);
goto bail;
......@@ -748,9 +754,9 @@ int of_platform_bus_probe(struct device_node *root,
pr_debug(" match: %s\n", child->full_name);
dev = of_platform_device_create(child, NULL, parent);
if (dev == NULL)
rc = -ENOMEM;
else
rc = of_platform_bus_create(child, matches, &dev->dev);
continue;
rc = of_platform_bus_create(child, matches, &dev->dev);
if (rc) {
of_node_put(child);
break;
......
drivers/sbus/char/jsflash.c
View file @ 0bd2cbcd
......@@ -467,7 +467,7 @@ static int jsflash_init(void)
node = prom_getchild(prom_root_node);
node = prom_searchsiblings(node, "flash-memory");
if (node != 0 && node != -1) {
if (node != 0 && (s32)node != -1) {
if (prom_getproperty(node, "reg",
(char *)&reg0, sizeof(reg0)) == -1) {
printk("jsflash: no \"reg\" property\n");
......
drivers/serial/Kconfig
View file @ 0bd2cbcd
......@@ -1412,7 +1412,7 @@ config SERIAL_NETX_CONSOLE
config SERIAL_OF_PLATFORM
tristate "Serial port on Open Firmware platform bus"
depends on PPC_OF || MICROBLAZE
depends on OF
depends on SERIAL_8250 || SERIAL_OF_PLATFORM_NWPSERIAL
help
If you have a PowerPC based system that has serial ports
......
drivers/serial/of_serial.c
View file @ 0bd2cbcd
......@@ -15,6 +15,7 @@
#include <linux/serial_core.h>
#include <linux/serial_8250.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/nwpserial.h>
......
include/asm-generic/vmlinux.lds.h
View file @ 0bd2cbcd
......@@ -67,7 +67,8 @@
* Align to a 32 byte boundary equal to the
* alignment gcc 4.5 uses for a struct
*/
#define STRUCT_ALIGN() . = ALIGN(32)
#define STRUCT_ALIGNMENT 32
#define STRUCT_ALIGN() . = ALIGN(STRUCT_ALIGNMENT)
/* The actual configuration determine if the init/exit sections
* are handled as text/data or they can be discarded (which
......@@ -146,6 +147,13 @@
#define TRACE_SYSCALLS()
#endif
#define KERNEL_DTB() \
STRUCT_ALIGN(); \
VMLINUX_SYMBOL(__dtb_start) = .; \
*(.dtb.init.rodata) \
VMLINUX_SYMBOL(__dtb_end) = .;
/* .data section */
#define DATA_DATA \
*(.data) \
......@@ -468,7 +476,8 @@
MCOUNT_REC() \
DEV_DISCARD(init.rodata) \
CPU_DISCARD(init.rodata) \
MEM_DISCARD(init.rodata)
MEM_DISCARD(init.rodata) \
KERNEL_DTB()
#define INIT_TEXT \
*(.init.text) \
......
include/linux/of_address.h
View file @ 0bd2cbcd
......@@ -3,7 +3,7 @@
#include <linux/ioport.h>
#include <linux/of.h>
extern u64 of_translate_address(struct device_node *np, const u32 *addr);
extern u64 of_translate_address(struct device_node *np, const __be32 *addr);
extern int of_address_to_resource(struct device_node *dev, int index,
struct resource *r);
extern void __iomem *of_iomap(struct device_node *device, int index);
......@@ -21,7 +21,7 @@ static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; }
#endif
#ifdef CONFIG_PCI
extern const u32 *of_get_pci_address(struct device_node *dev, int bar_no,
extern const __be32 *of_get_pci_address(struct device_node *dev, int bar_no,
u64 *size, unsigned int *flags);
extern int of_pci_address_to_resource(struct device_node *dev, int bar,
struct resource *r);
......@@ -32,7 +32,7 @@ static inline int of_pci_address_to_resource(struct device_node *dev, int bar,
return -ENOSYS;
}
static inline const u32 *of_get_pci_address(struct device_node *dev,
static inline const __be32 *of_get_pci_address(struct device_node *dev,
int bar_no, u64 *size, unsigned int *flags)
{
return NULL;
......
include/linux/of_fdt.h
View file @ 0bd2cbcd
......@@ -58,6 +58,23 @@ struct boot_param_header {
};
#if defined(CONFIG_OF_FLATTREE)
struct device_node;
/* For scanning an arbitrary device-tree at any time */
extern char *of_fdt_get_string(struct boot_param_header *blob, u32 offset);
extern void *of_fdt_get_property(struct boot_param_header *blob,
unsigned long node,
const char *name,
unsigned long *size);
extern int of_fdt_is_compatible(struct boot_param_header *blob,
unsigned long node,
const char *compat);
extern int of_fdt_match(struct boot_param_header *blob, unsigned long node,
const char **compat);
extern void of_fdt_unflatten_tree(unsigned long *blob,
struct device_node **mynodes);
/* TBD: Temporary export of fdt globals - remove when code fully merged */
extern int __initdata dt_root_addr_cells;
extern int __initdata dt_root_size_cells;
......@@ -71,6 +88,7 @@ extern int of_scan_flat_dt(int (*it)(unsigned long node, const char *uname,
extern void *of_get_flat_dt_prop(unsigned long node, const char *name,
unsigned long *size);
extern int of_flat_dt_is_compatible(unsigned long node, const char *name);
extern int of_flat_dt_match(unsigned long node, const char **matches);
extern unsigned long of_get_flat_dt_root(void);
extern int early_init_dt_scan_chosen(unsigned long node, const char *uname,
......
include/linux/of_net.h 0 → 100644
View file @ 0bd2cbcd
/*
* OF helpers for network devices.
*
* This file is released under the GPLv2
*/
#ifndef __LINUX_OF_NET_H
#define __LINUX_OF_NET_H
#ifdef CONFIG_OF_NET
#include <linux/of.h>
extern const void *of_get_mac_address(struct device_node *np);
#endif
#endif /* __LINUX_OF_NET_H */
scripts/Makefile.lib
View file @ 0bd2cbcd
......@@ -200,6 +200,29 @@ quiet_cmd_gzip = GZIP $@
cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -f -9 > $@) || \
(rm -f $@ ; false)
# DTC
# ---------------------------------------------------------------------------
# Generate an assembly file to wrap the output of the device tree compiler
quiet_cmd_dt_S_dtb= DTB $@
cmd_dt_S_dtb= \
( \
echo '\#include <asm-generic/vmlinux.lds.h>'; \
echo '.section .dtb.init.rodata,"a"'; \
echo '.balign STRUCT_ALIGNMENT'; \
echo '.global __dtb_$(*F)_begin'; \
echo '__dtb_$(*F)_begin:'; \
echo '.incbin "$<" '; \
echo '__dtb_$(*F)_end:'; \
echo '.global __dtb_$(*F)_end'; \
echo '.balign STRUCT_ALIGNMENT'; \
) > $@
$(obj)/%.dtb.S: $(obj)/%.dtb
$(call cmd,dt_S_dtb)
quiet_cmd_dtc = DTC $@
cmd_dtc = $(objtree)/scripts/dtc/dtc -O dtb -o $@ -b 0 $(DTC_FLAGS) $<
# Bzip2
# ---------------------------------------------------------------------------
......
scripts/dtc/Makefile
View file @ 0bd2cbcd
......@@ -4,7 +4,7 @@ hostprogs-y := dtc
always := $(hostprogs-y)
dtc-objs := dtc.o flattree.o fstree.o data.o livetree.o treesource.o \
srcpos.o checks.o
srcpos.o checks.o util.o
dtc-objs += dtc-lexer.lex.o dtc-parser.tab.o
# Source files need to get at the userspace version of libfdt_env.h to compile
......@@ -19,6 +19,7 @@ HOSTCFLAGS_fstree.o := $(HOSTCFLAGS_DTC)
HOSTCFLAGS_livetree.o := $(HOSTCFLAGS_DTC)
HOSTCFLAGS_srcpos.o := $(HOSTCFLAGS_DTC)
HOSTCFLAGS_treesource.o := $(HOSTCFLAGS_DTC)
HOSTCFLAGS_util.o := $(HOSTCFLAGS_DTC)
HOSTCFLAGS_dtc-lexer.lex.o := $(HOSTCFLAGS_DTC)
HOSTCFLAGS_dtc-parser.tab.o := $(HOSTCFLAGS_DTC)
......
scripts/dtc/checks.c
View file @ 0bd2cbcd
......@@ -278,32 +278,112 @@ static void check_property_name_chars(struct check *c, struct node *dt,
}
PROP_CHECK(property_name_chars, PROPNODECHARS, ERROR);
#define DESCLABEL_FMT "%s%s%s%s%s"
#define DESCLABEL_ARGS(node,prop,mark) \
((mark) ? "value of " : ""), \
((prop) ? "'" : ""), \
((prop) ? (prop)->name : ""), \
((prop) ? "' in " : ""), (node)->fullpath
static void check_duplicate_label(struct check *c, struct node *dt,
const char *label, struct node *node,
struct property *prop, struct marker *mark)
{
struct node *othernode = NULL;
struct property *otherprop = NULL;
struct marker *othermark = NULL;
othernode = get_node_by_label(dt, label);
if (!othernode)
otherprop = get_property_by_label(dt, label, &othernode);
if (!othernode)
othermark = get_marker_label(dt, label, &othernode,
&otherprop);
if (!othernode)
return;
if ((othernode != node) || (otherprop != prop) || (othermark != mark))
FAIL(c, "Duplicate label '%s' on " DESCLABEL_FMT
" and " DESCLABEL_FMT,
label, DESCLABEL_ARGS(node, prop, mark),
DESCLABEL_ARGS(othernode, otherprop, othermark));
}
static void check_duplicate_label_node(struct check *c, struct node *dt,
struct node *node)
{
struct label *l;
for_each_label(node->labels, l)
check_duplicate_label(c, dt, l->label, node, NULL, NULL);
}
static void check_duplicate_label_prop(struct check *c, struct node *dt,
struct node *node, struct property *prop)
{
struct marker *m = prop->val.markers;
struct label *l;
for_each_label(prop->labels, l)
check_duplicate_label(c, dt, l->label, node, prop, NULL);
for_each_marker_of_type(m, LABEL)
check_duplicate_label(c, dt, m->ref, node, prop, m);
}
CHECK(duplicate_label, NULL, check_duplicate_label_node,
check_duplicate_label_prop, NULL, ERROR);
static void check_explicit_phandles(struct check *c, struct node *root,
struct node *node)
struct node *node, struct property *prop)
{
struct property *prop;
struct marker *m;
struct node *other;
cell_t phandle;
prop = get_property(node, "linux,phandle");
if (! prop)
return; /* No phandle, that's fine */
if (!streq(prop->name, "phandle")
&& !streq(prop->name, "linux,phandle"))
return;
if (prop->val.len != sizeof(cell_t)) {
FAIL(c, "%s has bad length (%d) linux,phandle property",
node->fullpath, prop->val.len);
FAIL(c, "%s has bad length (%d) %s property",
node->fullpath, prop->val.len, prop->name);
return;
}
m = prop->val.markers;
for_each_marker_of_type(m, REF_PHANDLE) {
assert(m->offset == 0);
if (node != get_node_by_ref(root, m->ref))
/* "Set this node's phandle equal to some
* other node's phandle". That's nonsensical
* by construction. */ {
FAIL(c, "%s in %s is a reference to another node",
prop->name, node->fullpath);
return;
}
/* But setting this node's phandle equal to its own
* phandle is allowed - that means allocate a unique
* phandle for this node, even if it's not otherwise
* referenced. The value will be filled in later, so
* no further checking for now. */
return;
}
phandle = propval_cell(prop);
if ((phandle == 0) || (phandle == -1)) {
FAIL(c, "%s has invalid linux,phandle value 0x%x",
node->fullpath, phandle);
FAIL(c, "%s has bad value (0x%x) in %s property",
node->fullpath, phandle, prop->name);
return;
}
if (node->phandle && (node->phandle != phandle))
FAIL(c, "%s has %s property which replaces existing phandle information",
node->fullpath, prop->name);
other = get_node_by_phandle(root, phandle);
if (other) {
if (other && (other != node)) {
FAIL(c, "%s has duplicated phandle 0x%x (seen before at %s)",
node->fullpath, phandle, other->fullpath);
return;
......@@ -311,7 +391,7 @@ static void check_explicit_phandles(struct check *c, struct node *root,
node->phandle = phandle;
}
NODE_CHECK(explicit_phandles, NULL, ERROR);
PROP_CHECK(explicit_phandles, NULL, ERROR);
static void check_name_properties(struct check *c, struct node *root,
struct node *node)
......@@ -549,6 +629,9 @@ static struct check *check_table[] = {
&duplicate_node_names, &duplicate_property_names,
&node_name_chars, &node_name_format, &property_name_chars,
&name_is_string, &name_properties,
&duplicate_label,
&explicit_phandles,
&phandle_references, &path_references,
......
scripts/dtc/dtc-lexer.l
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scripts/dtc/dtc-lexer.lex.c_shipped
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scripts/dtc/dtc-parser.tab.c_shipped
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scripts/dtc/dtc-parser.tab.h_shipped
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/* A Bison parser, made by GNU Bison 2.3. */
/* Skeleton interface for Bison's Yacc-like parsers in C
/* A Bison parser, made by GNU Bison 2.4.1. */
Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
/* Skeleton interface for Bison's Yacc-like parsers in C
Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA. */
along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* As a special exception, you may create a larger work that contains
part or all of the Bison parser skeleton and distribute that work
......@@ -29,10 +28,11 @@
special exception, which will cause the skeleton and the resulting
Bison output files to be licensed under the GNU General Public
License without this special exception.
This special exception was added by the Free Software Foundation in
version 2.2 of Bison. */
/* Tokens. */
#ifndef YYTOKENTYPE
# define YYTOKENTYPE
......@@ -43,35 +43,24 @@
DT_MEMRESERVE = 259,
DT_PROPNODENAME = 260,
DT_LITERAL = 261,
DT_LEGACYLITERAL = 262,
DT_BASE = 263,
DT_BYTE = 264,
DT_STRING = 265,
DT_LABEL = 266,
DT_REF = 267,
DT_INCBIN = 268
DT_BASE = 262,
DT_BYTE = 263,
DT_STRING = 264,
DT_LABEL = 265,
DT_REF = 266,
DT_INCBIN = 267
};
#endif
/* Tokens. */
#define DT_V1 258
#define DT_MEMRESERVE 259
#define DT_PROPNODENAME 260
#define DT_LITERAL 261
#define DT_LEGACYLITERAL 262
#define DT_BASE 263
#define DT_BYTE 264
#define DT_STRING 265
#define DT_LABEL 266
#define DT_REF 267
#define DT_INCBIN 268
#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
typedef union YYSTYPE
#line 37 "dtc-parser.y"
{
/* Line 1676 of yacc.c */
#line 39 "dtc-parser.y"
char *propnodename;
char *literal;
char *labelref;
......@@ -86,28 +75,17 @@ typedef union YYSTYPE
struct node *node;
struct node *nodelist;
struct reserve_info *re;
}
/* Line 1489 of yacc.c. */
#line 92 "dtc-parser.tab.h"
YYSTYPE;
/* Line 1676 of yacc.c */
#line 83 "dtc-parser.tab.h"
} YYSTYPE;
# define YYSTYPE_IS_TRIVIAL 1
# define yystype YYSTYPE /* obsolescent; will be withdrawn */
# define YYSTYPE_IS_DECLARED 1
# define YYSTYPE_IS_TRIVIAL 1
#endif
extern YYSTYPE yylval;
#if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED
typedef struct YYLTYPE
{
int first_line;
int first_column;
int last_line;
int last_column;
} YYLTYPE;
# define yyltype YYLTYPE /* obsolescent; will be withdrawn */
# define YYLTYPE_IS_DECLARED 1
# define YYLTYPE_IS_TRIVIAL 1
#endif
extern YYLTYPE yylloc;
scripts/dtc/dtc-parser.y
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scripts/dtc/dtc.c
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scripts/dtc/dtc.h
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scripts/dtc/flattree.c
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scripts/dtc/fstree.c
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......@@ -58,10 +58,9 @@ static struct node *read_fstree(const char *dirname)
"WARNING: Cannot open %s: %s\n",
tmpnam, strerror(errno));
} else {
prop = build_property(strdup(de->d_name),
prop = build_property(xstrdup(de->d_name),
data_copy_file(pfile,
st.st_size),
NULL);
st.st_size));
add_property(tree, prop);
fclose(pfile);
}
......@@ -69,8 +68,7 @@ static struct node *read_fstree(const char *dirname)
struct node *newchild;
newchild = read_fstree(tmpnam);
newchild = name_node(newchild, strdup(de->d_name),
NULL);
newchild = name_node(newchild, xstrdup(de->d_name));
add_child(tree, newchild);
}
......@@ -86,8 +84,8 @@ struct boot_info *dt_from_fs(const char *dirname)
struct node *tree;
tree = read_fstree(dirname);
tree = name_node(tree, "", NULL);
tree = name_node(tree, "");
return build_boot_info(NULL, tree, 0);
return build_boot_info(NULL, tree, guess_boot_cpuid(tree));
}
scripts/dtc/livetree.c
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scripts/dtc/srcpos.c
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scripts/dtc/srcpos.h
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scripts/dtc/treesource.c
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scripts/dtc/util.c 0 → 100644
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scripts/dtc/util.h 0 → 100644
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scripts/dtc/version_gen.h
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#define DTC_VERSION "DTC 1.2.0"
#define DTC_VERSION "DTC 1.2.0-g37c0b6a0"
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