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Commit 0f0b21a8 authored by Ray Jui's avatar Ray Jui Committed by Florian Fainelli
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ARM: dts: Move all Cygnus peripherals into axi bus 

Move all Cygnus peripherals to be under the "axi" bus node of type
"simple-bus"
Signed-off-by: default avatarRay Jui <rjui@broadcom.com>
Reviewed-by: default avatarScott Branden <sbranden@broadcom.com>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent ef5b812a
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Showing with 140 additions and 139 deletions
arch/arm/boot/dts/bcm-cygnus.dtsi
View file @ 0f0b21a8
...@@ -88,173 +88,174 @@ L2: l2-cache { ...@@ -88,173 +88,174 @@ L2: l2-cache {
}; };
}; };
pinctrl: pinctrl@0x0301d0c8 { axi {
compatible = "brcm,cygnus-pinmux"; compatible = "simple-bus";
reg = <0x0301d0c8 0x30>, ranges;
<0x0301d24c 0x2c>; #address-cells = <1>;
}; #size-cells = <1>;
gpio_crmu: gpio@03024800 { pinctrl: pinctrl@0x0301d0c8 {
compatible = "brcm,cygnus-crmu-gpio"; compatible = "brcm,cygnus-pinmux";
reg = <0x03024800 0x50>, reg = <0x0301d0c8 0x30>,
<0x03024008 0x18>; <0x0301d24c 0x2c>;
#gpio-cells = <2>; };
gpio-controller;
};
gpio_ccm: gpio@1800a000 { gpio_crmu: gpio@03024800 {
compatible = "brcm,cygnus-ccm-gpio"; compatible = "brcm,cygnus-crmu-gpio";
reg = <0x1800a000 0x50>, reg = <0x03024800 0x50>,
<0x0301d164 0x20>; <0x03024008 0x18>;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; };
interrupt-controller;
};
gpio_asiu: gpio@180a5000 { gpio_ccm: gpio@1800a000 {
compatible = "brcm,cygnus-asiu-gpio"; compatible = "brcm,cygnus-ccm-gpio";
reg = <0x180a5000 0x668>; reg = <0x1800a000 0x50>,
#gpio-cells = <2>; <0x0301d164 0x20>;
gpio-controller; #gpio-cells = <2>;
gpio-controller;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
};
pinmux = <&pinctrl>; gpio_asiu: gpio@180a5000 {
compatible = "brcm,cygnus-asiu-gpio";
reg = <0x180a5000 0x668>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller; pinmux = <&pinctrl>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
};
amba { interrupt-controller;
#address-cells = <1>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
#size-cells = <1>; };
compatible = "arm,amba-bus", "simple-bus";
interrupt-parent = <&gic>;
ranges;
wdt@18009000 { wdt0: wdt@18009000 {
compatible = "arm,sp805" , "arm,primecell"; compatible = "arm,sp805" , "arm,primecell";
reg = <0x18009000 0x1000>; reg = <0x18009000 0x1000>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&axi81_clk>; clocks = <&axi81_clk>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
};
i2c0: i2c@18008000 { i2c0: i2c@18008000 {
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c"; compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
reg = <0x18008000 0x100>; reg = <0x18008000 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>; interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
clock-frequency = <100000>; clock-frequency = <100000>;
status = "disabled"; status = "disabled";
}; };
i2c1: i2c@1800b000 { i2c1: i2c@1800b000 {
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c"; compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
reg = <0x1800b000 0x100>; reg = <0x1800b000 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>; interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
clock-frequency = <100000>; clock-frequency = <100000>;
status = "disabled"; status = "disabled";
}; };
pcie0: pcie@18012000 { pcie0: pcie@18012000 {
compatible = "brcm,iproc-pcie"; compatible = "brcm,iproc-pcie";
reg = <0x18012000 0x1000>; reg = <0x18012000 0x1000>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>; interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
linux,pci-domain = <0>; linux,pci-domain = <0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
device_type = "pci"; device_type = "pci";
ranges = <0x81000000 0 0 0x28000000 0 0x00010000 ranges = <0x81000000 0 0 0x28000000 0 0x00010000
0x82000000 0 0x20000000 0x20000000 0 0x04000000>; 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
status = "disabled"; status = "disabled";
}; };
pcie1: pcie@18013000 { pcie1: pcie@18013000 {
compatible = "brcm,iproc-pcie"; compatible = "brcm,iproc-pcie";
reg = <0x18013000 0x1000>; reg = <0x18013000 0x1000>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>; interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
linux,pci-domain = <1>; linux,pci-domain = <1>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
device_type = "pci"; device_type = "pci";
ranges = <0x81000000 0 0 0x48000000 0 0x00010000 ranges = <0x81000000 0 0 0x48000000 0 0x00010000
0x82000000 0 0x40000000 0x40000000 0 0x04000000>; 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
status = "disabled"; status = "disabled";
}; };
uart0: serial@18020000 { uart0: serial@18020000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x18020000 0x100>; reg = <0x18020000 0x100>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&axi81_clk>; clocks = <&axi81_clk>;
clock-frequency = <100000000>; clock-frequency = <100000000>;
status = "disabled"; status = "disabled";
}; };
uart1: serial@18021000 { uart1: serial@18021000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x18021000 0x100>; reg = <0x18021000 0x100>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&axi81_clk>; clocks = <&axi81_clk>;
clock-frequency = <100000000>; clock-frequency = <100000000>;
status = "disabled"; status = "disabled";
}; };
uart2: serial@18022000 { uart2: serial@18022000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x18020000 0x100>; reg = <0x18020000 0x100>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&axi81_clk>; clocks = <&axi81_clk>;
clock-frequency = <100000000>; clock-frequency = <100000000>;
status = "disabled"; status = "disabled";
}; };
uart3: serial@18023000 { uart3: serial@18023000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x18023000 0x100>; reg = <0x18023000 0x100>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&axi81_clk>; clocks = <&axi81_clk>;
clock-frequency = <100000000>; clock-frequency = <100000000>;
status = "disabled"; status = "disabled";
}; };
nand: nand@18046000 { nand: nand@18046000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand"; compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1",
reg = <0x18046000 0x600>, <0xf8105408 0x600>, <0x18046f00 0x20>; "brcm,brcmnand";
reg-names = "nand", "iproc-idm", "iproc-ext"; reg = <0x18046000 0x600>, <0xf8105408 0x600>,
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; <0x18046f00 0x20>;
reg-names = "nand", "iproc-idm", "iproc-ext";
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
brcm,nand-has-wp; brcm,nand-has-wp;
};
}; };
}; };
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