staging: rtl8192e: Cleanup checkpatch -f warnings and errors - Part III

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

drivers/staging/rtl8192e/r8192E_dev.h

@@ -28,11 +28,12 @@
 #include "r8190P_def.h"
 
 u8 rtl8192_QueryIsShort(u8 TxHT, u8 TxRate, struct cb_desc *tcb_desc);
-bool rtl8192_GetHalfNmodeSupportByAPs(struct net_device* dev);
+bool rtl8192_GetHalfNmodeSupportByAPs(struct net_device *dev);
 bool rtl8192_GetNmodeSupportBySecCfg(struct net_device *dev);
 bool rtl8192_HalTxCheckStuck(struct net_device *dev);
 bool rtl8192_HalRxCheckStuck(struct net_device *dev);
-void rtl8192_interrupt_recognized(struct net_device *dev, u32 *p_inta, u32 *p_intb);
+void rtl8192_interrupt_recognized(struct net_device *dev, u32 *p_inta,
+				  u32 *p_intb);
 void rtl8192_enable_rx(struct net_device *dev);
 void rtl8192_enable_tx(struct net_device *dev);
 void rtl8192_EnableInterrupt(struct net_device *dev);
@@ -40,17 +41,22 @@ void rtl8192_DisableInterrupt(struct net_device *dev);
 void rtl8192_ClearInterrupt(struct net_device *dev);
 void rtl8192_InitializeVariables(struct net_device  *dev);
 void rtl8192e_start_beacon(struct net_device *dev);
-void rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val);
-void rtl8192_get_eeprom_size(struct net_device* dev);
+void rtl8192e_SetHwReg(struct net_device *dev, u8 variable, u8 *val);
+void rtl8192_get_eeprom_size(struct net_device *dev);
 bool rtl8192_adapter_start(struct net_device *dev);
 void rtl8192_link_change(struct net_device *dev);
-void rtl8192_AllowAllDestAddr(struct net_device* dev, bool bAllowAllDA, bool WriteIntoReg);
-void  rtl8192_tx_fill_desc(struct net_device* dev, struct tx_desc * pdesc, struct cb_desc *cb_desc,
-		           struct sk_buff* skb);
-void  rtl8192_tx_fill_cmd_desc(struct net_device* dev, struct tx_desc_cmd * entry,
-			       struct cb_desc *cb_desc, struct sk_buff* skb);
-bool rtl8192_rx_query_status_desc(struct net_device* dev, struct rtllib_rx_stats *stats,
-				  struct rx_desc *pdesc, struct sk_buff* skb);
+void rtl8192_AllowAllDestAddr(struct net_device *dev, bool bAllowAllDA,
+			      bool WriteIntoReg);
+void  rtl8192_tx_fill_desc(struct net_device *dev, struct tx_desc *pdesc,
+			   struct cb_desc *cb_desc,
+			   struct sk_buff *skb);
+void  rtl8192_tx_fill_cmd_desc(struct net_device *dev,
+			       struct tx_desc_cmd *entry,
+			       struct cb_desc *cb_desc, struct sk_buff *skb);
+bool rtl8192_rx_query_status_desc(struct net_device *dev,
+				  struct rtllib_rx_stats *stats,
+				  struct rx_desc *pdesc,
+				  struct sk_buff *skb);
 void rtl8192_halt_adapter(struct net_device *dev, bool reset);
-void rtl8192_update_ratr_table(struct net_device* dev);
+void rtl8192_update_ratr_table(struct net_device *dev);
 #endif

drivers/staging/rtl8192e/r8192E_firmware.h

@@ -21,7 +21,7 @@
 
 #define RTL8190_CPU_START_OFFSET	0x80
 
-#define GET_COMMAND_PACKET_FRAG_THRESHOLD(v)	(4*(v/4) - 8 )
+#define GET_COMMAND_PACKET_FRAG_THRESHOLD(v)	(4*(v/4) - 8)
 
 enum firmware_init_step {
 	FW_INIT_STEP0_BOOT = 0,

drivers/staging/rtl8192e/r8192E_hw.h

@@ -141,7 +141,8 @@ enum _RTL8192Pci_HW {
 	SIFS		= 0x03E,
 	TCR			= 0x040,
 	RCR			= 0x044,
-#define RCR_FILTER_MASK (BIT0|BIT1|BIT2|BIT3|BIT5|BIT12|BIT18|BIT19|BIT20|BIT21|BIT22|BIT23)
+#define RCR_FILTER_MASK (BIT0 | BIT1 | BIT2 | BIT3 | BIT5 | BIT12 |	\
+			BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23)
 #define RCR_ONLYERLPKT		BIT31
 #define RCR_ENCS2		BIT30
 #define RCR_ENCS1		BIT29
@@ -422,12 +423,15 @@ enum _RTL8192Pci_HW {
 #define	RATR_MCS13		0x02000000
 #define	RATR_MCS14		0x04000000
 #define	RATR_MCS15		0x08000000
-#define RATE_ALL_CCK		RATR_1M|RATR_2M|RATR_55M|RATR_11M
-#define RATE_ALL_OFDM_AG	RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|RATR_36M|RATR_48M|RATR_54M
-#define RATE_ALL_OFDM_1SS	RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 | \
-									RATR_MCS4|RATR_MCS5|RATR_MCS6	|RATR_MCS7
-#define RATE_ALL_OFDM_2SS	RATR_MCS8|RATR_MCS9	|RATR_MCS10|RATR_MCS11| \
-									RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15
+#define RATE_ALL_CCK		(RATR_1M | RATR_2M | RATR_55M | RATR_11M)
+#define RATE_ALL_OFDM_AG	(RATR_6M | RATR_9M | RATR_12M | RATR_18M | \
+				RATR_24M | RATR_36M | RATR_48M | RATR_54M)
+#define RATE_ALL_OFDM_1SS	(RATR_MCS0 | RATR_MCS1 | RATR_MCS2 |	\
+				RATR_MCS3 | RATR_MCS4 | RATR_MCS5 |	\
+				RATR_MCS6 | RATR_MCS7)
+#define RATE_ALL_OFDM_2SS	(RATR_MCS8 | RATR_MCS9 | RATR_MCS10 |	\
+				RATR_MCS11 | RATR_MCS12 | RATR_MCS13 |	\
+				RATR_MCS14|RATR_MCS15)
 
 
 	DRIVER_RSSI		= 0x32c,