Commit 172c69a4 authored by Rafał Miłecki's avatar Rafał Miłecki Committed by John W. Linville

ssb: extract indexes for power tables

Signed-off-by: default avatarRafał Miłecki <zajec5@gmail.com>
Acked-by: default avatarMichael Buesch <mb@bu3sch.de>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 61790c5f
......@@ -406,6 +406,46 @@ static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
out->antenna_gain.ghz5.a3 = gain;
}
/* Revs 4 5 and 8 have partially shared layout */
static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
{
SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
}
static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
{
int i;
......@@ -471,6 +511,8 @@ static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
sizeof(out->antenna_gain.ghz5));
sprom_extract_r458(out, in);
/* TODO - get remaining rev 4 stuff needed */
}
......@@ -561,6 +603,8 @@ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
sizeof(out->antenna_gain.ghz5));
sprom_extract_r458(out, in);
/* TODO - get remaining rev 8 stuff needed */
}
......
......@@ -55,6 +55,10 @@ struct ssb_sprom {
u8 tri5gl; /* 5.2GHz TX isolation */
u8 tri5g; /* 5.3GHz TX isolation */
u8 tri5gh; /* 5.8GHz TX isolation */
u8 txpid2g[4]; /* 2GHz TX power index */
u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */
u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */
u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */
u8 rxpo2g; /* 2GHz RX power offset */
u8 rxpo5g; /* 5GHz RX power offset */
u8 rssisav2g; /* 2GHz RSSI params */
......
......@@ -299,6 +299,46 @@
#define SSB_SPROM4_AGAIN2_SHIFT 0
#define SSB_SPROM4_AGAIN3 0xFF00 /* Antenna 3 */
#define SSB_SPROM4_AGAIN3_SHIFT 8
#define SSB_SPROM4_TXPID2G01 0x0062 /* TX Power Index 2GHz */
#define SSB_SPROM4_TXPID2G0 0x00FF
#define SSB_SPROM4_TXPID2G0_SHIFT 0
#define SSB_SPROM4_TXPID2G1 0xFF00
#define SSB_SPROM4_TXPID2G1_SHIFT 8
#define SSB_SPROM4_TXPID2G23 0x0064 /* TX Power Index 2GHz */
#define SSB_SPROM4_TXPID2G2 0x00FF
#define SSB_SPROM4_TXPID2G2_SHIFT 0
#define SSB_SPROM4_TXPID2G3 0xFF00
#define SSB_SPROM4_TXPID2G3_SHIFT 8
#define SSB_SPROM4_TXPID5G01 0x0066 /* TX Power Index 5GHz middle subband */
#define SSB_SPROM4_TXPID5G0 0x00FF
#define SSB_SPROM4_TXPID5G0_SHIFT 0
#define SSB_SPROM4_TXPID5G1 0xFF00
#define SSB_SPROM4_TXPID5G1_SHIFT 8
#define SSB_SPROM4_TXPID5G23 0x0068 /* TX Power Index 5GHz middle subband */
#define SSB_SPROM4_TXPID5G2 0x00FF
#define SSB_SPROM4_TXPID5G2_SHIFT 0
#define SSB_SPROM4_TXPID5G3 0xFF00
#define SSB_SPROM4_TXPID5G3_SHIFT 8
#define SSB_SPROM4_TXPID5GL01 0x006A /* TX Power Index 5GHz low subband */
#define SSB_SPROM4_TXPID5GL0 0x00FF
#define SSB_SPROM4_TXPID5GL0_SHIFT 0
#define SSB_SPROM4_TXPID5GL1 0xFF00
#define SSB_SPROM4_TXPID5GL1_SHIFT 8
#define SSB_SPROM4_TXPID5GL23 0x006C /* TX Power Index 5GHz low subband */
#define SSB_SPROM4_TXPID5GL2 0x00FF
#define SSB_SPROM4_TXPID5GL2_SHIFT 0
#define SSB_SPROM4_TXPID5GL3 0xFF00
#define SSB_SPROM4_TXPID5GL3_SHIFT 8
#define SSB_SPROM4_TXPID5GH01 0x006E /* TX Power Index 5GHz high subband */
#define SSB_SPROM4_TXPID5GH0 0x00FF
#define SSB_SPROM4_TXPID5GH0_SHIFT 0
#define SSB_SPROM4_TXPID5GH1 0xFF00
#define SSB_SPROM4_TXPID5GH1_SHIFT 8
#define SSB_SPROM4_TXPID5GH23 0x0070 /* TX Power Index 5GHz high subband */
#define SSB_SPROM4_TXPID5GH2 0x00FF
#define SSB_SPROM4_TXPID5GH2_SHIFT 0
#define SSB_SPROM4_TXPID5GH3 0xFF00
#define SSB_SPROM4_TXPID5GH3_SHIFT 8
#define SSB_SPROM4_MAXP_BG 0x0080 /* Max Power BG in path 1 */
#define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */
#define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
......
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