Merge http://lia64.bkbits.net/to-linus-2.5

into ppc970.osdl.org:/home/torvalds/v2.6/linux

arch/ia64/Kconfig

@@ -16,7 +16,7 @@ config IA64
 	  The Itanium Processor Family is Intel's 64-bit successor to
 	  the 32-bit X86 line.  The IA-64 Linux project has a home
 	  page at <http://www.linuxia64.org/> and a mailing list at
-	  linux-ia64@vger.kernel.org.
+	  <linux-ia64@vger.kernel.org>.
 
 config 64BIT
 	bool
@@ -57,7 +57,7 @@ config IA64_GENERIC
 	  DIG-compliant	 For DIG ("Developer's Interface Guide") compliant systems
 	  HP-zx1/sx1000	 For HP systems
 	  SGI-SN2	 For SGI Altix systems
-	  Ski-simulator  For the HP simulator (<http://www.hpl.hp.com/research/linux/ski/>)
+	  Ski-simulator  For the HP simulator <http://www.hpl.hp.com/research/linux/ski/>
 
 	  If you don't know what to do, choose "generic".
 

arch/ia64/hp/common/sba_iommu.c

@@ -1732,7 +1732,6 @@ ioc_init(u64 hpa, void *handle)
 
 	if ((long) ~iovp_mask > (long) ia64_max_iommu_merge_mask)
 		ia64_max_iommu_merge_mask = ~iovp_mask;
-	MAX_DMA_ADDRESS = ~0UL;
 
 	printk(KERN_INFO PFX
 		"%s %d.%d HPA 0x%lx IOVA space %dMb at 0x%lx\n",
@@ -1966,6 +1965,18 @@ sba_init(void)
 
 subsys_initcall(sba_init); /* must be initialized after ACPI etc., but before any drivers... */
 
+extern void dig_setup(char**);
+/*
+ * MAX_DMA_ADDRESS needs to be setup prior to paging_init to do any good,
+ * so we use the platform_setup hook to fix it up.
+ */
+void __init
+sba_setup(char **cmdline_p)
+{
+	MAX_DMA_ADDRESS = ~0UL;
+	dig_setup(cmdline_p);
+}
+
 static int __init
 nosbagart(char *str)
 {

arch/ia64/hp/sim/Kconfig

@@ -13,7 +13,7 @@ config HP_SIMSERIAL_CONSOLE
 	depends on HP_SIMSERIAL
 
 config HP_SIMSCSI
-	bool "Simulated SCSI disk"
+	tristate "Simulated SCSI disk"
 	depends on SCSI
 
 endmenu

arch/ia64/kernel/acpi.c

@@ -455,6 +455,7 @@ acpi_numa_arch_fixup (void)
 	for (i = 0; i < MAX_PXM_DOMAINS; i++) {
 		if (pxm_bit_test(i)) {
 			pxm_to_nid_map[i] = numnodes;
+			node_set_online(numnodes);
 			nid_to_pxm_map[numnodes++] = i;
 		}
 	}
@@ -506,6 +507,13 @@ acpi_numa_arch_fixup (void)
 }
 #endif /* CONFIG_ACPI_NUMA */
 
+unsigned int
+acpi_register_gsi (u32 gsi, int polarity, int trigger)
+{
+	return acpi_register_irq(gsi, polarity, trigger);
+}
+EXPORT_SYMBOL(acpi_register_gsi);
+
 static int __init
 acpi_parse_fadt (unsigned long phys_addr, unsigned long size)
 {
@@ -527,7 +535,7 @@ acpi_parse_fadt (unsigned long phys_addr, unsigned long size)
 	if (fadt->iapc_boot_arch & BAF_LEGACY_DEVICES)
 		acpi_legacy_devices = 1;
 
-	acpi_register_irq(fadt->sci_int, ACPI_ACTIVE_LOW, ACPI_LEVEL_SENSITIVE);
+	acpi_register_gsi(fadt->sci_int, ACPI_ACTIVE_LOW, ACPI_LEVEL_SENSITIVE);
 	return 0;
 }
 

arch/ia64/kernel/efi.c

@@ -674,8 +674,7 @@ efi_get_iobase (void)
 	for (p = efi_map_start; p < efi_map_end; p += efi_desc_size) {
 		md = p;
 		if (md->type == EFI_MEMORY_MAPPED_IO_PORT_SPACE) {
-			/* paranoia attribute checking */
-			if (md->attribute == (EFI_MEMORY_UC | EFI_MEMORY_RUNTIME))
+			if (md->attribute & EFI_MEMORY_UC)
 				return md->phys_addr;
 		}
 	}

arch/ia64/kernel/iosapic.c

@@ -172,7 +172,7 @@ gsi_to_irq (unsigned int gsi)
 static void
 set_rte (unsigned int vector, unsigned int dest, int mask)
 {
-	unsigned long pol, trigger, dmode;
+	unsigned long pol, trigger, dmode, flags;
 	u32 low32, high32;
 	char *addr;
 	int rte_index;
@@ -211,11 +211,15 @@ set_rte (unsigned int vector, unsigned int dest, int mask)
 	/* dest contains both id and eid */
 	high32 = (dest << IOSAPIC_DEST_SHIFT);
 
-	writel(IOSAPIC_RTE_HIGH(rte_index), addr + IOSAPIC_REG_SELECT);
-	writel(high32, addr + IOSAPIC_WINDOW);
-	writel(IOSAPIC_RTE_LOW(rte_index), addr + IOSAPIC_REG_SELECT);
-	writel(low32, addr + IOSAPIC_WINDOW);
-	iosapic_intr_info[vector].low32 = low32;
+	spin_lock_irqsave(&iosapic_lock, flags);
+	{
+		writel(IOSAPIC_RTE_HIGH(rte_index), addr + IOSAPIC_REG_SELECT);
+		writel(high32, addr + IOSAPIC_WINDOW);
+		writel(IOSAPIC_RTE_LOW(rte_index), addr + IOSAPIC_REG_SELECT);
+		writel(low32, addr + IOSAPIC_WINDOW);
+		iosapic_intr_info[vector].low32 = low32;
+	}
+	spin_unlock_irqrestore(&iosapic_lock, flags);
 }
 
 static void

arch/ia64/kernel/perfmon_mckinley.h

@@ -101,6 +101,7 @@ pfm_mck_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnu
 {
 	int ret = 0, check_case1 = 0;
 	unsigned long val8 = 0, val14 = 0, val13 = 0;
+	int is_loaded;
 
 	/* first preserve the reserved fields */
 	pfm_mck_reserved(cnum, val, regs);
@@ -108,6 +109,8 @@ pfm_mck_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnu
 	/* sanitfy check */
 	if (ctx == NULL) return -EINVAL;
 
+	is_loaded = ctx->ctx_state == PFM_CTX_LOADED || ctx->ctx_state == PFM_CTX_MASKED;
+
 	/*
 	 * we must clear the debug registers if pmc13 has a value which enable
 	 * memory pipeline event constraints. In this case we need to clear the
@@ -120,7 +123,9 @@ pfm_mck_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnu
 	 *
 	 * For now, we just check on cfg_dbrXX != 0x3.
 	 */
-	if (cnum == 13 && ((*val & 0x18181818UL) != 0x18181818UL) && ctx->ctx_fl_using_dbreg == 0) {
+	DPRINT(("cnum=%u val=0x%lx, using_dbreg=%d loaded=%d\n", cnum, *val, ctx->ctx_fl_using_dbreg, is_loaded));
+
+	if (cnum == 13 && is_loaded && ((*val & 0x18181818UL) != 0x18181818UL) && ctx->ctx_fl_using_dbreg == 0) {
 
 		DPRINT(("pmc[%d]=0x%lx has active pmc13 settings, clearing dbr\n", cnum, *val));
 
@@ -131,14 +136,14 @@ pfm_mck_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnu
 		 * a count of 0 will mark the debug registers as in use and also
 		 * ensure that they are properly cleared.
 		 */
-		ret = pfm_write_ibr_dbr(1, ctx, NULL, 0, regs);
+		ret = pfm_write_ibr_dbr(PFM_DATA_RR, ctx, NULL, 0, regs);
 		if (ret) return ret;
 	}
 	/*
 	 * we must clear the (instruction) debug registers if any pmc14.ibrpX bit is enabled
 	 * before they are (fl_using_dbreg==0) to avoid picking up stale information.
 	 */
-	if (cnum == 14 && ((*val & 0x2222UL) != 0x2222UL) && ctx->ctx_fl_using_dbreg == 0) {
+	if (cnum == 14 && is_loaded && ((*val & 0x2222UL) != 0x2222UL) && ctx->ctx_fl_using_dbreg == 0) {
 
 		DPRINT(("pmc[%d]=0x%lx has active pmc14 settings, clearing ibr\n", cnum, *val));
 
@@ -149,7 +154,7 @@ pfm_mck_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnu
 		 * a count of 0 will mark the debug registers as in use and also
 		 * ensure that they are properly cleared.
 		 */
-		ret = pfm_write_ibr_dbr(0, ctx, NULL, 0, regs);
+		ret = pfm_write_ibr_dbr(PFM_CODE_RR, ctx, NULL, 0, regs);
 		if (ret) return ret;
 
 	}

arch/ia64/kernel/sys_ia64.c

@@ -201,10 +201,16 @@ do_mmap2 (unsigned long addr, unsigned long len, int prot, int flags, int fd, un
 	 * A zero mmap always succeeds in Linux, independent of whether or not the
 	 * remaining arguments are valid.
 	 */
-	len = PAGE_ALIGN(len);
 	if (len == 0)
 		goto out;
 
+	/* Careful about overflows.. */
+	len = PAGE_ALIGN(len);
+	if (!len || len > TASK_SIZE) {
+		addr = -EINVAL;
+		goto out;
+	}
+
 	/*
 	 * Don't permit mappings into unmapped space, the virtual page table of a region,
 	 * or across a region boundary.  Note: RGN_MAP_LIMIT is equal to 2^n-PAGE_SIZE

arch/ia64/mm/hugetlbpage.c

@@ -9,6 +9,7 @@
  */
 
 #include <linux/config.h>
+#include <linux/module.h>
 #include <linux/init.h>
 #include <linux/fs.h>
 #include <linux/mm.h>

arch/ia64/pci/pci.c

@@ -442,7 +442,6 @@ pcibios_enable_device (struct pci_dev *dev, int mask)
 	if (ret < 0)
 		return ret;
 
-	printk(KERN_INFO "PCI: Found IRQ %d for device %s\n", dev->irq, pci_name(dev));
 	return acpi_pci_irq_enable(dev);
 }
 

arch/ia64/sn/io/hwgfs/interface.c

@@ -36,7 +36,7 @@ walk_parents_mkdir(
 		memcpy(buf, *path, len);
 		buf[len] = '\0';
 
-		error = link_path_walk(buf, nd); 
+		error = path_walk(buf, nd);
 		if (unlikely(error))
 			return error;
 
@@ -83,7 +83,7 @@ hwgfs_decode(
 	if (unlikely(error))
 		return error;
 
-	error = link_path_walk(name, &nd);
+	error = path_walk(name, &nd);
 	if (unlikely(error))
 		return error;
 
@@ -274,7 +274,7 @@ hwgfs_find_handle(
 	nd.dentry = dget(base ? base : hwgfs_vfsmount->mnt_sb->s_root);
 	nd.flags = (traverse_symlinks ? LOOKUP_FOLLOW : 0);
 
-	error = link_path_walk(name, &nd);
+	error = path_walk(name, &nd);
 	if (likely(!error)) {
 		dentry = nd.dentry;
 		path_release(&nd);		/* stale data from here! */

arch/ia64/sn/io/machvec/pci_bus_cvlink.c

@@ -811,7 +811,6 @@ sn_pci_init (void)
 	/*
 	 * set pci_raw_ops, etc.
 	 */
-
 	sgi_master_io_infr_init();
 
 	for (cnode = 0; cnode < numnodes; cnode++) {
@@ -826,16 +825,16 @@ sn_pci_init (void)
 #endif
 
 	controller = kmalloc(sizeof(struct pci_controller), GFP_KERNEL);
-	if (controller) {
-		memset(controller, 0, sizeof(struct pci_controller));
-		/* just allocate some devices and fill in the pci_dev structs */
-		for (i = 0; i < PCI_BUSES_TO_SCAN; i++)
-			pci_scan_bus(i, &sn_pci_ops, controller);
+	if (!controller) {
+		printk(KERN_WARNING "cannot allocate PCI controller\n");
+		return 0;
 	}
 
-	/*
-	 * actually find devices and fill in hwgraph structs
-	 */
+	memset(controller, 0, sizeof(struct pci_controller));
+
+	for (i = 0; i < PCI_BUSES_TO_SCAN; i++)
+		if (pci_bus_to_vertex(i))
+			pci_scan_bus(i, &sn_pci_ops, controller);
 
 	done_probing = 1;
 
@@ -857,13 +856,8 @@ sn_pci_init (void)
 	 * set the root start and end so that drivers calling check_region()
 	 * won't see a conflict
 	 */
-
-#ifdef CONFIG_IA64_SGI_SN_SIM
-	if (! IS_RUNNING_ON_SIMULATOR()) {
-		ioport_resource.start  = 0xc000000000000000;
-		ioport_resource.end =    0xcfffffffffffffff;
-	}
-#endif
+	ioport_resource.start = 0xc000000000000000;
+	ioport_resource.end = 0xcfffffffffffffff;
 
 	/*
 	 * Set the root start and end for Mem Resource.

arch/ia64/sn/io/machvec/pci_dma.c

@@ -391,11 +391,9 @@ sn_pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction)
 	dma_map = pcibr_dmamap_alloc(vhdl, NULL, size, PCIIO_DMA_DATA | 
 				     MINIMAL_ATE_FLAG(phys_addr, size));
 
-	if (!dma_map) {
-		printk(KERN_ERR "pci_map_single: Unable to allocate anymore "
-		       "32 bit page map entries.\n");
+	/* PMU out of entries */
+	if (!dma_map)
 		return 0;
-	}
 
 	dma_addr = (dma_addr_t) pcibr_dmamap_addr(dma_map, phys_addr, size);
 	dma_map->bd_dma_addr = dma_addr;
@@ -655,6 +653,12 @@ EXPORT_SYMBOL(sn_dma_sync_sg_for_device);
 int
 sn_dma_mapping_error(dma_addr_t dma_addr)
 {
+	/*
+	 * We can only run out of page mapping entries, so if there's
+	 * an error, tell the caller to try again later.
+	 */
+	if (!dma_addr)
+		return -EAGAIN;
 	return 0;
 }
 

arch/ia64/sn/io/sn2/pcibr/pcibr_slot.c

@@ -47,6 +47,7 @@ void pcibr_bus_addr_free(pciio_win_info_t);
 cfg_p pcibr_find_capability(cfg_p, unsigned);
 extern uint64_t  do_pcibr_config_get(cfg_p, unsigned, unsigned);
 void do_pcibr_config_set(cfg_p, unsigned, unsigned, uint64_t); 
+int pcibr_slot_pwr(vertex_hdl_t pcibr_vhdl, pciio_slot_t slot, int up, char *err_msg);
 
 
 /* 
@@ -351,7 +352,7 @@ pcibr_slot_enable(vertex_hdl_t pcibr_vhdl, struct pcibr_slot_enable_req_s *req_p
         goto enable_unlock;
     }
 
-    error = pcibr_slot_attach(pcibr_vhdl, slot, NULL,
+    error = pcibr_slot_attach(pcibr_vhdl, slot, 0,
                               req_p->req_resp.resp_l1_msg,
 			      &req_p->req_resp.resp_sub_errno);
 

drivers/char/sn_serial.c

@@ -82,10 +82,10 @@ static DECLARE_TASKLET(sn_sal_tasklet, sn_sal_tasklet_action, 0);
 static unsigned long sn_interrupt_timeout;
 
 extern u64 master_node_bedrock_address;
-static int sn_debug_printf(const char *fmt, ...);
 
 #undef DEBUG
 #ifdef DEBUG
+static int sn_debug_printf(const char *fmt, ...);
 #define DPRINTF(x...) sn_debug_printf(x)
 #else
 #define DPRINTF(x...) do { } while (0)
@@ -247,6 +247,7 @@ early_printk_sn_sal(const char *s, unsigned count)
 	sn_func->sal_puts(s, count);
 }
 
+#ifdef DEBUG
 /* this is as "close to the metal" as we can get, used when the driver
  * itself may be broken */
 static int
@@ -262,6 +263,7 @@ sn_debug_printf(const char *fmt, ...)
 	va_end(args);
 	return printed_len;
 }
+#endif /* DEBUG */
 
 /*
  * Interrupt handling routines.

include/asm-ia64/machvec_hpzx1.h

@@ -2,6 +2,7 @@
 #define _ASM_IA64_MACHVEC_HPZX1_h
 
 extern ia64_mv_setup_t dig_setup;
+extern ia64_mv_setup_t			sba_setup;
 extern ia64_mv_dma_alloc_coherent	sba_alloc_coherent;
 extern ia64_mv_dma_free_coherent	sba_free_coherent;
 extern ia64_mv_dma_map_single		sba_map_single;
@@ -19,7 +20,7 @@ extern ia64_mv_dma_mapping_error	sba_dma_mapping_error;
  * the macros are used directly.
  */
 #define platform_name			"hpzx1"
-#define platform_setup			dig_setup
+#define platform_setup			sba_setup
 #define platform_dma_init		machvec_noop
 #define platform_dma_alloc_coherent	sba_alloc_coherent
 #define platform_dma_free_coherent	sba_free_coherent

include/asm-ia64/perfmon.h

@@ -242,9 +242,10 @@ extern int pfm_unregister_buffer_fmt(pfm_uuid_t uuid);
 /*
  * perfmon interface exported to modules
  */
-extern long pfm_mod_fast_read_pmds(struct task_struct *, unsigned long mask[4], unsigned long *addr, struct pt_regs *regs);
-extern long pfm_mod_read_pmds(struct task_struct *, pfarg_reg_t *req, unsigned int nreq, struct pt_regs *regs);
-extern long pfm_mod_write_pmcs(struct task_struct *, pfarg_reg_t *req, unsigned int nreq, struct pt_regs *regs);
+extern int pfm_mod_read_pmds(struct task_struct *, void *req, unsigned int nreq, struct pt_regs *regs);
+extern int pfm_mod_write_pmcs(struct task_struct *, void *req, unsigned int nreq, struct pt_regs *regs);
+extern int pfm_mod_write_ibrs(struct task_struct *task, void *req, unsigned int nreq, struct pt_regs *regs);
+extern int pfm_mod_write_dbrs(struct task_struct *task, void *req, unsigned int nreq, struct pt_regs *regs);
 
 /*
  * describe the content of the local_cpu_date->pfm_syst_info field

include/asm-ia64/processor.h

@@ -137,14 +137,6 @@ struct ia64_psr {
  * state comes earlier:
  */
 struct cpuinfo_ia64 {
-	/* irq_stat must be 64-bit aligned */
-	union {
-		struct {
-			__u32 irq_count;
-			__u32 bh_count;
-		} f;
-		__u64 irq_and_bh_counts;
-	} irq_stat;
 	__u32 softirq_pending;
 	__u64 itm_delta;	/* # of clock cycles between clock ticks */
 	__u64 itm_next;		/* interval timer mask value to use for next clock tick */