clk: si5351: fix .round_rate for multisynth 6-7
The divider calculation for multisynth 6 and 7 differs from the calculation for multisynth 0-5. For MS6 and MS7, set MSx_P1 directly, MSx_P1=divide value [AN619, p. 6]. Referenced document: [AN619] Manually Generating an Si5351 Register Map, Rev. 0.4 Signed-off-by: Sergej Sawazki <ce3a@gmx.de> Signed-off-by: Michael Turquette <mturquette@linaro.org>
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