Commit 215b6771 authored by Jaroslav Kysela's avatar Jaroslav Kysela

ALSA update

  - ALS4000 - improved mixer support
  - ICE1712 - added ICE1724 (Envy24HT code)
            - fixed Delta410 support
  - usbaudio - added quirks for more Yamaha devices
parent a58bec86
......@@ -225,7 +225,6 @@ typedef struct _snd_sb sb_t;
#define SB_DT019X_MIC_DEV 0x6a
#define SB_DT019X_SPKR_DEV 0x6a
#define SB_DT019X_LINE_DEV 0x6e
#define SB_DT019X_OUTPUT_SW1 0x3c
#define SB_DT019X_OUTPUT_SW2 0x4c
#define SB_DT019X_CAPTURE_SW 0x6c
......@@ -235,6 +234,14 @@ typedef struct _snd_sb sb_t;
#define SB_DT019X_CAP_SYNTH 0x07
#define SB_DT019X_CAP_MAIN 0x07
#define SB_ALS4000_MONO_IO_CTRL 0x4b
#define SB_ALS4000_MIC_IN_GAIN 0x4d
#define SB_ALS4000_FMDAC 0x4f
#define SB_ALS4000_3D_SND_FX 0x50
#define SB_ALS4000_3D_TIME_DELAY 0x51
#define SB_ALS4000_3D_AUTO_MUTE 0x52
#define SB_ALS4000_QSOUND 0xdb
/* IRQ setting bitmap */
#define SB_IRQSETUP_IRQ9 0x01
#define SB_IRQSETUP_IRQ5 0x02
......
/* include/version.h. Generated automatically by configure. */
#define CONFIG_SND_VERSION "0.9.0rc5"
#define CONFIG_SND_DATE " (Sat Nov 23 10:12:47 2002 UTC)"
#define CONFIG_SND_VERSION "0.9.0rc6"
#define CONFIG_SND_DATE " (Thu Dec 05 10:04:08 2002 UTC)"
......@@ -106,7 +106,7 @@ int snd_pcm_update_hw_ptr_interrupt(snd_pcm_substream_t *substream)
if (runtime->tstamp_mode & SNDRV_PCM_TSTAMP_MMAP)
snd_timestamp_now((snd_timestamp_t*)&runtime->status->tstamp);
#ifdef CONFIG_SND_DEBUG
if (pos > runtime->buffer_size) {
if (pos >= runtime->buffer_size) {
snd_printk(KERN_ERR "BUG: stream = %i, pos = 0x%lx, buffer size = 0x%lx, period size = 0x%lx\n", substream->stream, pos, runtime->buffer_size, runtime->period_size);
} else
#endif
......@@ -172,7 +172,7 @@ int snd_pcm_update_hw_ptr(snd_pcm_substream_t *substream)
if (runtime->tstamp_mode & SNDRV_PCM_TSTAMP_MMAP)
snd_timestamp_now((snd_timestamp_t*)&runtime->status->tstamp);
#ifdef CONFIG_SND_DEBUG
if (pos > runtime->buffer_size) {
if (pos >= runtime->buffer_size) {
snd_printk(KERN_ERR "BUG: stream = %i, pos = 0x%lx, buffer size = 0x%lx, period size = 0x%lx\n", substream->stream, pos, runtime->buffer_size, runtime->period_size);
} else
#endif
......
This diff is collapsed.
......@@ -2,6 +2,7 @@
* card-als4000.c - driver for Avance Logic ALS4000 based soundcards.
* Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>,
* Jaroslav Kysela <perex@suse.cz>
* Copyright (C) 2002 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
*
* Framework borrowed from Massimo Piccioni's card-als100.c.
*
......@@ -11,6 +12,9 @@
* bought an ALS4000 based soundcard, I was forced to base this driver
* on reverse engineering.
*
* Note: this is no longer true. Pretty verbose chip docu (ALS4000a.PDF)
* can be found on the ALSA web site.
*
* The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an
* ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport
* interface. These subsystems can be mapped into ISA io-port space,
......@@ -23,11 +27,21 @@
*
* The ALS4000 can do real full duplex playback/capture.
*
* BUGS
* The box suggests there is some support for 3D sound, but I did not
* investigate this yet.
*
* FMDAC:
* - 0x4f -> port 0x14
* - port 0x15 |= 1
*
* Enable/disable 3D sound:
* - 0x50 -> port 0x14
* - change bit 6 (0x40) of port 0x15
*
* Set QSound:
* - 0xdb -> port 0x14
* - set port 0x15:
* 0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0)
*
* Set KSound:
* - value -> some port 0x0c0d
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -256,11 +270,18 @@ static int snd_als4000_playback_prepare(snd_pcm_substream_t *substream)
count >>=1;
count--;
/* FIXME: from second playback on, there's a lot more clicks and pops
* involved here than on first playback. Fiddling with
* tons of different settings didn't help (DMA, speaker on/off,
* reordering, ...). Something seems to get enabled on playback
* that I haven't found out how to disable again, which then causes
* the switching pops to reach the speakers the next time here. */
spin_lock_irqsave(&chip->reg_lock, flags);
snd_als4000_set_rate(chip, runtime->rate);
snd_als4000_set_playback_dma(chip, runtime->dma_addr, size);
snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON);
/* SPEAKER_ON not needed, since dma_on seems to also enable speaker */
/* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */
snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd);
snd_sbdsp_command(chip, playback_cmd(chip).format);
snd_sbdsp_command(chip, count);
......@@ -359,9 +380,9 @@ static void snd_als4000_interrupt(int irq, void *dev_id, struct pt_regs *regs)
spin_unlock_irqrestore(&chip->mixer_lock, flags);
if (sb_status & SB_IRQTYPE_8BIT)
inb(SBP(chip, DATA_AVAIL));
snd_sb_ack_8bit(chip);
if (sb_status & SB_IRQTYPE_16BIT)
inb(SBP(chip, DATA_AVAIL_16));
snd_sb_ack_16bit(chip);
if (sb_status & SB_IRQTYPE_MPUIN)
inb(chip->mpu_port);
if (sb_status & 0x20)
......@@ -547,14 +568,14 @@ static void __devinit snd_als4000_configure(sb_t *chip)
spin_unlock_irqrestore(&chip->reg_lock,flags);
}
static void snd_card_als4k_free( snd_card_t *card )
static void snd_card_als4000_free( snd_card_t *card )
{
snd_card_als4000_t * acard = (snd_card_als4000_t *)card->private_data;
/* make sure that interrupts are disabled */
snd_als4000_gcr_write_addr( acard->gcr, 0x8c, 0);
}
static int __devinit snd_card_als4k_probe(struct pci_dev *pci,
static int __devinit snd_card_als4000_probe(struct pci_dev *pci,
const struct pci_device_id *pci_id)
{
static int dev;
......@@ -608,7 +629,7 @@ static int __devinit snd_card_als4k_probe(struct pci_dev *pci,
acard = (snd_card_als4000_t *)card->private_data;
acard->gcr = gcr;
card->private_free = snd_card_als4k_free;
card->private_free = snd_card_als4000_free;
if ((err = snd_sbdsp_create(card,
gcr + 0x10,
......@@ -672,7 +693,7 @@ static int __devinit snd_card_als4k_probe(struct pci_dev *pci,
return 0;
}
static void __devexit snd_card_als4k_remove(struct pci_dev *pci)
static void __devexit snd_card_als4000_remove(struct pci_dev *pci)
{
snd_card_free(pci_get_drvdata(pci));
pci_set_drvdata(pci, NULL);
......@@ -681,11 +702,11 @@ static void __devexit snd_card_als4k_remove(struct pci_dev *pci)
static struct pci_driver driver = {
.name = "ALS4000",
.id_table = snd_als4000_ids,
.probe = snd_card_als4k_probe,
.remove = __devexit_p(snd_card_als4k_remove),
.probe = snd_card_als4000_probe,
.remove = __devexit_p(snd_card_als4000_remove),
};
static int __init alsa_card_als4k_init(void)
static int __init alsa_card_als4000_init(void)
{
int err;
......@@ -698,13 +719,13 @@ static int __init alsa_card_als4k_init(void)
return 0;
}
static void __exit alsa_card_als4k_exit(void)
static void __exit alsa_card_als4000_exit(void)
{
pci_unregister_driver(&driver);
}
module_init(alsa_card_als4k_init)
module_exit(alsa_card_als4k_exit)
module_init(alsa_card_als4000_init)
module_exit(alsa_card_als4000_exit)
#ifndef MODULE
......
......@@ -985,7 +985,7 @@ static void snd_es1938_free_pcm(snd_pcm_t *pcm)
snd_pcm_lib_preallocate_free_for_all(pcm);
}
static int __init snd_es1938_new_pcm(es1938_t *chip, int device, snd_pcm_t ** rpcm)
static int __devinit snd_es1938_new_pcm(es1938_t *chip, int device, snd_pcm_t ** rpcm)
{
snd_pcm_t *pcm;
int err;
......@@ -1364,7 +1364,7 @@ static int snd_es1938_dev_free(snd_device_t *device)
return snd_es1938_free(chip);
}
static int __init snd_es1938_create(snd_card_t * card,
static int __devinit snd_es1938_create(snd_card_t * card,
struct pci_dev * pci,
unsigned long dma1size,
unsigned long dma2size,
......@@ -1541,7 +1541,7 @@ static void snd_es1938_interrupt(int irq, void *dev_id, struct pt_regs *regs)
#define ES1938_DMA_SIZE 64
static int __init snd_es1938_mixer(snd_pcm_t *pcm)
static int __devinit snd_es1938_mixer(snd_pcm_t *pcm)
{
snd_card_t *card;
es1938_t *chip;
......
......@@ -5,7 +5,7 @@
export-objs := ice1712.o
snd-ice1712-objs := ice1712.o ak4524.o delta.o hoontech.o ews.o
snd-ice1712-objs := ice1712.o ak4524.o delta.o hoontech.o ews.o amp.o
# Toplevel Module Dependency
obj-$(CONFIG_SND_ICE1712) += snd-ice1712.o
......
......@@ -65,10 +65,8 @@ void snd_ice1712_ak4524_write(ice1712_t *ice, int chip,
tmp |= ak->cs_addr;
}
addr &= 0x07;
/* build I2C address + data byte */
/* assume C1=1, C0=0 */
addrdata = 0xa000 | (addr << 8) | data;
addrdata = (ak->caddr << 14) | 0x2000 | ((addr & 0x0f) << 8) | data;
for (idx = 15; idx >= 0; idx--) {
tmp &= ~(ak->data_mask | ak->clk_mask);
if (addrdata & (1 << idx))
......@@ -86,6 +84,9 @@ void snd_ice1712_ak4524_write(ice1712_t *ice, int chip,
ak->images[chip][addr] = data;
else
ak->ipga_gain[chip][addr-4] = data;
} else {
/* AK4529 */
ak->images[chip][addr] = data;
}
if (ak->cs_mask == ak->cs_addr) {
......@@ -170,7 +171,7 @@ void __devinit snd_ice1712_ak4524_init(ice1712_t *ice)
static unsigned char inits_ak4529[] = {
0x09, 0x01, /* 9: ATS=0, RSTN=1 */
0x0a, 0x3f, /* A: all power up, no zero/overflow detection */
0x00, 0x08, /* 0: TDM=0, 24bit I2S, SMUTE=0 */
0x00, 0x0c, /* 0: TDM=0, 24bit I2S, SMUTE=0 */
0x01, 0x00, /* 1: ACKS=0, ADC, loop off */
0x02, 0xff, /* 2: LOUT1 muted */
0x03, 0xff, /* 3: ROUT1 muted */
......@@ -217,14 +218,17 @@ void __devinit snd_ice1712_ak4524_init(ice1712_t *ice)
#define AK_GET_CHIP(val) (((val) >> 8) & 0xff)
#define AK_GET_ADDR(val) ((val) & 0xff)
#define AK_GET_SHIFT(val) (((val) >> 16) & 0xff)
#define AK_COMPOSE(chip,addr,shift) (((chip) << 8) | (addr) | ((shift) << 16))
#define AK_GET_MASK(val) (((val) >> 24) & 0xff)
#define AK_COMPOSE(chip,addr,shift,mask) (((chip) << 8) | (addr) | ((shift) << 16) | ((mask) << 24))
static int snd_ice1712_ak4524_volume_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
{
unsigned int mask = AK_GET_MASK(kcontrol->private_value);
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
uinfo->value.integer.min = 0;
uinfo->value.integer.max = 127;
uinfo->value.integer.max = mask;
return 0;
}
......@@ -233,7 +237,8 @@ static int snd_ice1712_ak4524_volume_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_
ice1712_t *ice = snd_kcontrol_chip(kcontrol);
int chip = AK_GET_CHIP(kcontrol->private_value);
int addr = AK_GET_ADDR(kcontrol->private_value);
ucontrol->value.integer.value[0] = ice->ak4524.images[chip][addr];
unsigned int mask = AK_GET_MASK(kcontrol->private_value);
ucontrol->value.integer.value[0] = mask - ice->ak4524.images[chip][addr];
return 0;
}
......@@ -242,7 +247,8 @@ static int snd_ice1712_ak4524_volume_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_
ice1712_t *ice = snd_kcontrol_chip(kcontrol);
int chip = AK_GET_CHIP(kcontrol->private_value);
int addr = AK_GET_ADDR(kcontrol->private_value);
unsigned char nval = ucontrol->value.integer.value[0];
unsigned int mask = AK_GET_MASK(kcontrol->private_value);
unsigned char nval = mask - (ucontrol->value.integer.value[0] % (mask+1));
int change = ice->ak4524.images[chip][addr] != nval;
if (change)
snd_ice1712_ak4524_write(ice, chip, addr, nval);
......@@ -340,14 +346,14 @@ int __devinit snd_ice1712_ak4524_build_controls(ice1712_t *ice)
ctl.put = snd_ice1712_ak4524_volume_put;
switch (ak->type) {
case SND_AK4524:
ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 6, 0); /* register 6 & 7 */
ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 6, 0, 127); /* register 6 & 7 */
break;
case SND_AK4528:
ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0); /* register 4 & 5 */
ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0, 127); /* register 4 & 5 */
break;
case SND_AK4529: {
int val = idx < 6 ? idx + 2 : (idx - 6) + 0xb; /* registers 2-7 and b,c */
ctl.private_value = AK_COMPOSE(0, val, 0);
ctl.private_value = AK_COMPOSE(0, val, 0, 255);
break;
}
}
......@@ -365,7 +371,7 @@ int __devinit snd_ice1712_ak4524_build_controls(ice1712_t *ice)
ctl.access = SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE;
ctl.get = snd_ice1712_ak4524_volume_get;
ctl.put = snd_ice1712_ak4524_volume_put;
ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0); /* register 4 & 5 */
ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0, 127); /* register 4 & 5 */
ctl.private_data = ice;
if ((err = snd_ctl_add(ice->card, snd_ctl_new(&ctl))) < 0)
return err;
......@@ -377,7 +383,7 @@ int __devinit snd_ice1712_ak4524_build_controls(ice1712_t *ice)
ctl.access = SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE;
ctl.get = snd_ice1712_ak4524_ipga_gain_get;
ctl.put = snd_ice1712_ak4524_ipga_gain_put;
ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0); /* register 4 & 5 */
ctl.private_value = AK_COMPOSE(idx/2, (idx%2) + 4, 0, 0); /* register 4 & 5 */
ctl.private_data = ice;
if ((err = snd_ctl_add(ice->card, snd_ctl_new(&ctl))) < 0)
return err;
......@@ -395,11 +401,11 @@ int __devinit snd_ice1712_ak4524_build_controls(ice1712_t *ice)
switch (ak->type) {
case SND_AK4524:
case SND_AK4528:
ctl.private_value = AK_COMPOSE(idx, 3, 0); /* register 3 */
ctl.private_value = AK_COMPOSE(idx, 3, 0, 0); /* register 3 */
break;
case SND_AK4529: {
int shift = idx == 3 ? 6 : (2 - idx) * 2;
ctl.private_value = AK_COMPOSE(0, 8, shift); /* register 8 with shift */
ctl.private_value = AK_COMPOSE(0, 8, shift, 0); /* register 8 with shift */
break;
}
}
......
/*
* ALSA driver for ICEnsemble VT1724 (Envy24HT)
*
* Lowlevel functions for Advanced Micro Peripherals Ltd AUDIO2000
*
* Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <sound/driver.h>
#include <asm/io.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <sound/core.h>
#include "ice1712.h"
#include "amp.h"
static int __devinit snd_vt1724_amp_init(ice1712_t *ice)
{
/* only use basic functionality for now */
ice->num_total_dacs = 2; /* only PSDOUT0 is connected */
return 0;
}
/* entry point */
struct snd_ice1712_card_info snd_vt1724_amp_cards[] __devinitdata = {
{
VT1724_SUBDEVICE_AUDIO2000,
"AMP Ltd AUDIO2000",
snd_vt1724_amp_init,
},
{ } /* terminator */
};
#ifndef __SOUND_AMP_H
#define __SOUND_AMP_H
/*
* ALSA driver for VIA VT1724 (Envy24HT)
*
* Lowlevel functions for Advanced Micro Peripherals Ltd AUDIO2000
*
* Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#define AMP_AUDIO2000_DEVICE_DESC "{AMP Ltd AUDIO2000},"
#define VT1724_SUBDEVICE_AUDIO2000 0x12142417 /* Advanced Micro Peripherals Ltd AUDIO2000 */
extern struct snd_ice1712_card_info snd_vt1724_amp_cards[];
#endif /* __SOUND_AMP_H */
......@@ -383,9 +383,11 @@ static int __devinit snd_ice1712_delta_init(ice1712_t *ice)
case ICE1712_SUBDEVICE_DELTA410:
ak->num_adcs = ak->num_dacs = 2;
ak->type = SND_AK4528;
ak->caddr = 2;
if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA410) {
ak->num_dacs = 8;
ak->type = SND_AK4529;
ak->caddr = 0;
}
ak->cif = 0; /* the default level of the CIF pin from AK4528/4529 */
ak->data_mask = ICE1712_DELTA_AP_DOUT;
......@@ -400,6 +402,7 @@ static int __devinit snd_ice1712_delta_init(ice1712_t *ice)
case ICE1712_SUBDEVICE_DELTA1010LT:
ak->num_adcs = ak->num_dacs = 8;
ak->type = SND_AK4524;
ak->caddr = 2;
ak->cif = 0; /* the default level of the CIF pin from AK4524 */
ak->data_mask = ICE1712_DELTA_1010LT_DOUT;
ak->clk_mask = ICE1712_DELTA_1010LT_CCLK;
......@@ -415,6 +418,7 @@ static int __devinit snd_ice1712_delta_init(ice1712_t *ice)
case ICE1712_SUBDEVICE_DELTA44:
ak->num_adcs = ak->num_dacs = 4;
ak->type = SND_AK4524;
ak->caddr = 2;
ak->cif = 0; /* the default level of the CIF pin from AK4524 */
ak->data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA;
ak->clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK;
......
#ifndef __SOUND_VT1724_H
#define __SOUND_VT1724_H
/*
* ALSA driver for ICEnsemble VT1724 (Envy24)
*
* Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <sound/control.h>
#include <sound/ac97_codec.h>
#include <sound/rawmidi.h>
#include <sound/i2c.h>
#include <sound/pcm.h>
#include "ice1712.h"
/*
* Direct registers
*/
#define ICEREG1724(ice, x) ((ice)->port + VT1724_REG_##x)
#define VT1724_REG_CONTROL 0x00 /* byte */
#define VT1724_RESET 0x80 /* reset whole chip */
#define VT1724_REG_IRQMASK 0x01 /* byte */
#define VT1724_IRQ_MPU_RX 0x80
#define VT1724_IRQ_MPU_TX 0x20
#define VT1724_IRQ_MTPCM 0x10
#define VT1724_REG_IRQSTAT 0x02 /* byte */
/* look to VT1724_IRQ_* */
#define VT1724_REG_SYS_CFG 0x04 /* byte - system configuration PCI60 on Envy24*/
#define VT1724_CFG_CLOCK 0xc0
#define VT1724_CFG_CLOCK512 0x00 /* 22.5692Mhz, 44.1kHz*512 */
#define VT1724_CFG_CLOCK384 0x40 /* 16.9344Mhz, 44.1kHz*384 */
#define VT1724_CFG_MPU401 0x20 /* MPU401 UARTs */
#define VT1724_CFG_ADC_MASK 0x0c /* one, two or one and S/PDIF, stereo ADCs */
#define VT1724_CFG_DAC_MASK 0x03 /* one, two, three, four stereo DACs */
#define VT1724_REG_AC97_CFG 0x05 /* byte */
#define VT1724_CFG_PRO_I2S 0x80 /* multitrack converter: I2S or AC'97 */
#define VT1724_CFG_AC97_PACKED 0x01 /* split or packed mode - AC'97 */
#define VT1724_REG_I2S_FEATURES 0x06 /* byte */
#define VT1724_CFG_I2S_VOLUME 0x80 /* volume/mute capability */
#define VT1724_CFG_I2S_96KHZ 0x40 /* supports 96kHz sampling */
#define VT1724_CFG_I2S_RESMASK 0x30 /* resolution mask, 16,18,20,24-bit */
#define VT1724_CFG_I2S_192KHZ 0x08 /* supports 192kHz sampling */
#define VT1724_CFG_I2S_OTHER 0x07 /* other I2S IDs */
#define VT1724_REG_SPDIF_CFG 0x07 /* byte */
#define VT1724_CFG_SPDIF_OUT_EN 0x80 /*Internal S/PDIF output is enabled*/
#define VT1724_CFG_SPDIF_OUT_INT 0x40 /*Internal S/PDIF output is implemented*/
#define VT1724_CFG_I2S_CHIPID 0x3c /* I2S chip ID */
#define VT1724_CFG_SPDIF_IN 0x02 /* S/PDIF input is present */
#define VT1724_CFG_SPDIF_OUT 0x01 /* External S/PDIF output is present */
/*there is no consumer AC97 codec with the VT1724*/
//#define VT1724_REG_AC97_INDEX 0x08 /* byte */
//#define VT1724_REG_AC97_CMD 0x09 /* byte */
#define VT1724_AC97_COLD 0x80 /* cold reset */
#define VT1724_AC97_WARM 0x40 /* warm reset */
#define VT1724_AC97_WRITE 0x20 /* W: write, R: write in progress */
#define VT1724_AC97_READ 0x10 /* W: read, R: read in progress */
#define VT1724_AC97_READY 0x08 /* codec ready status bit */
#define VT1724_AC97_PBK_VSR 0x02 /* playback VSR */
#define VT1724_AC97_CAP_VSR 0x01 /* capture VSR */
#define VT1724_REG_MPU_TXFIFO 0x0a /*byte ro. number of bytes in TX fifo*/
#define VT1724_REG_MPU_RXFIFO 0x0b /*byte ro. number of bytes in RX fifo*/
//are these 2 the wrong way around? they don't seem to be used yet anyway
#define VT1724_REG_MPU_CTRL 0x0c /* byte */
#define VT1724_REG_MPU_DATA 0x0d /* byte */
#define VT1724_REG_MPU_FIFO_WM 0x0e /*byte set the high/low watermarks for RX/TX fifos*/
#define VT1724_MPU_RX_FIFO 0x20 //1=rx fifo watermark 0=tx fifo watermark
#define VT1724_MPU_FIFO_MASK 0x1f
#define VT1724_REG_I2C_DEV_ADDR 0x10 /* byte */
#define VT1724_I2C_WRITE 0x01 /* write direction */
#define VT1724_REG_I2C_BYTE_ADDR 0x11 /* byte */
#define VT1724_REG_I2C_DATA 0x12 /* byte */
#define VT1724_REG_I2C_CTRL 0x13 /* byte */
#define VT1724_I2C_EEPROM 0x80 /* EEPROM exists */
#define VT1724_I2C_BUSY 0x01 /* busy bit */
#define VT1724_REG_GPIO_DATA 0x14 /* word */
#define VT1724_REG_GPIO_WRITE_MASK 0x15 /* word */
#define VT1724_REG_GPIO_DIRECTION 0x16 /* dword? (3 bytes) 0=input 1=output.
bit3 - during reset used for Eeprom power-on strapping
if TESTEN# pin active, bit 2 always input*/
#define VT1724_REG_POWERDOWN 0x1c
#define VT1724_REG_GPIO_DIRECTION_22 0x1e /* byte direction for GPIO 16:22 */
#define VT1724_REG_GPIO_WRITE_MASK_22 0x1f /* byte write mask for GPIO 16:22 */
/*
* Professional multi-track direct control registers
*/
#define ICEMT1724(ice, x) ((ice)->profi_port + VT1724_MT_##x)
#define VT1724_MT_IRQ 0x00 /* byte - interrupt mask */
#define VT1724_MULTI_PDMA4 0x80 /* SPDIF Out / PDMA4 */
#define VT1724_MULTI_PDMA3 0x40 /* PDMA3 */
#define VT1724_MULTI_PDMA2 0x20 /* PDMA2 */
#define VT1724_MULTI_PDMA1 0x10 /* PDMA1 */
#define VT1724_MULTI_FIFO_ERR 0x08 /* DMA FIFO underrun/overrun. */
#define VT1724_MULTI_RDMA1 0x04 /* RDMA1 (S/PDIF input) */
#define VT1724_MULTI_RDMA0 0x02 /* RMDA0 */
#define VT1724_MULTI_PDMA0 0x01 /* MC Interleave/PDMA0 */
#define VT1724_MT_RATE 0x01 /* byte - sampling rate select */
#define VT1724_SPDIF_MASTER 0x10 /* S/PDIF input is master clock */
#define VT1724_MT_I2S_FORMAT 0x02 /* byte - I2S data format */
#define VT1724_MT_DMA_INT_MASK 0x03 /* byte -DMA Interrupt Mask */
/* lool to VT1724_MULTI_* */
#define VT1724_MT_AC97_INDEX 0x04 /* byte - AC'97 index */
#define VT1724_MT_AC97_CMD 0x05 /* byte - AC'97 command & status */
/* look to VT1724_AC97_* */
#define VT1724_MT_AC97_DATA 0x06 /* word - AC'97 data */
#define VT1724_MT_PLAYBACK_ADDR 0x10 /* dword - playback address */
#define VT1724_MT_PLAYBACK_SIZE 0x14 /* dword - playback size */
#define VT1724_MT_PLAYBACK_CONTROL 0x18 /* byte - control */
#define VT1724_PDMA4_START 0x80 /* SPDIF out / PDMA4 start */
#define VT1724_PDMA3_START 0x40 /* PDMA3 start */
#define VT1724_PDMA2_START 0x20 /* PDMA2 start */
#define VT1724_PDMA1_START 0x10 /* PDMA1 start */
#define VT1724_RDMA1_START 0x04 /* RDMA1 start */
#define VT1724_RDMA0_START 0x02 /* RMDA0 start */
#define VT1724_PDMA0_START 0x01 /* MC Interleave / PDMA0 start */
#define VT1724_MT_BURST 0x19 /* Interleaved playback DMA Active streams / PCI burst size */
#define VT1724_MT_DMA_FIFO_ERR 0x1a /*Global playback and record DMA FIFO Underrun/Overrun */
#define VT1724_PDMA4_UNDERRUN 0x80
#define VT1724_PDMA2_UNDERRUN 0x40
#define VT1724_PDMA3_UNDERRUN 0x20
#define VT1724_PDMA1_UNDERRUN 0x10
#define VT1724_RDMA1_UNDERRUN 0x04
#define VT1724_RDMA0_UNDERRUN 0x02
#define VT1724_PDMA0_UNDERRUN 0x01
#define VT1724_MT_DMA_PAUSE 0x1b /*Global playback and record DMA FIFO pause/resume */
#define VT1724_PDMA4_PAUSE 0x80
#define VT1724_PDMA3_PAUSE 0x40
#define VT1724_PDMA2_PAUSE 0x20
#define VT1724_PDMA1_PAUSE 0x10
#define VT1724_RDMA1_PAUSE 0x04
#define VT1724_RDMA0_PAUSE 0x02
#define VT1724_PDMA0_PAUSE 0x01
#define VT1724_MT_PLAYBACK_COUNT 0x1c /* word - playback count */
#define VT1724_MT_CAPTURE_ADDR 0x20 /* dword - capture address */
#define VT1724_MT_CAPTURE_SIZE 0x24 /* word - capture size */
#define VT1724_MT_CAPTURE_COUNT 0x26 /* word - capture count */
#define VT1724_MT_RDMA1_ADDR 0x30 /* dword - RDMA1 capture address */
#define VT1724_MT_RDMA1_SIZE 0x34 /* word - RDMA1 capture size */
#define VT1724_MT_RDMA1_COUNT 0x36 /* word - RDMA1 capture count */
#define VT1724_MT_ROUTE_PLAYBACK 0x2c /* word */
//#define VT1724_MT_MONITOR_VOLUME 0x3f /* word */
//#define VT1724_MT_MONITOR_INDEX 0x3e /* byte */
#define VT1724_MT_PDMA4_ADDR 0x40 /* dword */
#define VT7124_MT_PDMA4_SIZE 0x44 /* word */
#define VT1724_MT_PDMA4_COUNT 0x46 /* word */
#define VT1724_MT_PDMA3_ADDR 0x50 /* dword */
#define VT7124_MT_PDMA3_SIZE 0x54 /* word */
#define VT1724_MT_PDMA3_COUNT 0x56 /* word */
#define VT1724_MT_PDMA2_ADDR 0x60 /* dword */
#define VT7124_MT_PDMA2_SIZE 0x64 /* word */
#define VT1724_MT_PDMA2_COUNT 0x66 /* word */
#define VT1724_MT_PDMA1_ADDR 0x70 /* dword */
#define VT7124_MT_PDMA1_SIZE 0x74 /* word */
#define VT1724_MT_PDMA1_COUNT 0x76 /* word */
//does VT1724 have these? don't think so
//#define VT1724_MT_MONITOR_RATE 0x3b /* byte */
//#define VT1724_MT_MONITOR_ROUTECTRL 0x3c /* byte */
//#define VT1724_ROUTE_AC97 0x01 /* route digital mixer output to AC'97 */
#define VT1724_MT_MONITOR_PEAKINDEX 0x3e /* byte */
#define VT1724_MT_MONITOR_PEAKDATA 0x3f /* byte */
#endif /* __SOUND_VT1724_H */
......@@ -405,6 +405,7 @@ static int __devinit snd_ice1712_ews_init(ice1712_t *ice)
case ICE1712_SUBDEVICE_EWS88MT:
ak->num_adcs = ak->num_dacs = 8;
ak->type = SND_AK4524;
ak->caddr = 2;
ak->cif = 1; /* CIF high */
ak->data_mask = ICE1712_EWS88_SERIAL_DATA;
ak->clk_mask = ICE1712_EWS88_SERIAL_CLOCK;
......@@ -418,6 +419,7 @@ static int __devinit snd_ice1712_ews_init(ice1712_t *ice)
case ICE1712_SUBDEVICE_EWX2496:
ak->num_adcs = ak->num_dacs = 2;
ak->type = SND_AK4524;
ak->caddr = 2;
ak->cif = 1; /* CIF high */
ak->data_mask = ICE1712_EWS88_SERIAL_DATA;
ak->clk_mask = ICE1712_EWS88_SERIAL_CLOCK;
......@@ -431,6 +433,7 @@ static int __devinit snd_ice1712_ews_init(ice1712_t *ice)
case ICE1712_SUBDEVICE_DMX6FIRE:
ak->num_adcs = ak->num_dacs = 6;
ak->type = SND_AK4524;
ak->caddr = 2;
ak->cif = 1; /* CIF high */
ak->data_mask = ICE1712_6FIRE_SERIAL_DATA;
ak->clk_mask = ICE1712_6FIRE_SERIAL_CLOCK;
......
This diff is collapsed.
......@@ -248,6 +248,7 @@ struct snd_ak4524 {
unsigned int cif: 1;
unsigned char data_mask;
unsigned char clk_mask;
unsigned char caddr; /* C0 and C1 bits */
unsigned char cs_mask;
unsigned char cs_addr;
unsigned char cs_none;
......@@ -335,7 +336,8 @@ struct _snd_ice1712 {
snd_i2c_device_t *cs8427; /* CS8427 I2C device */
snd_i2c_device_t *i2cdevs[2]; /* additional i2c devices */
unsigned char gpio_direction, gpio_write_mask;
unsigned int gpio_direction, gpio_write_mask;
int vt1724;
};
#define chip_t ice1712_t
......
......@@ -291,21 +291,21 @@ static snd_pcm_hardware_t snd_rme32_playback_spdif_info = {
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_PAUSE),
formats: (SNDRV_PCM_FMTBIT_S16_LE |
.formats = (SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S32_LE),
rates: (SNDRV_PCM_RATE_32000 |
.rates = (SNDRV_PCM_RATE_32000 |
SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000),
rate_min: 32000,
rate_max: 48000,
channels_min: 2,
channels_max: 2,
buffer_bytes_max: RME32_BUFFER_SIZE,
period_bytes_min: RME32_BLOCK_SIZE,
period_bytes_max: RME32_BLOCK_SIZE,
periods_min: RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
periods_max: RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
fifo_size: 0,
.rate_min = 32000,
.rate_max = 48000,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = RME32_BUFFER_SIZE,
.period_bytes_min = RME32_BLOCK_SIZE,
.period_bytes_max = RME32_BLOCK_SIZE,
.periods_min = RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
.periods_max = RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
.fifo_size = 0,
};
/*
......@@ -315,19 +315,19 @@ static snd_pcm_hardware_t snd_rme32_capture_spdif_info = {
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_PAUSE),
formats: (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE),
rates: (SNDRV_PCM_RATE_32000 |
.formats = (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE),
.rates = (SNDRV_PCM_RATE_32000 |
SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000),
rate_min: 32000,
rate_max: 48000,
channels_min: 2,
channels_max: 2,
buffer_bytes_max: RME32_BUFFER_SIZE,
period_bytes_min: RME32_BLOCK_SIZE,
period_bytes_max: RME32_BLOCK_SIZE,
periods_min: RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
periods_max: RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
fifo_size: 0,
.rate_min = 32000,
.rate_max = 48000,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = RME32_BUFFER_SIZE,
.period_bytes_min = RME32_BLOCK_SIZE,
.period_bytes_max = RME32_BLOCK_SIZE,
.periods_min = RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
.periods_max = RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
.fifo_size = 0,
};
/*
......@@ -339,19 +339,19 @@ static snd_pcm_hardware_t snd_rme32_playback_adat_info =
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_PAUSE),
formats: SNDRV_PCM_FMTBIT_S16_LE,
rates: (SNDRV_PCM_RATE_44100 |
.formats= SNDRV_PCM_FMTBIT_S16_LE,
.rates = (SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000),
rate_min: 44100,
rate_max: 48000,
channels_min: 8,
channels_max: 8,
buffer_bytes_max: RME32_BUFFER_SIZE,
period_bytes_min: RME32_BLOCK_SIZE,
period_bytes_max: RME32_BLOCK_SIZE,
periods_min: RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
periods_max: RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
fifo_size: 0,
.rate_min = 44100,
.rate_max = 48000,
.channels_min = 8,
.channels_max = 8,
.buffer_bytes_max = RME32_BUFFER_SIZE,
.period_bytes_min = RME32_BLOCK_SIZE,
.period_bytes_max = RME32_BLOCK_SIZE,
.periods_min = RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
.periods_max = RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
.fifo_size = 0,
};
/*
......@@ -363,19 +363,19 @@ static snd_pcm_hardware_t snd_rme32_capture_adat_info =
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_PAUSE),
formats: SNDRV_PCM_FMTBIT_S16_LE,
rates: (SNDRV_PCM_RATE_44100 |
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = (SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000),
rate_min: 44100,
rate_max: 48000,
channels_min: 8,
channels_max: 8,
buffer_bytes_max: RME32_BUFFER_SIZE,
period_bytes_min: RME32_BLOCK_SIZE,
period_bytes_max: RME32_BLOCK_SIZE,
periods_min: RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
periods_max: RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
fifo_size: 0,
.rate_min = 44100,
.rate_max = 48000,
.channels_min = 8,
.channels_max = 8,
.buffer_bytes_max = RME32_BUFFER_SIZE,
.period_bytes_min = RME32_BLOCK_SIZE,
.period_bytes_max = RME32_BLOCK_SIZE,
.periods_min = RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
.periods_max = RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
.fifo_size = 0,
};
static void snd_rme32_reset_dac(rme32_t *rme32)
......
......@@ -161,6 +161,60 @@
.type = QUIRK_MIDI_YAMAHA
}
},
{
USB_DEVICE(0x0499, 0x1012),
.driver_info = (unsigned long) & (const snd_usb_audio_quirk_t) {
.vendor_name = "Yamaha",
.product_name = "TYROS",
.ifnum = QUIRK_ANY_INTERFACE,
.type = QUIRK_MIDI_YAMAHA
}
},
{
USB_DEVICE(0x0499, 0x1013),
.driver_info = (unsigned long) & (const snd_usb_audio_quirk_t) {
.vendor_name = "Yamaha",
.product_name = "PF-500",
.ifnum = QUIRK_ANY_INTERFACE,
.type = QUIRK_MIDI_YAMAHA
}
},
{
USB_DEVICE(0x0499, 0x1014),
.driver_info = (unsigned long) & (const snd_usb_audio_quirk_t) {
.vendor_name = "Yamaha",
.product_name = "S90",
.ifnum = QUIRK_ANY_INTERFACE,
.type = QUIRK_MIDI_YAMAHA
}
},
{
USB_DEVICE(0x0499, 0x5002),
.driver_info = (unsigned long) & (const snd_usb_audio_quirk_t) {
.vendor_name = "Yamaha",
.product_name = "DME32",
.ifnum = QUIRK_ANY_INTERFACE,
.type = QUIRK_MIDI_YAMAHA
}
},
{
USB_DEVICE(0x0499, 0x5003),
.driver_info = (unsigned long) & (const snd_usb_audio_quirk_t) {
.vendor_name = "Yamaha",
.product_name = "DM2000",
.ifnum = QUIRK_ANY_INTERFACE,
.type = QUIRK_MIDI_YAMAHA
}
},
{
USB_DEVICE(0x0499, 0x5004),
.driver_info = (unsigned long) & (const snd_usb_audio_quirk_t) {
.vendor_name = "Yamaha",
.product_name = "02R96",
.ifnum = QUIRK_ANY_INTERFACE,
.type = QUIRK_MIDI_YAMAHA
}
},
/*
* Once upon a time people thought, "Wouldn't it be nice if there was a
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment