[ARM PATCH] 1404/1: basic Lubbock/PXA250 updates

Patch from Nicolas Pitre

arch/arm/common/sa1111.c

@@ -418,6 +418,7 @@ static void sa1111_wake(struct sa1111 *sachip)
 
 	spin_lock_irqsave(&sachip->lock, flags);
 
+#if CONFIG_ARCH_SA1100
 	/*
 	 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
 	 * (SA-1110 Developer's Manual, section 9.1.2.1)
@@ -425,6 +426,11 @@ static void sa1111_wake(struct sa1111 *sachip)
 	GAFR |= GPIO_32_768kHz;
 	GPDR |= GPIO_32_768kHz;
 	TUCR = TUCR_3_6864MHz;
+#elif CONFIG_ARCH_PXA
+	pxa_gpio_mode(GPIO11_3_6MHz_MD);
+#else
+#error missing clock setup
+#endif
 
 	/*
 	 * Turn VCO on, and disable PLL Bypass.
@@ -461,6 +467,8 @@ static void sa1111_wake(struct sa1111 *sachip)
 	spin_unlock_irqrestore(&sachip->lock, flags);
 }
 
+#ifdef CONFIG_ARCH_SA1100
+
 /*
  * Configure the SA1111 shared memory controller.
  */
@@ -476,6 +484,8 @@ sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
 	sa1111_writel(smcr, sachip->base + SA1111_SMCR);
 }
 
+#endif
+
 static void
 sa1111_init_one_child(struct sa1111 *sachip, struct sa1111_dev *sadev, unsigned int offset)
 {
@@ -569,6 +579,7 @@ __sa1111_probe(struct device *me, unsigned long phys_addr, int irq)
 	 */
 	sa1111_wake(sachip);
 
+#ifdef CONFIG_ARCH_SA1100
 	/*
 	 * The SDRAM configuration of the SA1110 and the SA1111 must
 	 * match.  This is very important to ensure that SA1111 accesses
@@ -592,6 +603,7 @@ __sa1111_probe(struct device *me, unsigned long phys_addr, int irq)
 	 * Enable the SA1110 memory bus request and grant signals.
 	 */
 	sa1110_mb_enable();
+#endif
 
 	/*
 	 * The interrupt controller must be initialised before any

arch/arm/mach-pxa/Makefile

@@ -4,18 +4,17 @@
 
 # Common support (must be linked before board specific support)
 obj-y += generic.o irq.o dma.o
-obj-$(CONFIG_SA1111) += sa1111.o
 
 # Specific board support
 obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
 obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
 
 # Support for blinky lights
-leds-y := leds.o
-leds-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o
-leds-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o
+led-y := leds.o
+led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o
+led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o
 
-obj-$(CONFIG_LEDS) += $(leds-y)
+obj-$(CONFIG_LEDS) += $(led-y)
 
 # Misc features
 obj-$(CONFIG_PM) += pm.o sleep.o

arch/arm/mach-pxa/generic.c

@@ -38,7 +38,7 @@
 static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
 
 /* Memory Frequency to Run Mode Frequency Multiplier (M) */
-static unsigned char M_clk_mult[4] = { 0, 1, 2, 0 };
+static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
 
 /* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
 /* Note: we store the value N * 2 here. */
@@ -47,11 +47,12 @@ static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
 /* Crystal clock */
 #define BASE_CLK	3686400
 
-
 /*
- * Display what we were booted with.
+ * Get the clock frequency as reflected by CCCR and the turbo flag.
+ * We assume these values have been applied via a fcs.
+ * If info is not 0 we also display the current settings.
  */
-static int __init pxa_display_clocks(void)
+unsigned int get_clk_frequency_khz(int info)
 {
 	unsigned long cccr, turbo;
 	unsigned int l, L, m, M, n2, N;
@@ -67,20 +68,24 @@ static int __init pxa_display_clocks(void)
 	M = m * L;
 	N = n2 * M / 2;
 
-	L += 5000;
-	printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",
-		L / 1000000, (L % 1000000) / 10000, l );
-	M += 5000;
-	printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
-		M / 1000000, (M % 1000000) / 10000, m );
-	N += 5000;
-	printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
-		N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,
-		(turbo & 1) ? "" : "in" );
-
-	return 0;
+	if(info)
+	{
+		L += 5000;
+		printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",
+			L / 1000000, (L % 1000000) / 10000, l );
+		M += 5000;
+		printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
+			M / 1000000, (M % 1000000) / 10000, m );
+		N += 5000;
+		printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
+			N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,
+			(turbo & 1) ? "" : "in" );
+	}
+
+	return (turbo & 1) ? (N/1000) : (M/1000);
 }
 
+EXPORT_SYMBOL(get_clk_frequency_khz);
 
 /*
  * Return the current lclk requency in units of 10kHz
@@ -132,5 +137,5 @@ static struct map_desc standard_io_desc[] __initdata = {
 void __init pxa_map_io(void)
 {
 	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
-	pxa_display_clocks();
+	get_clk_frequency_khz(1);
 }

arch/arm/mach-pxa/irq.c

@@ -241,10 +241,4 @@ void __init pxa_init_irq(void)
 	/* Install handler for GPIO 2-80 edge detect interrupts */
 	set_irq_chip(IRQ_GPIO_2_80, &pxa_internal_chip);
 	set_irq_chained_handler(IRQ_GPIO_2_80, pxa_gpio_demux_handler);
-
-	/*
-	 * We generally don't want the LCD IRQ being
-	 * enabled as soon as we request it.
-	 */
-	set_irq_flags(IRQ_LCD, IRQF_VALID | IRQF_NOAUTOEN);
 }

arch/arm/mach-pxa/leds.c

@@ -27,4 +27,4 @@ pxa_leds_init(void)
 	return 0;
 }
 
-__initcall(pxa_leds_init);
+core_initcall(pxa_leds_init);

arch/arm/mach-pxa/lubbock.c

@@ -13,6 +13,7 @@
  */
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/device.h>
 #include <linux/major.h>
 #include <linux/fs.h>
 #include <linux/interrupt.h>
@@ -31,7 +32,6 @@
 #include <asm/hardware/sa1111.h>
 
 #include "generic.h"
-#include "sa1111.h"
 
 static void lubbock_ack_irq(unsigned int irq)
 {
@@ -106,24 +106,16 @@ static void __init lubbock_init_irq(void)
 
 static int __init lubbock_init(void)
 {
-	int ret;
-
-	ret = sa1111_probe(LUBBOCK_SA1111_BASE);
-	if (ret)
-		return ret;
-	sa1111_wake();
-	sa1111_init_irq(LUBBOCK_SA1111_IRQ);
-	return 0;
+	return sa1111_init(0x10000000, LUBBOCK_SA1111_IRQ);
 }
 
-__initcall(lubbock_init);
+subsys_initcall(lubbock_init);
 
 static struct map_desc lubbock_io_desc[] __initdata = {
  /* virtual     physical    length      type */
   { 0xf0000000, 0x08000000, 0x00100000, MT_DEVICE }, /* CPLD */
   { 0xf1000000, 0x0c000000, 0x00100000, MT_DEVICE }, /* LAN91C96 IO */
   { 0xf1100000, 0x0e000000, 0x00100000, MT_DEVICE }, /* LAN91C96 Attr */
-  { 0xf4000000, 0x10000000, 0x00400000, MT_DEVICE }  /* SA1111 */
 };
 
 static void __init lubbock_map_io(void)

include/asm-arm/arch-pxa/bitfield.h

+/*
+ *	FILE    	bitfield.h
+ *
+ *	Version 	1.1
+ *	Author  	Copyright (c) Marc A. Viredaz, 1998
+ *	        	DEC Western Research Laboratory, Palo Alto, CA
+ *	Date    	April 1998 (April 1997)
+ *	System  	Advanced RISC Machine (ARM)
+ *	Language	C or ARM Assembly
+ *	Purpose 	Definition of macros to operate on bit fields.
+ */
+
+
+
+#ifndef __BITFIELD_H
+#define __BITFIELD_H
+
+#ifndef __ASSEMBLY__
+#define UData(Data)	((unsigned long) (Data))
+#else
+#define UData(Data)	(Data)
+#endif
+
+
+/*
+ * MACRO: Fld
+ *
+ * Purpose
+ *    The macro "Fld" encodes a bit field, given its size and its shift value
+ *    with respect to bit 0.
+ *
+ * Note
+ *    A more intuitive way to encode bit fields would have been to use their
+ *    mask. However, extracting size and shift value information from a bit
+ *    field's mask is cumbersome and might break the assembler (255-character
+ *    line-size limit).
+ *
+ * Input
+ *    Size      	Size of the bit field, in number of bits.
+ *    Shft      	Shift value of the bit field with respect to bit 0.
+ *
+ * Output
+ *    Fld       	Encoded bit field.
+ */
+
+#define Fld(Size, Shft)	(((Size) << 16) + (Shft))
+
+
+/*
+ * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit
+ *
+ * Purpose
+ *    The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return
+ *    the size, shift value, mask, aligned mask, and first bit of a
+ *    bit field.
+ *
+ * Input
+ *    Field     	Encoded bit field (using the macro "Fld").
+ *
+ * Output
+ *    FSize     	Size of the bit field, in number of bits.
+ *    FShft     	Shift value of the bit field with respect to bit 0.
+ *    FMsk      	Mask for the bit field.
+ *    FAlnMsk   	Mask for the bit field, aligned on bit 0.
+ *    F1stBit   	First bit of the bit field.
+ */
+
+#define FSize(Field)	((Field) >> 16)
+#define FShft(Field)	((Field) & 0x0000FFFF)
+#define FMsk(Field)	(((UData (1) << FSize (Field)) - 1) << FShft (Field))
+#define FAlnMsk(Field)	((UData (1) << FSize (Field)) - 1)
+#define F1stBit(Field)	(UData (1) << FShft (Field))
+
+
+/*
+ * MACRO: FInsrt
+ *
+ * Purpose
+ *    The macro "FInsrt" inserts a value into a bit field by shifting the
+ *    former appropriately.
+ *
+ * Input
+ *    Value     	Bit-field value.
+ *    Field     	Encoded bit field (using the macro "Fld").
+ *
+ * Output
+ *    FInsrt    	Bit-field value positioned appropriately.
+ */
+
+#define FInsrt(Value, Field) \
+                	(UData (Value) << FShft (Field))
+
+
+/*
+ * MACRO: FExtr
+ *
+ * Purpose
+ *    The macro "FExtr" extracts the value of a bit field by masking and
+ *    shifting it appropriately.
+ *
+ * Input
+ *    Data      	Data containing the bit-field to be extracted.
+ *    Field     	Encoded bit field (using the macro "Fld").
+ *
+ * Output
+ *    FExtr     	Bit-field value.
+ */
+
+#define FExtr(Data, Field) \
+                	((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
+
+
+#endif /* __BITFIELD_H */

include/asm-arm/arch-pxa/hardware.h

@@ -103,6 +103,5 @@ extern unsigned int get_lclk_frequency_10khz(void);
 
 #include "lubbock.h"
 #include "idp.h"
-#include "cerf.h"
 
 #endif  /* _ASM_ARCH_HARDWARE_H */

include/asm-arm/arch-pxa/irqs.h

@@ -44,78 +44,86 @@
 			((i) - PXA_IRQ(32) + 2)
 #define IRQ_TO_GPIO(i)	((i) - (((i) > IRQ_GPIO1) ? IRQ_GPIO(2) : IRQ_GPIO(0)))
 
-#define	NR_IRQS		(IRQ_GPIO(80) + 1)
-
-#if defined(CONFIG_SA1111)
-
-#define IRQ_SA1111_START	(IRQ_GPIO(80) + 1)
-#define SA1111_IRQ(x)		(IRQ_SA1111_START + (x))
-
-#define IRQ_GPAIN0		SA1111_IRQ(0)
-#define IRQ_GPAIN1		SA1111_IRQ(1)
-#define IRQ_GPAIN2		SA1111_IRQ(2)
-#define IRQ_GPAIN3		SA1111_IRQ(3)
-#define IRQ_GPBIN0		SA1111_IRQ(4)
-#define IRQ_GPBIN1		SA1111_IRQ(5)
-#define IRQ_GPBIN2		SA1111_IRQ(6)
-#define IRQ_GPBIN3		SA1111_IRQ(7)
-#define IRQ_GPBIN4		SA1111_IRQ(8)
-#define IRQ_GPBIN5		SA1111_IRQ(9)
-#define IRQ_GPCIN0		SA1111_IRQ(10)
-#define IRQ_GPCIN1		SA1111_IRQ(11)
-#define IRQ_GPCIN2		SA1111_IRQ(12)
-#define IRQ_GPCIN3		SA1111_IRQ(13)
-#define IRQ_GPCIN4		SA1111_IRQ(14)
-#define IRQ_GPCIN5		SA1111_IRQ(15)
-#define IRQ_GPCIN6		SA1111_IRQ(16)
-#define IRQ_GPCIN7		SA1111_IRQ(17)
-#define IRQ_MSTXINT		SA1111_IRQ(18)
-#define IRQ_MSRXINT		SA1111_IRQ(19)
-#define IRQ_MSSTOPERRINT	SA1111_IRQ(20)
-#define IRQ_TPTXINT		SA1111_IRQ(21)
-#define IRQ_TPRXINT		SA1111_IRQ(22)
-#define IRQ_TPSTOPERRINT	SA1111_IRQ(23)
-#define SSPXMTINT	SA1111_IRQ(24)
-#define SSPRCVINT	SA1111_IRQ(25)
-#define SSPROR		SA1111_IRQ(26)
-#define AUDXMTDMADONEA	SA1111_IRQ(32)
-#define AUDRCVDMADONEA	SA1111_IRQ(33)
-#define AUDXMTDMADONEB	SA1111_IRQ(34)
-#define AUDRCVDMADONEB	SA1111_IRQ(35)
-#define AUDTFSR		SA1111_IRQ(36)
-#define AUDRFSR		SA1111_IRQ(37)
-#define AUDTUR		SA1111_IRQ(38)
-#define AUDROR		SA1111_IRQ(39)
-#define AUDDTS		SA1111_IRQ(40)
-#define AUDRDD		SA1111_IRQ(41)
-#define AUDSTO		SA1111_IRQ(42)
-#define USBPWR		SA1111_IRQ(43)
-#define NIRQHCIM	SA1111_IRQ(44)
-#define HCIBUFFACC	SA1111_IRQ(45)
-#define HCIRMTWKP	SA1111_IRQ(46)
-#define NHCIMFCIR	SA1111_IRQ(47)
-#define PORT_RESUME	SA1111_IRQ(48)
-#define S0_READY_NINT	SA1111_IRQ(49)
-#define S1_READY_NINT	SA1111_IRQ(50)
-#define S0_CD_VALID	SA1111_IRQ(51)
-#define S1_CD_VALID	SA1111_IRQ(52)
-#define S0_BVD1_STSCHG	SA1111_IRQ(53)
-#define S1_BVD1_STSCHG	SA1111_IRQ(54)
-
-#define SA1111_IRQ_MAX	SA1111_IRQ(54)
-
-#undef NR_IRQS
-#define NR_IRQS		(SA1111_IRQ_MAX + 1)
-
-#endif	// defined(CONFIG_SA1111)
+/*
+ * The next 16 interrupts are for board specific purposes.  Since
+ * the kernel can only run on one machine at a time, we can re-use
+ * these.  If you need more, increase IRQ_BOARD_END, but keep it
+ * within sensible limits.
+ */
+#define IRQ_BOARD_START		(IRQ_GPIO(80) + 1)
+#define IRQ_BOARD_END		(IRQ_BOARD_START + 16)
+
+#define IRQ_SA1111_START	(IRQ_BOARD_END)
+#define IRQ_GPAIN0		(IRQ_BOARD_END + 0)
+#define IRQ_GPAIN1		(IRQ_BOARD_END + 1)
+#define IRQ_GPAIN2		(IRQ_BOARD_END + 2)
+#define IRQ_GPAIN3		(IRQ_BOARD_END + 3)
+#define IRQ_GPBIN0		(IRQ_BOARD_END + 4)
+#define IRQ_GPBIN1		(IRQ_BOARD_END + 5)
+#define IRQ_GPBIN2		(IRQ_BOARD_END + 6)
+#define IRQ_GPBIN3		(IRQ_BOARD_END + 7)
+#define IRQ_GPBIN4		(IRQ_BOARD_END + 8)
+#define IRQ_GPBIN5		(IRQ_BOARD_END + 9)
+#define IRQ_GPCIN0		(IRQ_BOARD_END + 10)
+#define IRQ_GPCIN1		(IRQ_BOARD_END + 11)
+#define IRQ_GPCIN2		(IRQ_BOARD_END + 12)
+#define IRQ_GPCIN3		(IRQ_BOARD_END + 13)
+#define IRQ_GPCIN4		(IRQ_BOARD_END + 14)
+#define IRQ_GPCIN5		(IRQ_BOARD_END + 15)
+#define IRQ_GPCIN6		(IRQ_BOARD_END + 16)
+#define IRQ_GPCIN7		(IRQ_BOARD_END + 17)
+#define IRQ_MSTXINT		(IRQ_BOARD_END + 18)
+#define IRQ_MSRXINT		(IRQ_BOARD_END + 19)
+#define IRQ_MSSTOPERRINT	(IRQ_BOARD_END + 20)
+#define IRQ_TPTXINT		(IRQ_BOARD_END + 21)
+#define IRQ_TPRXINT		(IRQ_BOARD_END + 22)
+#define IRQ_TPSTOPERRINT	(IRQ_BOARD_END + 23)
+#define SSPXMTINT		(IRQ_BOARD_END + 24)
+#define SSPRCVINT		(IRQ_BOARD_END + 25)
+#define SSPROR			(IRQ_BOARD_END + 26)
+#define AUDXMTDMADONEA		(IRQ_BOARD_END + 32)
+#define AUDRCVDMADONEA		(IRQ_BOARD_END + 33)
+#define AUDXMTDMADONEB		(IRQ_BOARD_END + 34)
+#define AUDRCVDMADONEB		(IRQ_BOARD_END + 35)
+#define AUDTFSR			(IRQ_BOARD_END + 36)
+#define AUDRFSR			(IRQ_BOARD_END + 37)
+#define AUDTUR			(IRQ_BOARD_END + 38)
+#define AUDROR			(IRQ_BOARD_END + 39)
+#define AUDDTS			(IRQ_BOARD_END + 40)
+#define AUDRDD			(IRQ_BOARD_END + 41)
+#define AUDSTO			(IRQ_BOARD_END + 42)
+#define IRQ_USBPWR		(IRQ_BOARD_END + 43)
+#define IRQ_HCIM		(IRQ_BOARD_END + 44)
+#define IRQ_HCIBUFFACC		(IRQ_BOARD_END + 45)
+#define IRQ_HCIRMTWKP		(IRQ_BOARD_END + 46)
+#define IRQ_NHCIMFCIR		(IRQ_BOARD_END + 47)
+#define IRQ_USB_PORT_RESUME	(IRQ_BOARD_END + 48)
+#define IRQ_S0_READY_NINT	(IRQ_BOARD_END + 49)
+#define IRQ_S1_READY_NINT	(IRQ_BOARD_END + 50)
+#define IRQ_S0_CD_VALID		(IRQ_BOARD_END + 51)
+#define IRQ_S1_CD_VALID		(IRQ_BOARD_END + 52)
+#define IRQ_S0_BVD1_STSCHG	(IRQ_BOARD_END + 53)
+#define IRQ_S1_BVD1_STSCHG	(IRQ_BOARD_END + 54)
 
-#if defined(CONFIG_ARCH_LUBBOCK) || defined(CONFIG_ARCH_PXA_IDP)
-#if CONFIG_SA1111
-#define LUBBOCK_IRQ(x)	(SA1111_IRQ_MAX + 1 + (x))
+/*
+ * Figure out the MAX IRQ number.
+ *
+ * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
+ * Otherwise, we have the standard IRQs only.
+ */
+#ifdef CONFIG_SA1111
+#define NR_IRQS			(IRQ_S1_BVD1_STSCHG + 1)
+#elif defined(CONFIG_ARCH_LUBBOCK)
+#define NR_IRQS			(IRQ_BOARD_END)
 #else
-#define LUBBOCK_IRQ(x)	(IRQ_GPIO(80) + 1 + (x))
+#define NR_IRQS			(IRQ_BOARD_START)
 #endif
 
+/*
+ * Board specific IRQs.  Define them here.
+ * Do not surround them with ifdefs.
+ */
+#define LUBBOCK_IRQ(x)		(IRQ_BOARD_START + (x))
 #define LUBBOCK_SD_IRQ		LUBBOCK_IRQ(0)
 #define LUBBOCK_SA1111_IRQ	LUBBOCK_IRQ(1)
 #define LUBBOCK_USB_IRQ		LUBBOCK_IRQ(2)
@@ -123,10 +131,3 @@
 #define LUBBOCK_UCB1400_IRQ	LUBBOCK_IRQ(4)
 #define LUBBOCK_BB_IRQ		LUBBOCK_IRQ(5)
 
-#undef NR_IRQS
-#define NR_IRQS		(LUBBOCK_IRQ(5) + 1)
-
-#endif	// CONFIG_ARCH_LUBBOCK
-
-
-

include/asm-arm/arch-pxa/lubbock.h

@@ -13,7 +13,6 @@
 #define LUBBOCK_FPGA_PHYS	PXA_CS2_PHYS
 #define LUBBOCK_FPGA_VIRT	(0xf0000000)	/* phys 0x08000000 */
 #define LUBBOCK_ETH_BASE	(0xf1000000)	/* phys 0x0c000000 */
-#define LUBBOCK_SA1111_BASE	(0xf4000000)	/* phys 0x10000000 */
 
 #define LUB_P2V(x)		((x) - LUBBOCK_FPGA_PHYS + LUBBOCK_FPGA_VIRT)
 #define LUB_V2P(x)		((x) - LUBBOCK_FPGA_VIRT + LUBBOCK_FPGA_PHYS)

include/asm-arm/arch-pxa/system.h

@@ -27,7 +27,7 @@ static inline void arch_reset(char mode)
 		/* Initialize the watchdog and let it fire */
 		OWER = OWER_WME;
 		OSSR = OSSR_M3;
-		OSMR3 = OSCR + 36864;	/* ... in 10 ms */
+		OSMR3 = OSCR + 368640;	/* ... in 100 ms */
 	}
 }
 

include/asm-arm/arch-pxa/time.h

@@ -42,7 +42,7 @@ static unsigned long pxa_gettimeoffset (void)
 	elapsed = LATCH - ticks_to_match;
 
 	/* Now convert them to usec */
-	usec = (unsigned long)(elapsed*tick)/LATCH;
+	usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
 
 	return usec;
 }
@@ -52,6 +52,8 @@ static void pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 	long flags;
 	int next_match;
 
+	do_profile(regs);
+
 	/* Loop until we get ahead of the free running timer.
 	 * This ensures an exact clock tick count and time accuracy.
 	 * IRQs are disabled inside the loop to ensure coherence between