Commit 2c2a68b8 authored by Linus Torvalds's avatar Linus Torvalds

Merge master.kernel.org:/home/rmk/linux-2.6-serial

parents c94c0d20 056a8763
...@@ -561,7 +561,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y ...@@ -561,7 +561,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
# #
CONFIG_SERIAL_S3C2410=y CONFIG_SERIAL_S3C2410=y
CONFIG_SERIAL_S3C2410_CONSOLE=y CONFIG_SERIAL_S3C2410_CONSOLE=y
CONFIG_SERIAL_BAST_SIO=y
CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTYS=y
......
...@@ -570,7 +570,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y ...@@ -570,7 +570,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
# #
CONFIG_SERIAL_S3C2410=y CONFIG_SERIAL_S3C2410=y
CONFIG_SERIAL_S3C2410_CONSOLE=y CONFIG_SERIAL_S3C2410_CONSOLE=y
CONFIG_SERIAL_BAST_SIO=y
CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTYS=y
......
...@@ -28,6 +28,7 @@ ...@@ -28,6 +28,7 @@
* 14-Mar-2006 BJD Updated for __iomem changes * 14-Mar-2006 BJD Updated for __iomem changes
* 22-Jun-2006 BJD Added DM9000 platform information * 22-Jun-2006 BJD Added DM9000 platform information
* 28-Jun-2006 BJD Moved pm functionality out to common code * 28-Jun-2006 BJD Moved pm functionality out to common code
* 17-Jul-2006 BJD Changed to platform device for SuperIO 16550s
*/ */
#include <linux/kernel.h> #include <linux/kernel.h>
...@@ -64,6 +65,8 @@ ...@@ -64,6 +65,8 @@
#include <linux/mtd/nand_ecc.h> #include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h> #include <linux/mtd/partitions.h>
#include <linux/serial_8250.h>
#include "clock.h" #include "clock.h"
#include "devs.h" #include "devs.h"
#include "cpu.h" #include "cpu.h"
...@@ -351,6 +354,39 @@ static struct platform_device bast_device_dm9k = { ...@@ -351,6 +354,39 @@ static struct platform_device bast_device_dm9k = {
} }
}; };
/* serial devices */
#define SERIAL_BASE (S3C2410_CS2 + BAST_PA_SUPERIO)
#define SERIAL_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SHARE_IRQ)
#define SERIAL_CLK (1843200)
static struct plat_serial8250_port bast_sio_data[] = {
[0] = {
.mapbase = SERIAL_BASE + 0x2f8,
.irq = IRQ_PCSERIAL1,
.flags = SERIAL_FLAGS,
.iotype = UPIO_MEM,
.regshift = 0,
.uartclk = SERIAL_CLK,
},
[1] = {
.mapbase = SERIAL_BASE + 0x3f8,
.irq = IRQ_PCSERIAL2,
.flags = SERIAL_FLAGS,
.iotype = UPIO_MEM,
.regshift = 0,
.uartclk = SERIAL_CLK,
},
{ }
};
static struct platform_device bast_sio = {
.name = "serial8250",
.id = 0,
.dev = {
.platform_data = &bast_sio_data,
},
};
/* Standard BAST devices */ /* Standard BAST devices */
...@@ -364,6 +400,7 @@ static struct platform_device *bast_devices[] __initdata = { ...@@ -364,6 +400,7 @@ static struct platform_device *bast_devices[] __initdata = {
&s3c_device_nand, &s3c_device_nand,
&bast_device_nor, &bast_device_nor,
&bast_device_dm9k, &bast_device_dm9k,
&bast_sio,
}; };
static struct clk *bast_clocks[] = { static struct clk *bast_clocks[] = {
......
...@@ -389,6 +389,9 @@ static void __devexit sbs_exit(struct pci_dev *dev) ...@@ -389,6 +389,9 @@ static void __devexit sbs_exit(struct pci_dev *dev)
* - 10x cards have control registers in IO and/or memory space; * - 10x cards have control registers in IO and/or memory space;
* - 20x cards have control registers in standard PCI configuration space. * - 20x cards have control registers in standard PCI configuration space.
* *
* There are also Quartet Serial cards which use Oxford Semiconductor
* 16954 quad UART PCI chip clocked by 18.432 MHz quartz.
*
* Note: some SIIG cards are probed by the parport_serial object. * Note: some SIIG cards are probed by the parport_serial object.
*/ */
...@@ -1026,6 +1029,8 @@ enum pci_board_num_t { ...@@ -1026,6 +1029,8 @@ enum pci_board_num_t {
pbn_b0_2_921600, pbn_b0_2_921600,
pbn_b0_4_921600, pbn_b0_4_921600,
pbn_b0_4_1152000,
pbn_b0_bt_1_115200, pbn_b0_bt_1_115200,
pbn_b0_bt_2_115200, pbn_b0_bt_2_115200,
pbn_b0_bt_8_115200, pbn_b0_bt_8_115200,
...@@ -1158,6 +1163,12 @@ static struct pci_board pci_boards[] __devinitdata = { ...@@ -1158,6 +1163,12 @@ static struct pci_board pci_boards[] __devinitdata = {
.base_baud = 921600, .base_baud = 921600,
.uart_offset = 8, .uart_offset = 8,
}, },
[pbn_b0_4_1152000] = {
.flags = FL_BASE0,
.num_ports = 4,
.base_baud = 1152000,
.uart_offset = 8,
},
[pbn_b0_bt_1_115200] = { [pbn_b0_bt_1_115200] = {
.flags = FL_BASE0|FL_BASE_BARS, .flags = FL_BASE0|FL_BASE_BARS,
...@@ -1755,33 +1766,30 @@ pciserial_init_one(struct pci_dev *dev, const struct pci_device_id *ent) ...@@ -1755,33 +1766,30 @@ pciserial_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
static void __devexit pciserial_remove_one(struct pci_dev *dev) static void __devexit pciserial_remove_one(struct pci_dev *dev)
{ {
struct serial_private *priv = pci_get_drvdata(dev); struct serial_private *priv = pci_get_drvdata(dev);
struct pci_serial_quirk *quirk;
int i;
pci_set_drvdata(dev, NULL); pci_set_drvdata(dev, NULL);
if (priv) { for (i = 0; i < priv->nr; i++)
struct pci_serial_quirk *quirk; serial8250_unregister_port(priv->line[i]);
int i;
for (i = 0; i < priv->nr; i++)
serial8250_unregister_port(priv->line[i]);
for (i = 0; i < PCI_NUM_BAR_RESOURCES; i++) { for (i = 0; i < PCI_NUM_BAR_RESOURCES; i++) {
if (priv->remapped_bar[i]) if (priv->remapped_bar[i])
iounmap(priv->remapped_bar[i]); iounmap(priv->remapped_bar[i]);
priv->remapped_bar[i] = NULL; priv->remapped_bar[i] = NULL;
} }
/* /*
* Find the exit quirks. * Find the exit quirks.
*/ */
quirk = find_quirk(dev); quirk = find_quirk(dev);
if (quirk->exit) if (quirk->exit)
quirk->exit(dev); quirk->exit(dev);
pci_disable_device(dev); pci_disable_device(dev);
kfree(priv); kfree(priv);
}
} }
static int pciserial_suspend_one(struct pci_dev *dev, pm_message_t state) static int pciserial_suspend_one(struct pci_dev *dev, pm_message_t state)
...@@ -1977,6 +1985,9 @@ static struct pci_device_id serial_pci_tbl[] = { ...@@ -1977,6 +1985,9 @@ static struct pci_device_id serial_pci_tbl[] = {
{ PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_OXSEMI_16PCI954, { PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_OXSEMI_16PCI954,
PCI_VENDOR_ID_SPECIALIX, PCI_SUBDEVICE_ID_SPECIALIX_SPEED4, 0, 0, PCI_VENDOR_ID_SPECIALIX, PCI_SUBDEVICE_ID_SPECIALIX_SPEED4, 0, 0,
pbn_b0_4_921600 }, pbn_b0_4_921600 },
{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
PCI_SUBVENDOR_ID_SIIG, PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL, 0, 0,
pbn_b0_4_1152000 },
{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954, { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_4_115200 }, pbn_b0_4_115200 },
......
...@@ -306,13 +306,6 @@ config SERIAL_S3C2410_CONSOLE ...@@ -306,13 +306,6 @@ config SERIAL_S3C2410_CONSOLE
your boot loader about how to pass options to the kernel at your boot loader about how to pass options to the kernel at
boot time.) boot time.)
config SERIAL_BAST_SIO
bool "Support for BAST SuperIO serial ports"
depends on ARCH_BAST && SERIAL_8250=y
help
Support for registerin the SuperIO chip on BAST board with
the 8250/16550 uart code.
config SERIAL_DZ config SERIAL_DZ
bool "DECstation DZ serial driver" bool "DECstation DZ serial driver"
depends on MACH_DECSTATION && MIPS32 depends on MACH_DECSTATION && MIPS32
......
...@@ -44,7 +44,6 @@ obj-$(CONFIG_SERIAL_LH7A40X) += serial_lh7a40x.o ...@@ -44,7 +44,6 @@ obj-$(CONFIG_SERIAL_LH7A40X) += serial_lh7a40x.o
obj-$(CONFIG_SERIAL_AU1X00) += au1x00_uart.o obj-$(CONFIG_SERIAL_AU1X00) += au1x00_uart.o
obj-$(CONFIG_SERIAL_DZ) += dz.o obj-$(CONFIG_SERIAL_DZ) += dz.o
obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o
obj-$(CONFIG_SERIAL_BAST_SIO) += bast_sio.o
obj-$(CONFIG_SERIAL_SGI_L1_CONSOLE) += sn_console.o obj-$(CONFIG_SERIAL_SGI_L1_CONSOLE) += sn_console.o
obj-$(CONFIG_SERIAL_CPM) += cpm_uart/ obj-$(CONFIG_SERIAL_CPM) += cpm_uart/
obj-$(CONFIG_SERIAL_IMX) += imx.o obj-$(CONFIG_SERIAL_IMX) += imx.o
......
/* linux/drivers/serial/bast_sio.c
*
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* http://www.simtec.co.uk/products/EB2410ITX/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 23-Sep-2004 BJD Added copyright header
* 23-Sep-2004 BJD Added serial port remove code
*/
#include <linux/module.h>
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
#include <linux/types.h>
#include <asm/io.h>
#include <asm/serial.h>
#include <asm/mach-types.h>
#include <asm/arch/map.h>
#include <asm/arch/irqs.h>
#include <asm/arch/bast-map.h>
#include <asm/arch/bast-irq.h>
static int __init serial_bast_register(unsigned long port, unsigned int irq)
{
struct serial_struct serial_req;
serial_req.flags = UPF_AUTOPROBE | UPF_SHARE_IRQ;
serial_req.baud_base = BASE_BAUD;
serial_req.irq = irq;
serial_req.io_type = UPIO_MEM;
serial_req.iomap_base = port;
serial_req.iomem_base = ioremap(port, 0x10);
serial_req.iomem_reg_shift = 0;
return register_serial(&serial_req);
}
#define SERIAL_BASE (S3C2410_CS2 + BAST_PA_SUPERIO)
static int port[2] = { -1, -1 };
static int __init serial_bast_init(void)
{
if (machine_is_bast()) {
port[0] = serial_bast_register(SERIAL_BASE + 0x2f8, IRQ_PCSERIAL1);
port[1] = serial_bast_register(SERIAL_BASE + 0x3f8, IRQ_PCSERIAL2);
}
return 0;
}
static void __exit serial_bast_exit(void)
{
if (port[0] != -1)
unregister_serial(port[0]);
if (port[1] != -1)
unregister_serial(port[1]);
}
module_init(serial_bast_init);
module_exit(serial_bast_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Ben Dooks, ben@simtec.co.uk");
MODULE_DESCRIPTION("BAST Onboard Serial setup");
...@@ -1872,6 +1872,7 @@ ...@@ -1872,6 +1872,7 @@
#define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001 #define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
#define PCI_VENDOR_ID_SIIG 0x131f #define PCI_VENDOR_ID_SIIG 0x131f
#define PCI_SUBVENDOR_ID_SIIG 0x131f
#define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000 #define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000
#define PCI_DEVICE_ID_SIIG_1S_10x_650 0x1001 #define PCI_DEVICE_ID_SIIG_1S_10x_650 0x1001
#define PCI_DEVICE_ID_SIIG_1S_10x_850 0x1002 #define PCI_DEVICE_ID_SIIG_1S_10x_850 0x1002
...@@ -1909,6 +1910,7 @@ ...@@ -1909,6 +1910,7 @@
#define PCI_DEVICE_ID_SIIG_2S1P_20x_550 0x2060 #define PCI_DEVICE_ID_SIIG_2S1P_20x_550 0x2060
#define PCI_DEVICE_ID_SIIG_2S1P_20x_650 0x2061 #define PCI_DEVICE_ID_SIIG_2S1P_20x_650 0x2061
#define PCI_DEVICE_ID_SIIG_2S1P_20x_850 0x2062 #define PCI_DEVICE_ID_SIIG_2S1P_20x_850 0x2062
#define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050
#define PCI_VENDOR_ID_RADISYS 0x1331 #define PCI_VENDOR_ID_RADISYS 0x1331
#define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030 #define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030
......
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