Commit 2d98cae6 authored by Chandrakala Chavva's avatar Chandrakala Chavva Committed by Ralf Baechle

MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register

Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register,
its a 64-bit wide.
Signed-off-by: default avatarChandrakala Chavva <cchavva@caviumnetworks.com>
Signed-off-by: default avatarAleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/8936/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 6b3a287e
......@@ -80,7 +80,7 @@
1:
#if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
/* Check if we need to store CVMSEG state */
mfc0 t0, $11,7 /* CvmMemCtl */
dmfc0 t0, $11,7 /* CvmMemCtl */
bbit0 t0, 6, 3f /* Is user access enabled? */
/* Store the CVMSEG state */
......@@ -104,9 +104,9 @@
.set reorder
/* Disable access to CVMSEG */
mfc0 t0, $11,7 /* CvmMemCtl */
dmfc0 t0, $11,7 /* CvmMemCtl */
xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */
mtc0 t0, $11,7 /* CvmMemCtl */
dmtc0 t0, $11,7 /* CvmMemCtl */
#endif
3:
......
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