Commit 3011d314 authored by Xu Yilun's avatar Xu Yilun Committed by Mark Brown

spi: altera: add 32bit data width transfer support.

Add support for 32bit width data register, then it supports 32bit
data width spi slave device and spi transfers.
Signed-off-by: default avatarXu Yilun <yilun.xu@intel.com>
Signed-off-by: default avatarWu Hao <hao.wu@intel.com>
Signed-off-by: default avatarMatthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: default avatarRuss Weight <russell.h.weight@intel.com>
Reviewed-by: default avatarTom Rix <trix@redhat.com>
Link: https://lore.kernel.org/r/1591845911-10197-2-git-send-email-yilun.xu@intel.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 064e8af7
......@@ -86,6 +86,13 @@ static void altera_spi_tx_word(struct altera_spi *hw)
txd = (hw->tx[hw->count * 2]
| (hw->tx[hw->count * 2 + 1] << 8));
break;
case 4:
txd = (hw->tx[hw->count * 4]
| (hw->tx[hw->count * 4 + 1] << 8)
| (hw->tx[hw->count * 4 + 2] << 16)
| (hw->tx[hw->count * 4 + 3] << 24));
break;
}
}
......@@ -106,6 +113,13 @@ static void altera_spi_rx_word(struct altera_spi *hw)
hw->rx[hw->count * 2] = rxd;
hw->rx[hw->count * 2 + 1] = rxd >> 8;
break;
case 4:
hw->rx[hw->count * 4] = rxd;
hw->rx[hw->count * 4 + 1] = rxd >> 8;
hw->rx[hw->count * 4 + 2] = rxd >> 16;
hw->rx[hw->count * 4 + 3] = rxd >> 24;
break;
}
}
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment