Commit 31f75462 authored by Brian Norris's avatar Brian Norris

mtd: use __packed shorthand

Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent 1001ff7a
......@@ -145,7 +145,7 @@ struct mtdswap_dev {
struct mtdswap_oobdata {
__le16 magic;
__le32 count;
} __attribute__((packed));
} __packed;
#define MTDSWAP_MAGIC_CLEAN 0x2095
#define MTDSWAP_MAGIC_DIRTY (MTDSWAP_MAGIC_CLEAN + 1)
......
......@@ -18,7 +18,7 @@ struct sm_oob {
uint8_t ecc2[3];
uint8_t lba_copy2[2];
uint8_t ecc1[3];
} __attribute__((packed));
} __packed;
/* one sector is always 512 bytes, but it can consist of two nand pages */
......
......@@ -153,7 +153,7 @@ struct cfi_ident {
uint16_t MaxBufWriteSize;
uint8_t NumEraseRegions;
uint32_t EraseRegionInfo[0]; /* Not host ordered */
} __attribute__((packed));
} __packed;
/* Extended Query Structure for both PRI and ALT */
......@@ -161,7 +161,7 @@ struct cfi_extquery {
uint8_t pri[3];
uint8_t MajorVersion;
uint8_t MinorVersion;
} __attribute__((packed));
} __packed;
/* Vendor-Specific PRI for Intel/Sharp Extended Command Set (0x0001) */
......@@ -180,7 +180,7 @@ struct cfi_pri_intelext {
uint8_t FactProtRegSize;
uint8_t UserProtRegSize;
uint8_t extra[0];
} __attribute__((packed));
} __packed;
struct cfi_intelext_otpinfo {
uint32_t ProtRegAddr;
......@@ -188,7 +188,7 @@ struct cfi_intelext_otpinfo {
uint8_t FactProtRegSize;
uint16_t UserGroups;
uint8_t UserProtRegSize;
} __attribute__((packed));
} __packed;
struct cfi_intelext_blockinfo {
uint16_t NumIdentBlocks;
......@@ -196,7 +196,7 @@ struct cfi_intelext_blockinfo {
uint16_t MinBlockEraseCycles;
uint8_t BitsPerCell;
uint8_t BlockCap;
} __attribute__((packed));
} __packed;
struct cfi_intelext_regioninfo {
uint16_t NumIdentPartitions;
......@@ -205,7 +205,7 @@ struct cfi_intelext_regioninfo {
uint8_t NumOpAllowedSimEraMode;
uint8_t NumBlockTypes;
struct cfi_intelext_blockinfo BlockTypes[1];
} __attribute__((packed));
} __packed;
struct cfi_intelext_programming_regioninfo {
uint8_t ProgRegShift;
......@@ -214,7 +214,7 @@ struct cfi_intelext_programming_regioninfo {
uint8_t Reserved2;
uint8_t ControlInvalid;
uint8_t Reserved3;
} __attribute__((packed));
} __packed;
/* Vendor-Specific PRI for AMD/Fujitsu Extended Command Set (0x0002) */
......@@ -233,7 +233,7 @@ struct cfi_pri_amdstd {
uint8_t VppMin;
uint8_t VppMax;
uint8_t TopBottom;
} __attribute__((packed));
} __packed;
/* Vendor-Specific PRI for Atmel chips (command set 0x0002) */
......@@ -245,18 +245,18 @@ struct cfi_pri_atmel {
uint8_t BottomBoot;
uint8_t BurstMode;
uint8_t PageMode;
} __attribute__((packed));
} __packed;
struct cfi_pri_query {
uint8_t NumFields;
uint32_t ProtField[1]; /* Not host ordered */
} __attribute__((packed));
} __packed;
struct cfi_bri_query {
uint8_t PageModeReadCap;
uint8_t NumFields;
uint32_t ConfField[1]; /* Not host ordered */
} __attribute__((packed));
} __packed;
#define P_ID_NONE 0x0000
#define P_ID_INTEL_EXT 0x0001
......
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