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nexedi
linux
Commits
3248a112
Commit
3248a112
authored
Jan 14, 2003
by
Dave Jones
Browse files
Options
Browse Files
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Plain Diff
Merge tetrachloride.(none):/mnt/stuff/kernel/2.5/bk-linus
into tetrachloride.(none):/mnt/stuff/kernel/2.5/agpgart
parents
9552d6bc
ae98526a
Changes
12
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Side-by-side
Showing
12 changed files
with
113 additions
and
249 deletions
+113
-249
drivers/char/agp/ali-agp.c
drivers/char/agp/ali-agp.c
+1
-1
drivers/char/agp/amd-k7-agp.c
drivers/char/agp/amd-k7-agp.c
+4
-1
drivers/char/agp/amd-k8-agp.c
drivers/char/agp/amd-k8-agp.c
+5
-69
drivers/char/agp/backend.c
drivers/char/agp/backend.c
+2
-0
drivers/char/agp/frontend.c
drivers/char/agp/frontend.c
+3
-1
drivers/char/agp/generic.c
drivers/char/agp/generic.c
+83
-70
drivers/char/agp/i7x05-agp.c
drivers/char/agp/i7x05-agp.c
+1
-1
drivers/char/agp/intel-agp.c
drivers/char/agp/intel-agp.c
+1
-1
drivers/char/agp/sis-agp.c
drivers/char/agp/sis-agp.c
+1
-1
drivers/char/agp/sworks-agp.c
drivers/char/agp/sworks-agp.c
+10
-102
drivers/char/agp/via-agp.c
drivers/char/agp/via-agp.c
+1
-1
drivers/char/agp/via-kt400.c
drivers/char/agp/via-kt400.c
+1
-1
No files found.
drivers/char/agp/ali-agp.c
View file @
3248a112
...
...
@@ -350,7 +350,7 @@ static int __init agp_ali_probe (struct pci_dev *dev, const struct pci_device_id
agp_bridge
.
dev
=
dev
;
agp_bridge
.
capndx
=
cap_ptr
;
/* Fill in the mode register */
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
4
,
&
agp_bridge
.
mode
);
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
agp_bridge
.
mode
);
agp_register_driver
(
dev
);
return
0
;
}
...
...
drivers/char/agp/amd-k7-agp.c
View file @
3248a112
...
...
@@ -6,6 +6,9 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/agp_backend.h>
#include <linux/gfp.h>
#include <linux/page-flags.h>
#include <linux/mm.h>
#include "agp.h"
static
int
agp_try_unsupported
__initdata
=
0
;
...
...
@@ -451,7 +454,7 @@ static int __init agp_amdk7_probe (struct pci_dev *dev, const struct pci_device_
agp_bridge
.
dev
=
dev
;
agp_bridge
.
capndx
=
cap_ptr
;
/* Fill in the mode register */
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
4
,
&
agp_bridge
.
mode
);
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
agp_bridge
.
mode
);
agp_register_driver
(
dev
);
return
0
;
}
...
...
drivers/char/agp/amd-k8-agp.c
View file @
3248a112
...
...
@@ -336,7 +336,6 @@ static void agp_x86_64_agp_enable(u32 mode)
struct
pci_dev
*
device
=
NULL
;
u32
command
,
scratch
;
u8
cap_ptr
;
u8
agp_v3
;
u8
v3_devs
=
0
;
/* FIXME: If 'mode' is x1/x2/x4 should we call the AGPv2 routines directly ?
...
...
@@ -369,77 +368,14 @@ static void agp_x86_64_agp_enable(u32 mode)
}
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
4
,
&
command
);
/*
* PASS2: go through all devices that claim to be
* AGP devices and collect their data.
*/
pci_for_each_dev
(
device
)
{
cap_ptr
=
pci_find_capability
(
device
,
PCI_CAP_ID_AGP
);
if
(
cap_ptr
!=
0x00
)
{
/*
* Ok, here we have a AGP device. Disable impossible
* settings, and adjust the readqueue to the minimum.
*/
printk
(
KERN_INFO
"AGP: Setting up AGPv3 capable device at %d:%d:%d
\n
"
,
device
->
bus
->
number
,
PCI_FUNC
(
device
->
devfn
),
PCI_SLOT
(
device
->
devfn
));
pci_read_config_dword
(
device
,
cap_ptr
+
4
,
&
scratch
);
agp_v3
=
(
scratch
&
(
1
<<
3
)
)
>>
3
;
/* adjust RQ depth */
command
=
((
command
&
~
0xff000000
)
|
min_t
(
u32
,
(
mode
&
0xff000000
),
min_t
(
u32
,
(
command
&
0xff000000
),
(
scratch
&
0xff000000
))));
/* disable SBA if it's not supported */
if
(
!
((
command
&
0x200
)
&&
(
scratch
&
0x200
)
&&
(
mode
&
0x200
)))
command
&=
~
0x200
;
/* disable FW if it's not supported */
if
(
!
((
command
&
0x10
)
&&
(
scratch
&
0x10
)
&&
(
mode
&
0x10
)))
command
&=
~
0x10
;
if
(
!
((
command
&
2
)
&&
(
scratch
&
2
)
&&
(
mode
&
2
)))
{
command
&=
~
2
;
/* 8x */
printk
(
KERN_INFO
"AGP: Putting device into 8x mode
\n
"
);
}
if
(
!
((
command
&
1
)
&&
(
scratch
&
1
)
&&
(
mode
&
1
)))
{
command
&=
~
1
;
/* 4x */
printk
(
KERN_INFO
"AGP: Putting device into 4x mode
\n
"
);
}
}
}
/*
* PASS3: Figure out the 8X/4X setting and enable the
* target (our motherboard chipset).
*/
if
(
command
&
2
)
command
&=
~
5
;
/* 8X */
if
(
command
&
1
)
command
&=
~
6
;
/* 4X */
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
command
);
command
=
agp_collect_device_status
(
mode
,
command
);
command
|=
0x100
;
pci_write_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
8
,
command
);
pci_write_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_COMMAND
,
command
);
/*
* PASS4: Go through all AGP devices and update the
* command registers.
*/
pci_for_each_dev
(
device
)
{
cap_ptr
=
pci_find_capability
(
device
,
PCI_CAP_ID_AGP
);
if
(
cap_ptr
!=
0x00
)
pci_write_config_dword
(
device
,
cap_ptr
+
8
,
command
);
}
agp_device_command
(
command
,
1
);
}
...
...
@@ -485,7 +421,7 @@ static int __init agp_amdk8_probe (struct pci_dev *dev, const struct pci_device_
agp_bridge
.
capndx
=
cap_ptr
;
/* Fill in the mode register */
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
4
,
&
agp_bridge
.
mode
);
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
agp_bridge
.
mode
);
amd_8151_setup
(
dev
);
agp_register_driver
(
dev
);
return
0
;
...
...
drivers/char/agp/backend.c
View file @
3248a112
...
...
@@ -34,6 +34,8 @@
#include <linux/miscdevice.h>
#include <linux/pm.h>
#include <linux/agp_backend.h>
#include <linux/vmalloc.h>
#include <asm/io.h>
#include "agp.h"
/* Due to XFree86 brain-damage, we can't go to 1.0 until they
...
...
drivers/char/agp/frontend.c
View file @
3248a112
...
...
@@ -34,8 +34,10 @@
#include <linux/miscdevice.h>
#include <linux/agp_backend.h>
#include <linux/agpgart.h>
#include <linux/slab.h>
#include <linux/mm.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
#include "agp.h"
static
struct
agp_front_data
agp_fe
;
...
...
drivers/char/agp/generic.c
View file @
3248a112
...
...
@@ -313,95 +313,108 @@ int agp_unbind_memory(agp_memory * curr)
/* Generic Agp routines - Start */
void
agp_generic_agp_enable
(
u32
mode
)
{
struct
pci_dev
*
device
=
NULL
;
u32
command
,
scratch
;
u8
cap_ptr
;
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
4
,
&
command
);
/*
* PASS1: go through all devices that claim to be
* AGP devices and collect their data.
*/
u32
agp_collect_device_status
(
u32
mode
,
u32
command
)
{
struct
pci_dev
*
device
;
u8
agp
;
u32
scratch
;
pci_for_each_dev
(
device
)
{
cap_ptr
=
pci_find_capability
(
device
,
PCI_CAP_ID_AGP
);
if
(
cap_ptr
!=
0x00
)
{
/*
* Ok, here we have a AGP device. Disable impossible
* settings, and adjust the readqueue to the minimum.
*/
pci_read_config_dword
(
device
,
cap_ptr
+
4
,
&
scratch
);
/* adjust RQ depth */
command
=
((
command
&
~
0xff000000
)
|
min_t
(
u32
,
(
mode
&
0xff000000
),
min_t
(
u32
,
(
command
&
0xff000000
),
(
scratch
&
0xff000000
))));
/* disable SBA if it's not supported */
if
(
!
((
command
&
0x00000200
)
&&
(
scratch
&
0x00000200
)
&&
(
mode
&
0x00000200
)))
command
&=
~
0x00000200
;
/* disable FW if it's not supported */
if
(
!
((
command
&
0x00000010
)
&&
(
scratch
&
0x00000010
)
&&
(
mode
&
0x00000010
)))
command
&=
~
0x00000010
;
if
(
!
((
command
&
4
)
&&
(
scratch
&
4
)
&&
(
mode
&
4
)))
command
&=
~
0x00000004
;
if
(
!
((
command
&
2
)
&&
(
scratch
&
2
)
&&
(
mode
&
2
)))
command
&=
~
0x00000002
;
if
(
!
((
command
&
1
)
&&
(
scratch
&
1
)
&&
(
mode
&
1
)))
command
&=
~
0x00000001
;
}
agp
=
pci_find_capability
(
device
,
PCI_CAP_ID_AGP
);
if
(
!
agp
)
continue
;
/*
* Ok, here we have a AGP device. Disable impossible
* settings, and adjust the readqueue to the minimum.
*/
pci_read_config_dword
(
device
,
agp
+
PCI_AGP_STATUS
,
&
scratch
);
/* adjust RQ depth */
command
=
((
command
&
~
0xff000000
)
|
min_t
(
u32
,
(
mode
&
0xff000000
),
min_t
(
u32
,
(
command
&
0xff000000
),
(
scratch
&
0xff000000
))));
/* disable SBA if it's not supported */
if
(
!
((
command
&
0x00000200
)
&&
(
scratch
&
0x00000200
)
&&
(
mode
&
0x00000200
)))
command
&=
~
0x00000200
;
/* disable FW if it's not supported */
if
(
!
((
command
&
0x00000010
)
&&
(
scratch
&
0x00000010
)
&&
(
mode
&
0x00000010
)))
command
&=
~
0x00000010
;
if
(
!
((
command
&
4
)
&&
(
scratch
&
4
)
&&
(
mode
&
4
)))
command
&=
~
0x00000004
;
if
(
!
((
command
&
2
)
&&
(
scratch
&
2
)
&&
(
mode
&
2
)))
command
&=
~
0x00000002
;
if
(
!
((
command
&
1
)
&&
(
scratch
&
1
)
&&
(
mode
&
1
)))
command
&=
~
0x00000001
;
}
/*
* PASS2: Figure out the 4X/2X/1X setting and enable the
* target (our motherboard chipset).
*/
if
(
command
&
4
)
command
&=
~
3
;
/* 4X */
if
(
command
&
2
)
command
&=
~
5
;
/* 2X */
command
&=
~
5
;
/* 2X
(8X for AGP3.0)
*/
if
(
command
&
1
)
command
&=
~
6
;
/* 1X */
command
&=
~
6
;
/* 1X
(4X for AGP3.0)
*/
command
|=
0x00000100
;
return
command
;
}
pci_write_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
8
,
command
);
void
agp_device_command
(
u32
command
,
int
agp_v3
)
{
struct
pci_dev
*
device
;
int
mode
;
/*
* PASS3: Go throu all AGP devices and update the
* command registers.
*/
mode
=
command
&
0x7
;
if
(
agp_v3
)
mode
*=
4
;
pci_for_each_dev
(
device
)
{
cap_ptr
=
pci_find_capability
(
device
,
PCI_CAP_ID_AGP
);
if
(
cap_ptr
!=
0x00
)
pci_write_config_dword
(
device
,
cap_ptr
+
8
,
command
);
u8
agp
=
pci_find_capability
(
device
,
PCI_CAP_ID_AGP
);
if
(
!
agp
)
continue
;
printk
(
KERN_INFO
PFX
"Putting AGP V%d device at %s into %dx mode
\n
"
,
agp_v3
?
3
:
2
,
device
->
slot_name
,
mode
);
pci_write_config_dword
(
device
,
agp
+
PCI_AGP_COMMAND
,
command
);
}
}
void
agp_generic_agp_enable
(
u32
mode
)
{
u32
command
;
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
command
);
command
=
agp_collect_device_status
(
mode
,
command
);
command
|=
0x100
;
pci_write_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_COMMAND
,
command
);
agp_device_command
(
command
,
0
);
}
int
agp_generic_create_gatt_table
(
void
)
{
char
*
table
;
...
...
drivers/char/agp/i7x05-agp.c
View file @
3248a112
...
...
@@ -177,7 +177,7 @@ static int __init agp_i7x05_probe (struct pci_dev *dev, const struct pci_device_
agp_bridge
.
dev
=
dev
;
agp_bridge
.
capndx
=
cap_ptr
;
/* Fill in the mode register */
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
4
,
&
agp_bridge
.
mode
)
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
agp_bridge
.
mode
)
agp_register_driver
(
dev
);
return
0
;
}
...
...
drivers/char/agp/intel-agp.c
View file @
3248a112
...
...
@@ -1423,7 +1423,7 @@ static int __init agp_find_supported_device(struct pci_dev *dev)
agp_bridge
.
capndx
=
cap_ptr
;
/* Fill in the mode register */
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
4
,
&
agp_bridge
.
mode
);
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
agp_bridge
.
mode
);
/* probe for known chipsets */
return
agp_lookup_host_bridge
(
dev
);
...
...
drivers/char/agp/sis-agp.c
View file @
3248a112
...
...
@@ -235,7 +235,7 @@ static int __init agp_sis_probe (struct pci_dev *dev, const struct pci_device_id
agp_bridge
.
dev
=
dev
;
agp_bridge
.
capndx
=
cap_ptr
;
/* Fill in the mode register */
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
4
,
&
agp_bridge
.
mode
);
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
agp_bridge
.
mode
);
agp_register_driver
(
dev
);
return
0
;
}
...
...
drivers/char/agp/sworks-agp.c
View file @
3248a112
...
...
@@ -229,7 +229,6 @@ static int serverworks_configure(void)
struct
aper_size_info_lvl2
*
current_size
;
u32
temp
;
u8
enable_reg
;
u8
cap_ptr
;
u32
cap_id
;
u16
cap_reg
;
...
...
@@ -257,22 +256,11 @@ static int serverworks_configure(void)
SVWRKS_AGP_ENABLE
,
enable_reg
);
agp_bridge
.
tlb_flush
(
NULL
);
pci_read_config_byte
(
serverworks_private
.
svrwrks_dev
,
0x34
,
&
cap_ptr
);
if
(
cap_ptr
!=
0
)
{
do
{
pci_read_config_dword
(
serverworks_private
.
svrwrks_dev
,
cap_ptr
,
&
cap_id
);
if
((
cap_id
&
0xff
)
!=
0x02
)
cap_ptr
=
(
cap_id
>>
8
)
&
0xff
;
}
while
(((
cap_id
&
0xff
)
!=
0x02
)
&&
(
cap_ptr
!=
0
));
}
agp_bridge
.
capndx
=
cap_ptr
;
agp_bridge
.
capndx
=
pci_find_capability
(
serverworks_private
.
svrwrks_dev
,
PCI_CAP_ID_AGP
);
/* Fill in the mode register */
pci_read_config_dword
(
serverworks_private
.
svrwrks_dev
,
agp_bridge
.
capndx
+
4
,
&
agp_bridge
.
mode
);
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
agp_bridge
.
mode
);
pci_read_config_byte
(
agp_bridge
.
dev
,
SVWRKS_CACHING
,
&
enable_reg
);
enable_reg
&=
~
0x3
;
...
...
@@ -413,104 +401,24 @@ static struct aper_size_info_lvl2 serverworks_sizes[7] =
static
void
serverworks_agp_enable
(
u32
mode
)
{
struct
pci_dev
*
device
=
NULL
;
u32
command
,
scratch
,
cap_id
;
u8
cap_ptr
;
u32
command
;
pci_read_config_dword
(
serverworks_private
.
svrwrks_dev
,
agp_bridge
.
capndx
+
4
,
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
command
);
/*
* PASS1: go throu all devices that claim to be
* AGP devices and collect their data.
*/
command
=
agp_collect_device_status
(
mode
,
command
);
command
&=
~
0x10
;
/* disable FW */
command
&=
~
0x08
;
pci_for_each_dev
(
device
)
{
cap_ptr
=
pci_find_capability
(
device
,
PCI_CAP_ID_AGP
);
if
(
cap_ptr
!=
0x00
)
{
do
{
pci_read_config_dword
(
device
,
cap_ptr
,
&
cap_id
);
if
((
cap_id
&
0xff
)
!=
0x02
)
cap_ptr
=
(
cap_id
>>
8
)
&
0xff
;
}
while
(((
cap_id
&
0xff
)
!=
0x02
)
&&
(
cap_ptr
!=
0x00
));
}
if
(
cap_ptr
!=
0x00
)
{
/*
* Ok, here we have a AGP device. Disable impossible
* settings, and adjust the readqueue to the minimum.
*/
pci_read_config_dword
(
device
,
cap_ptr
+
4
,
&
scratch
);
/* adjust RQ depth */
command
=
((
command
&
~
0xff000000
)
|
min_t
(
u32
,
(
mode
&
0xff000000
),
min_t
(
u32
,
(
command
&
0xff000000
),
(
scratch
&
0xff000000
))));
/* disable SBA if it's not supported */
if
(
!
((
command
&
0x00000200
)
&&
(
scratch
&
0x00000200
)
&&
(
mode
&
0x00000200
)))
command
&=
~
0x00000200
;
/* disable FW */
command
&=
~
0x00000010
;
command
&=
~
0x00000008
;
if
(
!
((
command
&
4
)
&&
(
scratch
&
4
)
&&
(
mode
&
4
)))
command
&=
~
0x00000004
;
if
(
!
((
command
&
2
)
&&
(
scratch
&
2
)
&&
(
mode
&
2
)))
command
&=
~
0x00000002
;
if
(
!
((
command
&
1
)
&&
(
scratch
&
1
)
&&
(
mode
&
1
)))
command
&=
~
0x00000001
;
}
}
/*
* PASS2: Figure out the 4X/2X/1X setting and enable the
* target (our motherboard chipset).
*/
if
(
command
&
4
)
{
command
&=
~
3
;
/* 4X */
}
if
(
command
&
2
)
{
command
&=
~
5
;
/* 2X */
}
if
(
command
&
1
)
{
command
&=
~
6
;
/* 1X */
}
command
|=
0x00000100
;
command
|=
0x100
;
pci_write_config_dword
(
serverworks_private
.
svrwrks_dev
,
agp_bridge
.
capndx
+
8
,
agp_bridge
.
capndx
+
PCI_AGP_COMMAND
,
command
);
/*
* PASS3: Go throu all AGP devices and update the
* command registers.
*/
pci_for_each_dev
(
device
)
{
cap_ptr
=
pci_find_capability
(
device
,
PCI_CAP_ID_AGP
);
if
(
cap_ptr
!=
0x00
)
pci_write_config_dword
(
device
,
cap_ptr
+
8
,
command
);
}
agp_device_command
(
command
,
0
);
}
static
int
__init
serverworks_setup
(
struct
pci_dev
*
pdev
)
...
...
drivers/char/agp/via-agp.c
View file @
3248a112
...
...
@@ -258,7 +258,7 @@ static int __init agp_via_probe (struct pci_dev *dev, const struct pci_device_id
agp_bridge
.
dev
=
dev
;
agp_bridge
.
capndx
=
cap_ptr
;
/* Fill in the mode register */
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
4
,
&
agp_bridge
.
mode
);
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
agp_bridge
.
mode
);
agp_register_driver
(
dev
);
return
0
;
}
...
...
drivers/char/agp/via-kt400.c
View file @
3248a112
...
...
@@ -147,7 +147,7 @@ static int __init agp_via_probe (struct pci_dev *dev, const struct pci_device_id
agp_bridge
.
cant_use_aperture
=
0
;
/* Fill in the mode register */
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
4
,
&
agp_bridge
.
mode
);
pci_read_config_dword
(
agp_bridge
.
dev
,
agp_bridge
.
capndx
+
PCI_AGP_STATUS
,
&
agp_bridge
.
mode
);
agp_register_driver
(
dev
);
return
0
;
...
...
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