Commit 343c1cdb authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Robert Jarzmik

ARM: pxa: fix building without IWMMXT

When CONFIG_IWMMXT, the pxa3xx and pxa27x suspend/resume code
emits some xscale specific instructions, which are rejected
by the assembler, because gcc is built with -march=armv5
-mtune=xscale and passes that option to the assembler:

/tmp/cciHumzr.s:553: Error: selected processor does not support ARM mode `mra r2,r3,acc0'
/tmp/cciHumzr.s:605: Error: selected processor does not support ARM mode `mar acc0,r2,r3'
make[3]: *** [arch/arm/mach-pxa/pxa3xx.o] Error 1
/tmp/cci5MUNu.s:326: Error: selected processor does not support ARM mode `mra r2,r3,acc0'
/tmp/cci5MUNu.s:367: Error: selected processor does not support ARM mode `mar acc0,r2,r3'
make[3]: *** [arch/arm/mach-pxa/pxa27x.o] Error 1

Overriding with -Wa,-march=xscale no longer works, so instead
I'm adding an explict ".arch_extension" directive in all four inline
assembly statements, which should work even if they end up in a different
order in the assembly output.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarRobert Jarzmik <robert.jarzmik@free.fr>
parent a9a54cae
...@@ -132,7 +132,8 @@ void pxa27x_cpu_pm_enter(suspend_state_t state) ...@@ -132,7 +132,8 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
#ifndef CONFIG_IWMMXT #ifndef CONFIG_IWMMXT
u64 acc0; u64 acc0;
asm volatile("mra %Q0, %R0, acc0" : "=r" (acc0)); asm volatile(".arch_extension xscale\n\t"
"mra %Q0, %R0, acc0" : "=r" (acc0));
#endif #endif
/* ensure voltage-change sequencer not initiated, which hangs */ /* ensure voltage-change sequencer not initiated, which hangs */
...@@ -151,7 +152,8 @@ void pxa27x_cpu_pm_enter(suspend_state_t state) ...@@ -151,7 +152,8 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
case PM_SUSPEND_MEM: case PM_SUSPEND_MEM:
cpu_suspend(pwrmode, pxa27x_finish_suspend); cpu_suspend(pwrmode, pxa27x_finish_suspend);
#ifndef CONFIG_IWMMXT #ifndef CONFIG_IWMMXT
asm volatile("mar acc0, %Q0, %R0" : "=r" (acc0)); asm volatile(".arch_extension xscale\n\t"
"mar acc0, %Q0, %R0" : "=r" (acc0));
#endif #endif
break; break;
} }
......
...@@ -102,7 +102,8 @@ static void pxa3xx_cpu_pm_suspend(void) ...@@ -102,7 +102,8 @@ static void pxa3xx_cpu_pm_suspend(void)
#ifndef CONFIG_IWMMXT #ifndef CONFIG_IWMMXT
u64 acc0; u64 acc0;
asm volatile("mra %Q0, %R0, acc0" : "=r" (acc0)); asm volatile(".arch_extension xscale\n\t"
"mra %Q0, %R0, acc0" : "=r" (acc0));
#endif #endif
/* resuming from D2 requires the HSIO2/BOOT/TPM clocks enabled */ /* resuming from D2 requires the HSIO2/BOOT/TPM clocks enabled */
...@@ -130,7 +131,8 @@ static void pxa3xx_cpu_pm_suspend(void) ...@@ -130,7 +131,8 @@ static void pxa3xx_cpu_pm_suspend(void)
AD3ER = 0; AD3ER = 0;
#ifndef CONFIG_IWMMXT #ifndef CONFIG_IWMMXT
asm volatile("mar acc0, %Q0, %R0" : "=r" (acc0)); asm volatile(".arch_extension xscale\n\t"
"mar acc0, %Q0, %R0" : "=r" (acc0));
#endif #endif
} }
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment