Commit 363c55ca authored by Wu Zhangjin's avatar Wu Zhangjin Committed by Ralf Baechle

MIPS: Add hibernation support

[Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
support.  As implemented in this patch cache and tlb flushing will also be
invoked with interrupts disabled so smp_call_function() will blow up in
charming ways.  So limit to !SMP.]
Reviewed-by: default avatarPavel Machek <pavel@ucw.cz>
Reviewed-by: default avatarYan Hua <yanh@lemote.com>
Reviewed-by: default avatarArnaud Patard <apatard@mandriva.com>
Reviewed-by: default avatarAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: default avatarWu Zhangjin <wuzj@lemote.com>
Signed-off-by: default avatarHu Hongbing <huhb@lemote.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 4bb1a108
......@@ -2134,6 +2134,10 @@ endmenu
menu "Power management options"
config ARCH_HIBERNATION_POSSIBLE
def_bool y
depends on !SMP
config ARCH_SUSPEND_POSSIBLE
def_bool y
depends on !SMP
......
......@@ -677,6 +677,9 @@ core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
# suspend and hibernation support
drivers-$(CONFIG_PM) += arch/mips/power/
ifdef CONFIG_LASAT
rom.bin rom.sw: vmlinux
$(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
......
#ifndef __ASM_SUSPEND_H
#define __ASM_SUSPEND_H
static inline int arch_prepare_suspend(void) { return 0; }
/* References to section boundaries */
extern const void __nosave_begin, __nosave_end;
#endif /* __ASM_SUSPEND_H */
......@@ -14,6 +14,7 @@
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/kbuild.h>
#include <linux/suspend.h>
#include <asm/ptrace.h>
#include <asm/processor.h>
......@@ -326,3 +327,15 @@ void output_octeon_cop2_state_defines(void)
BLANK();
}
#endif
#ifdef CONFIG_HIBERNATION
void output_pbe_defines(void)
{
COMMENT(" Linux struct pbe offsets. ");
OFFSET(PBE_ADDRESS, pbe, address);
OFFSET(PBE_ORIG_ADDRESS, pbe, orig_address);
OFFSET(PBE_NEXT, pbe, next);
DEFINE(PBE_SIZE, sizeof(struct pbe));
BLANK();
}
#endif
obj-$(CONFIG_HIBERNATION) += cpu.o hibernate.o
/*
* Suspend support specific for mips.
*
* Licensed under the GPLv2
*
* Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
* Author: Hu Hongbing <huhb@lemote.com>
* Wu Zhangjin <wuzj@lemote.com>
*/
#include <asm/suspend.h>
#include <asm/fpu.h>
#include <asm/dsp.h>
static u32 saved_status;
struct pt_regs saved_regs;
void save_processor_state(void)
{
saved_status = read_c0_status();
if (is_fpu_owner())
save_fp(current);
if (cpu_has_dsp)
save_dsp(current);
}
void restore_processor_state(void)
{
write_c0_status(saved_status);
if (is_fpu_owner())
restore_fp(current);
if (cpu_has_dsp)
restore_dsp(current);
}
int pfn_is_nosave(unsigned long pfn)
{
unsigned long nosave_begin_pfn = PFN_DOWN(__pa(&__nosave_begin));
unsigned long nosave_end_pfn = PFN_UP(__pa(&__nosave_end));
return (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
}
/*
* Hibernation support specific for mips - temporary page tables
*
* Licensed under the GPLv2
*
* Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
* Author: Hu Hongbing <huhb@lemote.com>
* Wu Zhangjin <wuzj@lemote.com>
*/
#include <asm/asm-offsets.h>
#include <asm/regdef.h>
#include <asm/asm.h>
.text
LEAF(swsusp_arch_suspend)
PTR_LA t0, saved_regs
PTR_S ra, PT_R31(t0)
PTR_S sp, PT_R29(t0)
PTR_S fp, PT_R30(t0)
PTR_S gp, PT_R28(t0)
PTR_S s0, PT_R16(t0)
PTR_S s1, PT_R17(t0)
PTR_S s2, PT_R18(t0)
PTR_S s3, PT_R19(t0)
PTR_S s4, PT_R20(t0)
PTR_S s5, PT_R21(t0)
PTR_S s6, PT_R22(t0)
PTR_S s7, PT_R23(t0)
j swsusp_save
END(swsusp_arch_suspend)
LEAF(swsusp_arch_resume)
PTR_L t0, restore_pblist
0:
PTR_L t1, PBE_ADDRESS(t0) /* source */
PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */
PTR_ADDIU t3, t1, _PAGE_SIZE
1:
REG_L t8, (t1)
REG_S t8, (t2)
PTR_ADDIU t1, t1, SZREG
PTR_ADDIU t2, t2, SZREG
bne t1, t3, 1b
PTR_L t0, PBE_NEXT(t0)
bnez t0, 0b
/* flush caches to make sure context is in memory */
PTR_L t0, __flush_cache_all
jalr t0
/* flush tlb entries */
#ifdef CONFIG_SMP
jal flush_tlb_all
#else
jal local_flush_tlb_all
#endif
PTR_LA t0, saved_regs
PTR_L ra, PT_R31(t0)
PTR_L sp, PT_R29(t0)
PTR_L fp, PT_R30(t0)
PTR_L gp, PT_R28(t0)
PTR_L s0, PT_R16(t0)
PTR_L s1, PT_R17(t0)
PTR_L s2, PT_R18(t0)
PTR_L s3, PT_R19(t0)
PTR_L s4, PT_R20(t0)
PTR_L s5, PT_R21(t0)
PTR_L s6, PT_R22(t0)
PTR_L s7, PT_R23(t0)
PTR_LI v0, 0x0
jr ra
END(swsusp_arch_resume)
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