Commit 38aecea0 authored by Daniel Vetter's avatar Daniel Vetter

drm/i915: reverse dp link param selection, prefer fast over wide again

... it's this time of the year again. Originally we've frobbed this to
fix up some regressions, but maybe our DP code improved sufficiently
now that we can dare to do again what the spec recommends.

This reverts

commit 2514bc51
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Thu Jun 21 15:13:50 2012 -0700

    drm/i915: prefer wide & slow to fast & narrow in DP configs

I'm pretty sure I'll regret this patch, but otoh I expect we won't
make progress here without poking the devil occasionally.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73694
Cc: peter@colberg.org
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-by: default avatarItai BEN YAACOV <candeb@free.fr>
Tested-by: default avatarDavid En <d.engraf@arcor.de>
Reported-and-Tested-by: default avatarMarcus Bergner <marcusbergner@gmail.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Acked-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 5babf0fc
...@@ -909,8 +909,8 @@ intel_dp_compute_config(struct intel_encoder *encoder, ...@@ -909,8 +909,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock, mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
bpp); bpp);
for (clock = 0; clock <= max_clock; clock++) { for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { for (clock = 0; clock <= max_clock; clock++) {
link_clock = drm_dp_bw_code_to_link_rate(bws[clock]); link_clock = drm_dp_bw_code_to_link_rate(bws[clock]);
link_avail = intel_dp_max_data_rate(link_clock, link_avail = intel_dp_max_data_rate(link_clock,
lane_count); lane_count);
......
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