Commit 3a689dcb authored by Boris Brezillon's avatar Boris Brezillon Committed by Alexandre Belloni

dt-bindings: mtd: atmel-nand: Document the nfc-io bindings

SAMA5 SoCs embed an advanced NAND controller logic to automate READ/WRITE
page accesses. This advanced logic is exposed through a separate I/O mem
range and is thus represented in a different node with its own compatible.

Document the bindings of this nfc-io block.
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
parent 46992a17
...@@ -59,8 +59,22 @@ Required properties: ...@@ -59,8 +59,22 @@ Required properties:
- reg: should contain 2 register ranges. The first one is pointing to the PMECC - reg: should contain 2 register ranges. The first one is pointing to the PMECC
block, and the second one to the PMECC_ERRLOC block. block, and the second one to the PMECC_ERRLOC block.
* SAMA5 NFC I/O bindings:
SAMA5 SoCs embed an advanced NAND controller logic to automate READ/WRITE page
operations. This interface to this logic is placed in a separate I/O range and
should thus have its own DT node.
- compatible: should be "atmel,sama5d3-nfc-io", "syscon".
- reg: should contain the I/O range used to interact with the NFC logic.
Example: Example:
nfc_io: nfc-io@70000000 {
compatible = "atmel,sama5d3-nfc-io", "syscon";
reg = <0x70000000 0x8000000>;
};
pmecc: ecc-engine@ffffc070 { pmecc: ecc-engine@ffffc070 {
compatible = "atmel,at91sam9g45-pmecc"; compatible = "atmel,at91sam9g45-pmecc";
reg = <0xffffc070 0x490>, reg = <0xffffc070 0x490>,
......
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