Commit 402a917a authored by Linus Torvalds's avatar Linus Torvalds

Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 5405/1: ep93xx: remove unused gesbc9312.h header
  [ARM] 5404/1: Fix condition in arm_elf_read_implies_exec() to set READ_IMPLIES_EXEC
  [ARM] omap: fix clock reparenting in omap2_clk_set_parent()
  [ARM] 5403/1: pxa25x_ep_fifo_flush() *ep->reg_udccs always set to 0
  [ARM] 5402/1: fix a case of wrap-around in sanity_check_meminfo()
  [ARM] 5401/1: Orion: fix edge triggered GPIO interrupt support
  [ARM] 5400/1: Add support for inverted rdy_busy pin for Atmel nand device controller
  [ARM] 5391/1: AT91: Enable GPIO clocks earlier
  [ARM] 5390/1: AT91: Watchdog fixes
  [ARM] 5398/1: Add Wan ZongShun to MAINTAINERS for W90P910
  [ARM] omap: fix _omap2_clksel_get_src_field()
  [ARM] omap: fix omap2_divisor_to_clksel() error return value
parents bcf8951f 9dd446f6
...@@ -692,6 +692,13 @@ M: kernel@wantstofly.org ...@@ -692,6 +692,13 @@ M: kernel@wantstofly.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
S: Maintained S: Maintained
ARM/NUVOTON W90X900 ARM ARCHITECTURE
P: Wan ZongShun
M: mcuos.com@gmail.com
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
W: http://www.mcuos.com
S: Maintained
ARPD SUPPORT ARPD SUPPORT
P: Jonathan Layes P: Jonathan Layes
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
......
...@@ -608,7 +608,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y ...@@ -608,7 +608,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y
# Watchdog Device Drivers # Watchdog Device Drivers
# #
# CONFIG_SOFT_WATCHDOG is not set # CONFIG_SOFT_WATCHDOG is not set
CONFIG_AT91SAM9_WATCHDOG=y CONFIG_AT91SAM9X_WATCHDOG=y
# #
# USB-based Watchdog Cards # USB-based Watchdog Cards
......
...@@ -700,7 +700,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y ...@@ -700,7 +700,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y
# Watchdog Device Drivers # Watchdog Device Drivers
# #
# CONFIG_SOFT_WATCHDOG is not set # CONFIG_SOFT_WATCHDOG is not set
CONFIG_AT91SAM9_WATCHDOG=y CONFIG_AT91SAM9X_WATCHDOG=y
# #
# USB-based Watchdog Cards # USB-based Watchdog Cards
......
...@@ -710,7 +710,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y ...@@ -710,7 +710,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y
# Watchdog Device Drivers # Watchdog Device Drivers
# #
# CONFIG_SOFT_WATCHDOG is not set # CONFIG_SOFT_WATCHDOG is not set
CONFIG_AT91SAM9_WATCHDOG=y CONFIG_AT91SAM9X_WATCHDOG=y
# #
# USB-based Watchdog Cards # USB-based Watchdog Cards
......
...@@ -606,7 +606,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y ...@@ -606,7 +606,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y
# Watchdog Device Drivers # Watchdog Device Drivers
# #
# CONFIG_SOFT_WATCHDOG is not set # CONFIG_SOFT_WATCHDOG is not set
CONFIG_AT91SAM9_WATCHDOG=y CONFIG_AT91SAM9X_WATCHDOG=y
# #
# Sonics Silicon Backplane # Sonics Silicon Backplane
......
...@@ -727,7 +727,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y ...@@ -727,7 +727,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y
# Watchdog Device Drivers # Watchdog Device Drivers
# #
# CONFIG_SOFT_WATCHDOG is not set # CONFIG_SOFT_WATCHDOG is not set
# CONFIG_AT91SAM9_WATCHDOG is not set # CONFIG_AT91SAM9X_WATCHDOG is not set
# #
# USB-based Watchdog Cards # USB-based Watchdog Cards
......
...@@ -74,9 +74,9 @@ EXPORT_SYMBOL(elf_set_personality); ...@@ -74,9 +74,9 @@ EXPORT_SYMBOL(elf_set_personality);
*/ */
int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack) int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack)
{ {
if (executable_stack != EXSTACK_ENABLE_X) if (executable_stack != EXSTACK_DISABLE_X)
return 1; return 1;
if (cpu_architecture() <= CPU_ARCH_ARMv6) if (cpu_architecture() < CPU_ARCH_ARMv6)
return 1; return 1;
return 0; return 0;
} }
......
...@@ -697,7 +697,7 @@ static void __init at91_add_device_rtt(void) ...@@ -697,7 +697,7 @@ static void __init at91_add_device_rtt(void)
* Watchdog * Watchdog
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
static struct platform_device at91cap9_wdt_device = { static struct platform_device at91cap9_wdt_device = {
.name = "at91_wdt", .name = "at91_wdt",
.id = -1, .id = -1,
......
...@@ -643,7 +643,7 @@ static void __init at91_add_device_rtt(void) ...@@ -643,7 +643,7 @@ static void __init at91_add_device_rtt(void)
* Watchdog * Watchdog
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
static struct platform_device at91sam9260_wdt_device = { static struct platform_device at91sam9260_wdt_device = {
.name = "at91_wdt", .name = "at91_wdt",
.id = -1, .id = -1,
......
...@@ -621,7 +621,7 @@ static void __init at91_add_device_rtt(void) ...@@ -621,7 +621,7 @@ static void __init at91_add_device_rtt(void)
* Watchdog * Watchdog
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
static struct platform_device at91sam9261_wdt_device = { static struct platform_device at91sam9261_wdt_device = {
.name = "at91_wdt", .name = "at91_wdt",
.id = -1, .id = -1,
......
...@@ -854,7 +854,7 @@ static void __init at91_add_device_rtt(void) ...@@ -854,7 +854,7 @@ static void __init at91_add_device_rtt(void)
* Watchdog * Watchdog
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
static struct platform_device at91sam9263_wdt_device = { static struct platform_device at91sam9263_wdt_device = {
.name = "at91_wdt", .name = "at91_wdt",
.id = -1, .id = -1,
......
...@@ -609,7 +609,7 @@ static void __init at91_add_device_rtt(void) ...@@ -609,7 +609,7 @@ static void __init at91_add_device_rtt(void)
* Watchdog * Watchdog
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
static struct platform_device at91sam9rl_wdt_device = { static struct platform_device at91sam9rl_wdt_device = {
.name = "at91_wdt", .name = "at91_wdt",
.id = -1, .id = -1,
......
...@@ -490,7 +490,8 @@ postcore_initcall(at91_gpio_debugfs_init); ...@@ -490,7 +490,8 @@ postcore_initcall(at91_gpio_debugfs_init);
/*--------------------------------------------------------------------------*/ /*--------------------------------------------------------------------------*/
/* This lock class tells lockdep that GPIO irqs are in a different /*
* This lock class tells lockdep that GPIO irqs are in a different
* category than their parents, so it won't report false recursion. * category than their parents, so it won't report false recursion.
*/ */
static struct lock_class_key gpio_lock_class; static struct lock_class_key gpio_lock_class;
...@@ -509,9 +510,6 @@ void __init at91_gpio_irq_setup(void) ...@@ -509,9 +510,6 @@ void __init at91_gpio_irq_setup(void)
unsigned id = this->id; unsigned id = this->id;
unsigned i; unsigned i;
/* enable PIO controller's clock */
clk_enable(this->clock);
__raw_writel(~0, this->regbase + PIO_IDR); __raw_writel(~0, this->regbase + PIO_IDR);
for (i = 0, pin = this->chipbase; i < 32; i++, pin++) { for (i = 0, pin = this->chipbase; i < 32; i++, pin++) {
...@@ -556,7 +554,14 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks) ...@@ -556,7 +554,14 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
data->chipbase = PIN_BASE + i * 32; data->chipbase = PIN_BASE + i * 32;
data->regbase = data->offset + (void __iomem *)AT91_VA_BASE_SYS; data->regbase = data->offset + (void __iomem *)AT91_VA_BASE_SYS;
/* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ /* enable PIO controller's clock */
clk_enable(data->clock);
/*
* Some processors share peripheral ID between multiple GPIO banks.
* SAM9263 (PIOC, PIOD, PIOE)
* CAP9 (PIOA, PIOB, PIOC, PIOD)
*/
if (last && last->id == data->id) if (last && last->id == data->id)
last->next = data; last->next = data;
} }
......
...@@ -93,6 +93,7 @@ struct atmel_nand_data { ...@@ -93,6 +93,7 @@ struct atmel_nand_data {
u8 enable_pin; /* chip enable */ u8 enable_pin; /* chip enable */
u8 det_pin; /* card detect */ u8 det_pin; /* card detect */
u8 rdy_pin; /* ready/busy */ u8 rdy_pin; /* ready/busy */
u8 rdy_pin_active_low; /* rdy_pin value is inverted */
u8 ale; /* address line number connected to ALE */ u8 ale; /* address line number connected to ALE */
u8 cle; /* address line number connected to CLE */ u8 cle; /* address line number connected to CLE */
u8 bus_width_16; /* buswidth is 16 bit */ u8 bus_width_16; /* buswidth is 16 bit */
......
/*
* arch/arm/mach-ep93xx/include/mach/gesbc9312.h
*/
...@@ -10,7 +10,6 @@ ...@@ -10,7 +10,6 @@
#include "platform.h" #include "platform.h"
#include "gesbc9312.h"
#include "ts72xx.h" #include "ts72xx.h"
#endif #endif
...@@ -42,7 +42,7 @@ void __init kirkwood_init_irq(void) ...@@ -42,7 +42,7 @@ void __init kirkwood_init_irq(void)
writel(0, GPIO_EDGE_CAUSE(32)); writel(0, GPIO_EDGE_CAUSE(32));
for (i = IRQ_KIRKWOOD_GPIO_START; i < NR_IRQS; i++) { for (i = IRQ_KIRKWOOD_GPIO_START; i < NR_IRQS; i++) {
set_irq_chip(i, &orion_gpio_irq_level_chip); set_irq_chip(i, &orion_gpio_irq_chip);
set_irq_handler(i, handle_level_irq); set_irq_handler(i, handle_level_irq);
irq_desc[i].status |= IRQ_LEVEL; irq_desc[i].status |= IRQ_LEVEL;
set_irq_flags(i, IRQF_VALID); set_irq_flags(i, IRQF_VALID);
......
...@@ -40,7 +40,7 @@ void __init mv78xx0_init_irq(void) ...@@ -40,7 +40,7 @@ void __init mv78xx0_init_irq(void)
writel(0, GPIO_EDGE_CAUSE(0)); writel(0, GPIO_EDGE_CAUSE(0));
for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) { for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) {
set_irq_chip(i, &orion_gpio_irq_level_chip); set_irq_chip(i, &orion_gpio_irq_chip);
set_irq_handler(i, handle_level_irq); set_irq_handler(i, handle_level_irq);
irq_desc[i].status |= IRQ_LEVEL; irq_desc[i].status |= IRQ_LEVEL;
set_irq_flags(i, IRQF_VALID); set_irq_flags(i, IRQF_VALID);
......
...@@ -565,7 +565,7 @@ u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val) ...@@ -565,7 +565,7 @@ u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val)
* *
* Given a struct clk of a rate-selectable clksel clock, and a clock divisor, * Given a struct clk of a rate-selectable clksel clock, and a clock divisor,
* find the corresponding register field value. The return register value is * find the corresponding register field value. The return register value is
* the value before left-shifting. Returns 0xffffffff on error * the value before left-shifting. Returns ~0 on error
*/ */
u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
{ {
...@@ -577,7 +577,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) ...@@ -577,7 +577,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
clks = omap2_get_clksel_by_parent(clk, clk->parent); clks = omap2_get_clksel_by_parent(clk, clk->parent);
if (clks == NULL) if (clks == NULL)
return 0; return ~0;
for (clkr = clks->rates; clkr->div; clkr++) { for (clkr = clks->rates; clkr->div; clkr++) {
if ((clkr->flags & cpu_mask) && (clkr->div == div)) if ((clkr->flags & cpu_mask) && (clkr->div == div))
...@@ -588,7 +588,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) ...@@ -588,7 +588,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
printk(KERN_ERR "clock: Could not find divisor %d for " printk(KERN_ERR "clock: Could not find divisor %d for "
"clock %s parent %s\n", div, clk->name, "clock %s parent %s\n", div, clk->name,
clk->parent->name); clk->parent->name);
return 0; return ~0;
} }
return clkr->val; return clkr->val;
...@@ -708,7 +708,7 @@ static u32 omap2_clksel_get_src_field(void __iomem **src_addr, ...@@ -708,7 +708,7 @@ static u32 omap2_clksel_get_src_field(void __iomem **src_addr,
return 0; return 0;
for (clkr = clks->rates; clkr->div; clkr++) { for (clkr = clks->rates; clkr->div; clkr++) {
if (clkr->flags & (cpu_mask | DEFAULT_RATE)) if (clkr->flags & cpu_mask && clkr->flags & DEFAULT_RATE)
break; /* Found the default rate for this platform */ break; /* Found the default rate for this platform */
} }
...@@ -746,7 +746,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) ...@@ -746,7 +746,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
return -EINVAL; return -EINVAL;
if (clk->usecount > 0) if (clk->usecount > 0)
_omap2_clk_disable(clk); omap2_clk_disable(clk);
/* Set new source value (previous dividers if any in effect) */ /* Set new source value (previous dividers if any in effect) */
reg_val = __raw_readl(src_addr) & ~field_mask; reg_val = __raw_readl(src_addr) & ~field_mask;
...@@ -759,11 +759,11 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) ...@@ -759,11 +759,11 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
wmb(); wmb();
} }
if (clk->usecount > 0)
_omap2_clk_enable(clk);
clk->parent = new_parent; clk->parent = new_parent;
if (clk->usecount > 0)
omap2_clk_enable(clk);
/* CLKSEL clocks follow their parents' rates, divided by a divisor */ /* CLKSEL clocks follow their parents' rates, divided by a divisor */
clk->rate = new_parent->rate; clk->rate = new_parent->rate;
......
...@@ -44,7 +44,7 @@ void __init orion5x_init_irq(void) ...@@ -44,7 +44,7 @@ void __init orion5x_init_irq(void)
* User can use set_type() if he wants to use edge types handlers. * User can use set_type() if he wants to use edge types handlers.
*/ */
for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) { for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) {
set_irq_chip(i, &orion_gpio_irq_level_chip); set_irq_chip(i, &orion_gpio_irq_chip);
set_irq_handler(i, handle_level_irq); set_irq_handler(i, handle_level_irq);
irq_desc[i].status |= IRQ_LEVEL; irq_desc[i].status |= IRQ_LEVEL;
set_irq_flags(i, IRQF_VALID); set_irq_flags(i, IRQF_VALID);
......
...@@ -693,7 +693,8 @@ static void __init sanity_check_meminfo(void) ...@@ -693,7 +693,8 @@ static void __init sanity_check_meminfo(void)
* Check whether this memory bank would entirely overlap * Check whether this memory bank would entirely overlap
* the vmalloc area. * the vmalloc area.
*/ */
if (__va(bank->start) >= VMALLOC_MIN) { if (__va(bank->start) >= VMALLOC_MIN ||
__va(bank->start) < PAGE_OFFSET) {
printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx " printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "
"(vmalloc region overlap).\n", "(vmalloc region overlap).\n",
bank->start, bank->start + bank->size - 1); bank->start, bank->start + bank->size - 1);
......
...@@ -265,51 +265,36 @@ EXPORT_SYMBOL(orion_gpio_set_blink); ...@@ -265,51 +265,36 @@ EXPORT_SYMBOL(orion_gpio_set_blink);
* polarity LEVEL mask * polarity LEVEL mask
* *
****************************************************************************/ ****************************************************************************/
static void gpio_irq_edge_ack(u32 irq)
{
int pin = irq_to_gpio(irq);
writel(~(1 << (pin & 31)), GPIO_EDGE_CAUSE(pin));
}
static void gpio_irq_edge_mask(u32 irq)
{
int pin = irq_to_gpio(irq);
u32 u;
u = readl(GPIO_EDGE_MASK(pin));
u &= ~(1 << (pin & 31));
writel(u, GPIO_EDGE_MASK(pin));
}
static void gpio_irq_edge_unmask(u32 irq) static void gpio_irq_ack(u32 irq)
{ {
int pin = irq_to_gpio(irq); int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
u32 u; if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
int pin = irq_to_gpio(irq);
u = readl(GPIO_EDGE_MASK(pin)); writel(~(1 << (pin & 31)), GPIO_EDGE_CAUSE(pin));
u |= 1 << (pin & 31); }
writel(u, GPIO_EDGE_MASK(pin));
} }
static void gpio_irq_level_mask(u32 irq) static void gpio_irq_mask(u32 irq)
{ {
int pin = irq_to_gpio(irq); int pin = irq_to_gpio(irq);
u32 u; int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ?
u = readl(GPIO_LEVEL_MASK(pin)); GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
u32 u = readl(reg);
u &= ~(1 << (pin & 31)); u &= ~(1 << (pin & 31));
writel(u, GPIO_LEVEL_MASK(pin)); writel(u, reg);
} }
static void gpio_irq_level_unmask(u32 irq) static void gpio_irq_unmask(u32 irq)
{ {
int pin = irq_to_gpio(irq); int pin = irq_to_gpio(irq);
u32 u; int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ?
u = readl(GPIO_LEVEL_MASK(pin)); GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
u32 u = readl(reg);
u |= 1 << (pin & 31); u |= 1 << (pin & 31);
writel(u, GPIO_LEVEL_MASK(pin)); writel(u, reg);
} }
static int gpio_irq_set_type(u32 irq, u32 type) static int gpio_irq_set_type(u32 irq, u32 type)
...@@ -331,9 +316,9 @@ static int gpio_irq_set_type(u32 irq, u32 type) ...@@ -331,9 +316,9 @@ static int gpio_irq_set_type(u32 irq, u32 type)
* Set edge/level type. * Set edge/level type.
*/ */
if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
desc->chip = &orion_gpio_irq_edge_chip; desc->handle_irq = handle_edge_irq;
} else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
desc->chip = &orion_gpio_irq_level_chip; desc->handle_irq = handle_level_irq;
} else { } else {
printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type); printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type);
return -EINVAL; return -EINVAL;
...@@ -371,19 +356,11 @@ static int gpio_irq_set_type(u32 irq, u32 type) ...@@ -371,19 +356,11 @@ static int gpio_irq_set_type(u32 irq, u32 type)
return 0; return 0;
} }
struct irq_chip orion_gpio_irq_edge_chip = { struct irq_chip orion_gpio_irq_chip = {
.name = "orion_gpio_irq_edge", .name = "orion_gpio",
.ack = gpio_irq_edge_ack, .ack = gpio_irq_ack,
.mask = gpio_irq_edge_mask, .mask = gpio_irq_mask,
.unmask = gpio_irq_edge_unmask, .unmask = gpio_irq_unmask,
.set_type = gpio_irq_set_type,
};
struct irq_chip orion_gpio_irq_level_chip = {
.name = "orion_gpio_irq_level",
.mask = gpio_irq_level_mask,
.mask_ack = gpio_irq_level_mask,
.unmask = gpio_irq_level_unmask,
.set_type = gpio_irq_set_type, .set_type = gpio_irq_set_type,
}; };
......
...@@ -31,8 +31,7 @@ void orion_gpio_set_blink(unsigned pin, int blink); ...@@ -31,8 +31,7 @@ void orion_gpio_set_blink(unsigned pin, int blink);
/* /*
* GPIO interrupt handling. * GPIO interrupt handling.
*/ */
extern struct irq_chip orion_gpio_irq_edge_chip; extern struct irq_chip orion_gpio_irq_chip;
extern struct irq_chip orion_gpio_irq_level_chip;
void orion_gpio_irq_handler(int irqoff); void orion_gpio_irq_handler(int irqoff);
......
...@@ -116,6 +116,7 @@ struct atmel_nand_data { ...@@ -116,6 +116,7 @@ struct atmel_nand_data {
int enable_pin; /* chip enable */ int enable_pin; /* chip enable */
int det_pin; /* card detect */ int det_pin; /* card detect */
int rdy_pin; /* ready/busy */ int rdy_pin; /* ready/busy */
u8 rdy_pin_active_low; /* rdy_pin value is inverted */
u8 ale; /* address line number connected to ALE */ u8 ale; /* address line number connected to ALE */
u8 cle; /* address line number connected to CLE */ u8 cle; /* address line number connected to CLE */
u8 bus_width_16; /* buswidth is 16 bit */ u8 bus_width_16; /* buswidth is 16 bit */
......
...@@ -139,7 +139,8 @@ static int atmel_nand_device_ready(struct mtd_info *mtd) ...@@ -139,7 +139,8 @@ static int atmel_nand_device_ready(struct mtd_info *mtd)
struct nand_chip *nand_chip = mtd->priv; struct nand_chip *nand_chip = mtd->priv;
struct atmel_nand_host *host = nand_chip->priv; struct atmel_nand_host *host = nand_chip->priv;
return gpio_get_value(host->board->rdy_pin); return gpio_get_value(host->board->rdy_pin) ^
!!host->board->rdy_pin_active_low;
} }
/* /*
......
...@@ -904,8 +904,8 @@ static void pxa25x_ep_fifo_flush(struct usb_ep *_ep) ...@@ -904,8 +904,8 @@ static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
/* most IN status is the same, but ISO can't stall */ /* most IN status is the same, but ISO can't stall */
*ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
| (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
? 0 : UDCCS_BI_SST; ? 0 : UDCCS_BI_SST);
} }
......
...@@ -107,10 +107,10 @@ static int at91_wdt_close(struct inode *inode, struct file *file) ...@@ -107,10 +107,10 @@ static int at91_wdt_close(struct inode *inode, struct file *file)
static int at91_wdt_settimeout(int new_time) static int at91_wdt_settimeout(int new_time)
{ {
/* /*
* All counting occurs at SLOW_CLOCK / 128 = 0.256 Hz * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
* *
* Since WDV is a 16-bit counter, the maximum period is * Since WDV is a 16-bit counter, the maximum period is
* 65536 / 0.256 = 256 seconds. * 65536 / 256 = 256 seconds.
*/ */
if ((new_time <= 0) || (new_time > WDT_MAX_TIME)) if ((new_time <= 0) || (new_time > WDT_MAX_TIME))
return -EINVAL; return -EINVAL;
......
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
#include <linux/errno.h> #include <linux/errno.h>
#include <linux/fs.h> #include <linux/fs.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/miscdevice.h> #include <linux/miscdevice.h>
#include <linux/module.h> #include <linux/module.h>
......
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