Commit 417d2e50 authored by Benoit Parrot's avatar Benoit Parrot Committed by Mauro Carvalho Chehab

[media] media: platform: add VPFE capture driver support for AM437X

This patch adds Video Processing Front End (VPFE) driver for
AM437X family of devices
Driver supports the following:
- V4L2 API using MMAP buffer access based on videobuf2 api
- Asynchronous sensor/decoder sub device registration
- DT support
Signed-off-by: default avatarBenoit Parrot <bparrot@ti.com>
Signed-off-by: default avatarDarren Etheridge <detheridge@ti.com>
Signed-off-by: default avatarLad, Prabhakar <prabhakar.csengg@gmail.com>
[hans.verkuil@cisco.com: swapped two lines to fix vpfe_release() & add pinctrl include]
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@osg.samsung.com>
parent 3b1635e0
Texas Instruments AM437x CAMERA (VPFE)
--------------------------------------
The Video Processing Front End (VPFE) is a key component for image capture
applications. The capture module provides the system interface and the
processing capability to connect RAW image-sensor modules and video decoders
to the AM437x device.
Required properties:
- compatible: must be "ti,am437x-vpfe"
- reg: physical base address and length of the registers set for the device;
- interrupts: should contain IRQ line for the VPFE;
- ti,am437x-vpfe-interface: can be one of the following,
0 - Raw Bayer Interface.
1 - 8 Bit BT656 Interface.
2 - 10 Bit BT656 Interface.
3 - YCbCr 8 Bit Interface.
4 - YCbCr 16 Bit Interface.
VPFE supports a single port node with parallel bus. It should contain one
'port' child node with child 'endpoint' node. Please refer to the bindings
defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
Example:
vpfe: vpfe@f0034000 {
compatible = "ti,am437x-vpfe";
reg = <0x48328000 0x2000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&vpfe_pins_default>;
pinctrl-1 = <&vpfe_pins_sleep>;
port {
#address-cells = <1>;
#size-cells = <0>;
vpfe0_ep: endpoint {
remote-endpoint = <&ov2659_1>;
ti,am437x-vpfe-interface = <0>;
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;
};
};
};
i2c1: i2c@4802a000 {
ov2659@30 {
compatible = "ti,ov2659";
reg = <0x30>;
port {
ov2659_1: endpoint {
remote-endpoint = <&vpfe0_ep>;
bus-width = <8>;
mclk-frequency = <12000000>;
};
};
};
......@@ -8745,6 +8745,15 @@ S: Maintained
F: drivers/media/platform/davinci/
F: include/media/davinci/
TI AM437X VPFE DRIVER
M: Lad, Prabhakar <prabhakar.csengg@gmail.com>
L: linux-media@vger.kernel.org
W: http://linuxtv.org/
Q: http://patchwork.linuxtv.org/project/linux-media/list/
T: git git://linuxtv.org/mhadli/v4l-dvb-davinci_devices.git
S: Maintained
F: drivers/media/platform/am437x/
SIS 190 ETHERNET DRIVER
M: Francois Romieu <romieu@fr.zoreil.com>
L: netdev@vger.kernel.org
......
......@@ -118,6 +118,7 @@ config VIDEO_S3C_CAMIF
source "drivers/media/platform/soc_camera/Kconfig"
source "drivers/media/platform/exynos4-is/Kconfig"
source "drivers/media/platform/s5p-tv/Kconfig"
source "drivers/media/platform/am437x/Kconfig"
endif # V4L_PLATFORM_DRIVERS
......
......@@ -46,4 +46,6 @@ obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1/
obj-y += omap/
obj-$(CONFIG_VIDEO_AM437X_VPFE) += am437x/
ccflags-y += -I$(srctree)/drivers/media/i2c
config VIDEO_AM437X_VPFE
tristate "TI AM437x VPFE video capture driver"
depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on SOC_AM43XX || COMPILE_TEST
select VIDEOBUF2_DMA_CONTIG
help
Support for AM437x Video Processing Front End based Video
Capture Driver.
To compile this driver as a module, choose M here. The module
will be called am437x-vpfe.
# Makefile for AM437x VPFE driver
obj-$(CONFIG_VIDEO_AM437X_VPFE) += am437x-vpfe.o
This diff is collapsed.
/*
* Copyright (C) 2013 - 2014 Texas Instruments, Inc.
*
* Benoit Parrot <bparrot@ti.com>
* Lad, Prabhakar <prabhakar.csengg@gmail.com>
*
* This program is free software; you may redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef AM437X_VPFE_H
#define AM437X_VPFE_H
#include <linux/am437x-vpfe.h>
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/videodev2.h>
#include <media/v4l2-dev.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ioctl.h>
#include <media/videobuf2-dma-contig.h>
#include "am437x-vpfe_regs.h"
enum vpfe_pin_pol {
VPFE_PINPOL_POSITIVE = 0,
VPFE_PINPOL_NEGATIVE,
};
enum vpfe_hw_if_type {
/* Raw Bayer */
VPFE_RAW_BAYER = 0,
/* BT656 - 8 bit */
VPFE_BT656,
/* BT656 - 10 bit */
VPFE_BT656_10BIT,
/* YCbCr - 8 bit with external sync */
VPFE_YCBCR_SYNC_8,
/* YCbCr - 16 bit with external sync */
VPFE_YCBCR_SYNC_16,
};
/* interface description */
struct vpfe_hw_if_param {
enum vpfe_hw_if_type if_type;
enum vpfe_pin_pol hdpol;
enum vpfe_pin_pol vdpol;
unsigned int bus_width;
};
#define VPFE_MAX_SUBDEV 1
#define VPFE_MAX_INPUTS 1
struct vpfe_pixel_format {
struct v4l2_fmtdesc fmtdesc;
/* bytes per pixel */
int bpp;
};
struct vpfe_std_info {
int active_pixels;
int active_lines;
/* current frame format */
int frame_format;
};
struct vpfe_route {
u32 input;
u32 output;
};
struct vpfe_subdev_info {
char name[32];
/* Sub device group id */
int grp_id;
/* inputs available at the sub device */
struct v4l2_input inputs[VPFE_MAX_INPUTS];
/* Sub dev routing information for each input */
struct vpfe_route *routes;
/* check if sub dev supports routing */
int can_route;
/* ccdc bus/interface configuration */
struct vpfe_hw_if_param vpfe_param;
struct v4l2_subdev *sd;
};
struct vpfe_config {
/* information about each subdev */
struct vpfe_subdev_info sub_devs[VPFE_MAX_SUBDEV];
/* Flat array, arranged in groups */
struct v4l2_async_subdev *asd[VPFE_MAX_SUBDEV];
};
struct vpfe_cap_buffer {
struct vb2_buffer vb;
struct list_head list;
};
enum ccdc_pixfmt {
CCDC_PIXFMT_RAW = 0,
CCDC_PIXFMT_YCBCR_16BIT,
CCDC_PIXFMT_YCBCR_8BIT,
};
enum ccdc_frmfmt {
CCDC_FRMFMT_PROGRESSIVE = 0,
CCDC_FRMFMT_INTERLACED,
};
/* PIXEL ORDER IN MEMORY from LSB to MSB */
/* only applicable for 8-bit input mode */
enum ccdc_pixorder {
CCDC_PIXORDER_YCBYCR,
CCDC_PIXORDER_CBYCRY,
};
enum ccdc_buftype {
CCDC_BUFTYPE_FLD_INTERLEAVED,
CCDC_BUFTYPE_FLD_SEPARATED
};
/* returns the highest bit used for the gamma */
static inline u8 ccdc_gamma_width_max_bit(enum vpfe_ccdc_gamma_width width)
{
return 15 - width;
}
/* returns the highest bit used for this data size */
static inline u8 ccdc_data_size_max_bit(enum vpfe_ccdc_data_size sz)
{
return sz == VPFE_CCDC_DATA_8BITS ? 7 : 15 - sz;
}
/* Structure for CCDC configuration parameters for raw capture mode */
struct ccdc_params_raw {
/* pixel format */
enum ccdc_pixfmt pix_fmt;
/* progressive or interlaced frame */
enum ccdc_frmfmt frm_fmt;
struct v4l2_rect win;
/* Current Format Bytes Per Pixels */
unsigned int bytesperpixel;
/* Current Format Bytes per Lines
* (Aligned to 32 bytes) used for HORZ_INFO
*/
unsigned int bytesperline;
/* field id polarity */
enum vpfe_pin_pol fid_pol;
/* vertical sync polarity */
enum vpfe_pin_pol vd_pol;
/* horizontal sync polarity */
enum vpfe_pin_pol hd_pol;
/* interleaved or separated fields */
enum ccdc_buftype buf_type;
/*
* enable to store the image in inverse
* order in memory(bottom to top)
*/
unsigned char image_invert_enable;
/* configurable parameters */
struct vpfe_ccdc_config_params_raw config_params;
};
struct ccdc_params_ycbcr {
/* pixel format */
enum ccdc_pixfmt pix_fmt;
/* progressive or interlaced frame */
enum ccdc_frmfmt frm_fmt;
struct v4l2_rect win;
/* Current Format Bytes Per Pixels */
unsigned int bytesperpixel;
/* Current Format Bytes per Lines
* (Aligned to 32 bytes) used for HORZ_INFO
*/
unsigned int bytesperline;
/* field id polarity */
enum vpfe_pin_pol fid_pol;
/* vertical sync polarity */
enum vpfe_pin_pol vd_pol;
/* horizontal sync polarity */
enum vpfe_pin_pol hd_pol;
/* enable BT.656 embedded sync mode */
int bt656_enable;
/* cb:y:cr:y or y:cb:y:cr in memory */
enum ccdc_pixorder pix_order;
/* interleaved or separated fields */
enum ccdc_buftype buf_type;
};
/*
* CCDC operational configuration
*/
struct ccdc_config {
/* CCDC interface type */
enum vpfe_hw_if_type if_type;
/* Raw Bayer configuration */
struct ccdc_params_raw bayer;
/* YCbCr configuration */
struct ccdc_params_ycbcr ycbcr;
/* ccdc base address */
void __iomem *base_addr;
};
struct vpfe_ccdc {
struct ccdc_config ccdc_cfg;
u32 ccdc_ctx[VPFE_REG_END / sizeof(u32)];
};
struct vpfe_device {
/* V4l2 specific parameters */
/* Identifies video device for this channel */
struct video_device *video_dev;
/* sub devices */
struct v4l2_subdev **sd;
/* vpfe cfg */
struct vpfe_config *cfg;
/* V4l2 device */
struct v4l2_device v4l2_dev;
/* parent device */
struct device *pdev;
/* subdevice async Notifier */
struct v4l2_async_notifier notifier;
/* Indicates id of the field which is being displayed */
unsigned field;
unsigned sequence;
/* current interface type */
struct vpfe_hw_if_param vpfe_if_params;
/* ptr to currently selected sub device */
struct vpfe_subdev_info *current_subdev;
/* current input at the sub device */
int current_input;
/* Keeps track of the information about the standard */
struct vpfe_std_info std_info;
/* std index into std table */
int std_index;
/* IRQs used when CCDC output to SDRAM */
unsigned int irq;
/* Pointer pointing to current v4l2_buffer */
struct vpfe_cap_buffer *cur_frm;
/* Pointer pointing to next v4l2_buffer */
struct vpfe_cap_buffer *next_frm;
/* Used to store pixel format */
struct v4l2_format fmt;
/* Used to store current bytes per pixel based on current format */
unsigned int bpp;
/*
* used when IMP is chained to store the crop window which
* is different from the image window
*/
struct v4l2_rect crop;
/* Buffer queue used in video-buf */
struct vb2_queue buffer_queue;
/* Allocator-specific contexts for each plane */
struct vb2_alloc_ctx *alloc_ctx;
/* Queue of filled frames */
struct list_head dma_queue;
/* IRQ lock for DMA queue */
spinlock_t dma_queue_lock;
/* lock used to access this structure */
struct mutex lock;
/*
* offset where second field starts from the starting of the
* buffer for field separated YCbCr formats
*/
u32 field_off;
struct vpfe_ccdc ccdc;
};
#endif /* AM437X_VPFE_H */
/*
* TI AM437x Image Sensor Interface Registers
*
* Copyright (C) 2013 - 2014 Texas Instruments, Inc.
*
* Benoit Parrot <bparrot@ti.com>
* Lad, Prabhakar <prabhakar.csengg@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef AM437X_VPFE_REGS_H
#define AM437X_VPFE_REGS_H
/* VPFE module register offset */
#define VPFE_REVISION 0x0
#define VPFE_PCR 0x4
#define VPFE_SYNMODE 0x8
#define VPFE_HD_VD_WID 0xc
#define VPFE_PIX_LINES 0x10
#define VPFE_HORZ_INFO 0x14
#define VPFE_VERT_START 0x18
#define VPFE_VERT_LINES 0x1c
#define VPFE_CULLING 0x20
#define VPFE_HSIZE_OFF 0x24
#define VPFE_SDOFST 0x28
#define VPFE_SDR_ADDR 0x2c
#define VPFE_CLAMP 0x30
#define VPFE_DCSUB 0x34
#define VPFE_COLPTN 0x38
#define VPFE_BLKCMP 0x3c
#define VPFE_VDINT 0x48
#define VPFE_ALAW 0x4c
#define VPFE_REC656IF 0x50
#define VPFE_CCDCFG 0x54
#define VPFE_DMA_CNTL 0x98
#define VPFE_SYSCONFIG 0x104
#define VPFE_CONFIG 0x108
#define VPFE_IRQ_EOI 0x110
#define VPFE_IRQ_STS_RAW 0x114
#define VPFE_IRQ_STS 0x118
#define VPFE_IRQ_EN_SET 0x11c
#define VPFE_IRQ_EN_CLR 0x120
#define VPFE_REG_END 0x124
/* Define bit fields within selected registers */
#define VPFE_FID_POL_MASK 1
#define VPFE_FID_POL_SHIFT 4
#define VPFE_HD_POL_MASK 1
#define VPFE_HD_POL_SHIFT 3
#define VPFE_VD_POL_MASK 1
#define VPFE_VD_POL_SHIFT 2
#define VPFE_HSIZE_OFF_MASK 0xffffffe0
#define VPFE_32BYTE_ALIGN_VAL 31
#define VPFE_FRM_FMT_MASK 0x1
#define VPFE_FRM_FMT_SHIFT 7
#define VPFE_DATA_SZ_MASK 7
#define VPFE_DATA_SZ_SHIFT 8
#define VPFE_PIX_FMT_MASK 3
#define VPFE_PIX_FMT_SHIFT 12
#define VPFE_VP2SDR_DISABLE 0xfffbffff
#define VPFE_WEN_ENABLE (1 << 17)
#define VPFE_SDR2RSZ_DISABLE 0xfff7ffff
#define VPFE_VDHDEN_ENABLE (1 << 16)
#define VPFE_LPF_ENABLE (1 << 14)
#define VPFE_ALAW_ENABLE (1 << 3)
#define VPFE_ALAW_GAMMA_WD_MASK 7
#define VPFE_BLK_CLAMP_ENABLE (1 << 31)
#define VPFE_BLK_SGAIN_MASK 0x1f
#define VPFE_BLK_ST_PXL_MASK 0x7fff
#define VPFE_BLK_ST_PXL_SHIFT 10
#define VPFE_BLK_SAMPLE_LN_MASK 7
#define VPFE_BLK_SAMPLE_LN_SHIFT 28
#define VPFE_BLK_SAMPLE_LINE_MASK 7
#define VPFE_BLK_SAMPLE_LINE_SHIFT 25
#define VPFE_BLK_DC_SUB_MASK 0x03fff
#define VPFE_BLK_COMP_MASK 0xff
#define VPFE_BLK_COMP_GB_COMP_SHIFT 8
#define VPFE_BLK_COMP_GR_COMP_SHIFT 16
#define VPFE_BLK_COMP_R_COMP_SHIFT 24
#define VPFE_LATCH_ON_VSYNC_DISABLE (1 << 15)
#define VPFE_DATA_PACK_ENABLE (1 << 11)
#define VPFE_HORZ_INFO_SPH_SHIFT 16
#define VPFE_VERT_START_SLV0_SHIFT 16
#define VPFE_VDINT_VDINT0_SHIFT 16
#define VPFE_VDINT_VDINT1_MASK 0xffff
#define VPFE_PPC_RAW 1
#define VPFE_DCSUB_DEFAULT_VAL 0
#define VPFE_CLAMP_DEFAULT_VAL 0
#define VPFE_COLPTN_VAL 0xbb11bb11
#define VPFE_TWO_BYTES_PER_PIXEL 2
#define VPFE_INTERLACED_IMAGE_INVERT 0x4b6d
#define VPFE_INTERLACED_NO_IMAGE_INVERT 0x0249
#define VPFE_PROGRESSIVE_IMAGE_INVERT 0x4000
#define VPFE_PROGRESSIVE_NO_IMAGE_INVERT 0
#define VPFE_INTERLACED_HEIGHT_SHIFT 1
#define VPFE_SYN_MODE_INPMOD_SHIFT 12
#define VPFE_SYN_MODE_INPMOD_MASK 3
#define VPFE_SYN_MODE_8BITS (7 << 8)
#define VPFE_SYN_MODE_10BITS (6 << 8)
#define VPFE_SYN_MODE_11BITS (5 << 8)
#define VPFE_SYN_MODE_12BITS (4 << 8)
#define VPFE_SYN_MODE_13BITS (3 << 8)
#define VPFE_SYN_MODE_14BITS (2 << 8)
#define VPFE_SYN_MODE_15BITS (1 << 8)
#define VPFE_SYN_MODE_16BITS (0 << 8)
#define VPFE_SYN_FLDMODE_MASK 1
#define VPFE_SYN_FLDMODE_SHIFT 7
#define VPFE_REC656IF_BT656_EN 3
#define VPFE_SYN_MODE_VD_POL_NEGATIVE (1 << 2)
#define VPFE_CCDCFG_Y8POS_SHIFT 11
#define VPFE_CCDCFG_BW656_10BIT (1 << 5)
#define VPFE_SDOFST_FIELD_INTERLEAVED 0x249
#define VPFE_NO_CULLING 0xffff00ff
#define VPFE_VDINT0 (1 << 0)
#define VPFE_VDINT1 (1 << 1)
#define VPFE_VDINT2 (1 << 2)
#define VPFE_DMA_CNTL_OVERFLOW (1 << 31)
#define VPFE_CONFIG_PCLK_INV_SHIFT 0
#define VPFE_CONFIG_PCLK_INV_MASK 1
#define VPFE_CONFIG_PCLK_INV_NOT_INV 0
#define VPFE_CONFIG_PCLK_INV_INV 1
#define VPFE_CONFIG_EN_SHIFT 1
#define VPFE_CONFIG_EN_MASK 2
#define VPFE_CONFIG_EN_DISABLE 0
#define VPFE_CONFIG_EN_ENABLE 1
#define VPFE_CONFIG_ST_SHIFT 2
#define VPFE_CONFIG_ST_MASK 4
#define VPFE_CONFIG_ST_OCP_ACTIVE 0
#define VPFE_CONFIG_ST_OCP_STANDBY 1
#endif /* AM437X_VPFE_REGS_H */
......@@ -35,6 +35,7 @@ header-y += adfs_fs.h
header-y += affs_hardblocks.h
header-y += agpgart.h
header-y += aio_abi.h
header-y += am437x-vpfe.h
header-y += apm_bios.h
header-y += arcfb.h
header-y += atalk.h
......
/*
* Copyright (C) 2013 - 2014 Texas Instruments, Inc.
*
* Benoit Parrot <bparrot@ti.com>
* Lad, Prabhakar <prabhakar.csengg@gmail.com>
*
* This program is free software; you may redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef AM437X_VPFE_USER_H
#define AM437X_VPFE_USER_H
enum vpfe_ccdc_data_size {
VPFE_CCDC_DATA_16BITS = 0,
VPFE_CCDC_DATA_15BITS,
VPFE_CCDC_DATA_14BITS,
VPFE_CCDC_DATA_13BITS,
VPFE_CCDC_DATA_12BITS,
VPFE_CCDC_DATA_11BITS,
VPFE_CCDC_DATA_10BITS,
VPFE_CCDC_DATA_8BITS,
};
/* enum for No of pixel per line to be avg. in Black Clamping*/
enum vpfe_ccdc_sample_length {
VPFE_CCDC_SAMPLE_1PIXELS = 0,
VPFE_CCDC_SAMPLE_2PIXELS,
VPFE_CCDC_SAMPLE_4PIXELS,
VPFE_CCDC_SAMPLE_8PIXELS,
VPFE_CCDC_SAMPLE_16PIXELS,
};
/* enum for No of lines in Black Clamping */
enum vpfe_ccdc_sample_line {
VPFE_CCDC_SAMPLE_1LINES = 0,
VPFE_CCDC_SAMPLE_2LINES,
VPFE_CCDC_SAMPLE_4LINES,
VPFE_CCDC_SAMPLE_8LINES,
VPFE_CCDC_SAMPLE_16LINES,
};
/* enum for Alaw gamma width */
enum vpfe_ccdc_gamma_width {
VPFE_CCDC_GAMMA_BITS_15_6 = 0, /* use bits 15-6 for gamma */
VPFE_CCDC_GAMMA_BITS_14_5,
VPFE_CCDC_GAMMA_BITS_13_4,
VPFE_CCDC_GAMMA_BITS_12_3,
VPFE_CCDC_GAMMA_BITS_11_2,
VPFE_CCDC_GAMMA_BITS_10_1,
VPFE_CCDC_GAMMA_BITS_09_0, /* use bits 9-0 for gamma */
};
/* structure for ALaw */
struct vpfe_ccdc_a_law {
/* Enable/disable A-Law */
unsigned char enable;
/* Gamma Width Input */
enum vpfe_ccdc_gamma_width gamma_wd;
};
/* structure for Black Clamping */
struct vpfe_ccdc_black_clamp {
unsigned char enable;
/* only if bClampEnable is TRUE */
enum vpfe_ccdc_sample_length sample_pixel;
/* only if bClampEnable is TRUE */
enum vpfe_ccdc_sample_line sample_ln;
/* only if bClampEnable is TRUE */
unsigned short start_pixel;
/* only if bClampEnable is TRUE */
unsigned short sgain;
/* only if bClampEnable is FALSE */
unsigned short dc_sub;
};
/* structure for Black Level Compensation */
struct vpfe_ccdc_black_compensation {
/* Constant value to subtract from Red component */
char r;
/* Constant value to subtract from Gr component */
char gr;
/* Constant value to subtract from Blue component */
char b;
/* Constant value to subtract from Gb component */
char gb;
};
/* Structure for CCDC configuration parameters for raw capture mode passed
* by application
*/
struct vpfe_ccdc_config_params_raw {
/* data size value from 8 to 16 bits */
enum vpfe_ccdc_data_size data_sz;
/* Structure for Optional A-Law */
struct vpfe_ccdc_a_law alaw;
/* Structure for Optical Black Clamp */
struct vpfe_ccdc_black_clamp blk_clamp;
/* Structure for Black Compensation */
struct vpfe_ccdc_black_compensation blk_comp;
};
/*
* Private IOCTL
* VIDIOC_AM437X_CCDC_CFG - Set CCDC configuration for raw capture
* This is an experimental ioctl that will change in future kernels. So use
* this ioctl with care !
**/
#define VIDIOC_AM437X_CCDC_CFG \
_IOW('V', BASE_VIDIOC_PRIVATE + 1, void *)
#endif /* AM437X_VPFE_USER_H */
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