Commit 46177465 authored by Xingyu Chen's avatar Xingyu Chen Committed by Jonathan Cameron

dt-bindings: iio: adc: update the doc for SAR ADC

Update the doc as the SAR ADC modules doesn't require "sana" clock.
Singed-off-by: default avatarXingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: default avatarYixun Lan <yixun.lan@amlogic.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent 930df4d8
......@@ -15,7 +15,6 @@ Required properties:
- "clkin" for the reference clock (typically XTAL)
- "core" for the SAR ADC core clock
optional clocks:
- "sana" for the analog clock
- "adc_clk" for the ADC (sampling) clock
- "adc_sel" for the ADC (sampling) clock mux
- vref-supply: the regulator supply for the ADC reference voltage
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment