Commit 46b28357 authored by Paul Mackerras's avatar Paul Mackerras

Merge branch 'fixes-2.6.23' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into merge

parents 9d78592e 14170789
...@@ -134,7 +134,7 @@ config BDI_SWITCH ...@@ -134,7 +134,7 @@ config BDI_SWITCH
config BOOTX_TEXT config BOOTX_TEXT
bool "Support for early boot text console (BootX or OpenFirmware only)" bool "Support for early boot text console (BootX or OpenFirmware only)"
depends PPC_OF depends PPC_OF && PPC_MULTIPLATFORM
help help
Say Y here to see progress messages from the boot firmware in text Say Y here to see progress messages from the boot firmware in text
mode. Requires either BootX or Open Firmware. mode. Requires either BootX or Open Firmware.
......
...@@ -45,7 +45,7 @@ tsi108@c0000000 { ...@@ -45,7 +45,7 @@ tsi108@c0000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
#interrupt-cells = <2>; #interrupt-cells = <2>;
device_type = "tsi108-bridge"; device_type = "tsi-bridge";
ranges = <00000000 c0000000 00010000>; ranges = <00000000 c0000000 00010000>;
reg = <c0000000 00010000>; reg = <c0000000 00010000>;
bus-frequency = <0>; bus-frequency = <0>;
......
...@@ -104,6 +104,7 @@ ethernet@24000 { ...@@ -104,6 +104,7 @@ ethernet@24000 {
interrupts = <1d 2 1e 2 22 2>; interrupts = <1d 2 1e 2 22 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
phy-handle = <&phy0>; phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
}; };
ethernet@26000 { ethernet@26000 {
...@@ -117,6 +118,7 @@ ethernet@26000 { ...@@ -117,6 +118,7 @@ ethernet@26000 {
interrupts = <1f 2 20 2 21 2>; interrupts = <1f 2 20 2 21 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
phy-handle = <&phy1>; phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
}; };
serial@4500 { serial@4500 {
...@@ -348,6 +350,12 @@ gpio@400 { ...@@ -348,6 +350,12 @@ gpio@400 {
}; };
global-utilities@e0000 { //global utilities block
compatible = "fsl,mpc8548-guts";
reg = <e0000 1000>;
fsl,has-rstcr;
};
mpic: pic@40000 { mpic: pic@40000 {
clock-frequency = <0>; clock-frequency = <0>;
interrupt-controller; interrupt-controller;
......
...@@ -170,6 +170,12 @@ serial@4500 { ...@@ -170,6 +170,12 @@ serial@4500 {
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
global-utilities@e0000 { //global utilities block
compatible = "fsl,mpc8548-guts";
reg = <e0000 1000>;
fsl,has-rstcr;
};
pci@8000 { pci@8000 {
interrupt-map-mask = <f800 0 0 7>; interrupt-map-mask = <f800 0 0 7>;
interrupt-map = < interrupt-map = <
......
...@@ -418,10 +418,10 @@ irq_hw_number_t virq_to_hw(unsigned int virq) ...@@ -418,10 +418,10 @@ irq_hw_number_t virq_to_hw(unsigned int virq)
} }
EXPORT_SYMBOL_GPL(virq_to_hw); EXPORT_SYMBOL_GPL(virq_to_hw);
struct irq_host *irq_alloc_host(unsigned int revmap_type, __init_refok struct irq_host *irq_alloc_host(unsigned int revmap_type,
unsigned int revmap_arg, unsigned int revmap_arg,
struct irq_host_ops *ops, struct irq_host_ops *ops,
irq_hw_number_t inval_irq) irq_hw_number_t inval_irq)
{ {
struct irq_host *host; struct irq_host *host;
unsigned int size = sizeof(struct irq_host); unsigned int size = sizeof(struct irq_host);
......
...@@ -65,7 +65,7 @@ static void __devinit pci_setup_pci_controller(struct pci_controller *hose) ...@@ -65,7 +65,7 @@ static void __devinit pci_setup_pci_controller(struct pci_controller *hose)
spin_unlock(&hose_spinlock); spin_unlock(&hose_spinlock);
} }
struct pci_controller * pcibios_alloc_controller(struct device_node *dev) __init_refok struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
{ {
struct pci_controller *phb; struct pci_controller *phb;
......
...@@ -59,6 +59,24 @@ LIST_HEAD(hose_list); ...@@ -59,6 +59,24 @@ LIST_HEAD(hose_list);
static int pci_bus_count; static int pci_bus_count;
static void
fixup_hide_host_resource_fsl(struct pci_dev* dev)
{
int i, class = dev->class >> 8;
if ((class == PCI_CLASS_PROCESSOR_POWERPC) &&
(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
(dev->bus->parent == NULL)) {
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
dev->resource[i].start = 0;
dev->resource[i].end = 0;
dev->resource[i].flags = 0;
}
}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl);
static void static void
fixup_broken_pcnet32(struct pci_dev* dev) fixup_broken_pcnet32(struct pci_dev* dev)
{ {
...@@ -1229,7 +1247,7 @@ pcibios_init(void) ...@@ -1229,7 +1247,7 @@ pcibios_init(void)
subsys_initcall(pcibios_init); subsys_initcall(pcibios_init);
void __init pcibios_fixup_bus(struct pci_bus *bus) void pcibios_fixup_bus(struct pci_bus *bus)
{ {
struct pci_controller *hose = (struct pci_controller *) bus->sysdata; struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
unsigned long io_offset; unsigned long io_offset;
......
...@@ -423,7 +423,11 @@ void show_regs(struct pt_regs * regs) ...@@ -423,7 +423,11 @@ void show_regs(struct pt_regs * regs)
printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
trap = TRAP(regs); trap = TRAP(regs);
if (trap == 0x300 || trap == 0x600) if (trap == 0x300 || trap == 0x600)
#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
#else
printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr); printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
#endif
printk("TASK = %p[%d] '%s' THREAD: %p", printk("TASK = %p[%d] '%s' THREAD: %p",
current, current->pid, current->comm, task_thread_info(current)); current, current->pid, current->comm, task_thread_info(current));
......
...@@ -155,7 +155,7 @@ static int early_console_initialized; ...@@ -155,7 +155,7 @@ static int early_console_initialized;
* Called by setup_system after ppc_md->probe and ppc_md->early_init. * Called by setup_system after ppc_md->probe and ppc_md->early_init.
* Call it again after setting udbg_putc in ppc_md->setup_arch. * Call it again after setting udbg_putc in ppc_md->setup_arch.
*/ */
void register_early_udbg_console(void) void __init register_early_udbg_console(void)
{ {
if (early_console_initialized) if (early_console_initialized)
return; return;
......
...@@ -107,7 +107,7 @@ void __init setup_pci_cmd(struct pci_controller *hose) ...@@ -107,7 +107,7 @@ void __init setup_pci_cmd(struct pci_controller *hose)
} }
} }
static void __devinit quirk_fsl_pcie_transparent(struct pci_dev *dev) static void __init quirk_fsl_pcie_transparent(struct pci_dev *dev)
{ {
struct resource *res; struct resource *res;
int i, res_idx = PCI_BRIDGE_RESOURCES; int i, res_idx = PCI_BRIDGE_RESOURCES;
...@@ -216,7 +216,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) ...@@ -216,7 +216,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
/* check PCI express link status */ /* check PCI express link status */
if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) { if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG | hose->indirect_type |= PPC_INDIRECT_TYPE_EXT_REG |
PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS; PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS;
if (fsl_pcie_check_link(hose)) if (fsl_pcie_check_link(hose))
hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK; hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK;
......
...@@ -160,4 +160,5 @@ setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data, u32 ...@@ -160,4 +160,5 @@ setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data, u32
mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE); mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
hose->cfg_data = mbase + (cfg_data & ~PAGE_MASK); hose->cfg_data = mbase + (cfg_data & ~PAGE_MASK);
hose->ops = &indirect_pci_ops; hose->ops = &indirect_pci_ops;
hose->indirect_type = flags;
} }
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