Commit 4b5e362c authored by David S. Miller's avatar David S. Miller

[SPARC]: Bring ESP driver in line with modern EH handling.

parent 52712a65
......@@ -1041,6 +1041,8 @@ static void __init esp_init_swstate(struct esp *esp)
esp->resetting_bus = 0;
esp->snip = 0;
init_waitqueue_head(&esp->reset_queue);
/* Debugging... */
for(i = 0; i < 32; i++)
esp->espcmdlog[i] = 0;
......@@ -2045,6 +2047,7 @@ static int esp_finish_reset(struct esp *esp)
/* SCSI bus reset is complete. */
esp->resetting_bus = 0;
wake_up(&esp->reset_queue);
/* Ok, now it is safe to get commands going once more. */
if (esp->issue_SC)
......@@ -2065,7 +2068,7 @@ static int esp_do_resetbus(struct esp *esp)
/* Reset ESP chip, reset hanging bus, then kill active and
* disconnected commands for targets without soft reset.
*/
int esp_reset(Scsi_Cmnd *SCptr, unsigned int how)
int esp_reset(Scsi_Cmnd *SCptr)
{
struct esp *esp = (struct esp *) SCptr->host->hostdata;
unsigned long flags;
......@@ -2074,7 +2077,9 @@ int esp_reset(Scsi_Cmnd *SCptr, unsigned int how)
(void) esp_do_resetbus(esp);
spin_unlock_irqrestore(esp->ehost->host_lock, flags);
return SCSI_RESET_PENDING;
wait_event(esp->reset_queue, (esp->resetting_bus == 0));
return SUCCESS;
}
/* Internal ESP done function. */
......
......@@ -196,6 +196,7 @@ struct esp {
* cannot be assosciated with any specific command.
*/
u8 resetting_bus;
wait_queue_head_t reset_queue;
};
/* Bitfield meanings for the above registers. */
......@@ -407,51 +408,37 @@ extern const char *esp_info(struct Scsi_Host *);
extern int esp_queue(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
extern int esp_command(Scsi_Cmnd *);
extern int esp_abort(Scsi_Cmnd *);
extern int esp_reset(Scsi_Cmnd *, unsigned int);
extern int esp_reset(Scsi_Cmnd *);
extern int esp_proc_info(char *buffer, char **start, off_t offset, int length,
int hostno, int inout);
extern void esp_slave_detach(Scsi_Device* SDptr);
#ifdef CONFIG_SPARC64
#define SCSI_SPARC_ESP { \
proc_name: "esp", \
proc_info: &esp_proc_info, \
name: "Sun ESP 100/100a/200", \
detect: esp_detect, \
slave_detach: esp_slave_detach, \
info: esp_info, \
command: esp_command, \
queuecommand: esp_queue, \
abort: esp_abort, \
reset: esp_reset, \
can_queue: 7, \
this_id: 7, \
sg_tablesize: SG_ALL, \
cmd_per_lun: 1, \
use_clustering: ENABLE_CLUSTERING, \
highmem_io: 1, \
}
#define ESP_HIGHMEM_IO 1
#else
/* Sparc32's iommu code cannot handle highmem pages yet. */
#define SCSI_SPARC_ESP { \
proc_name: "esp", \
proc_info: &esp_proc_info, \
name: "Sun ESP 100/100a/200", \
detect: esp_detect, \
slave_detach: esp_slave_detach, \
info: esp_info, \
command: esp_command, \
queuecommand: esp_queue, \
abort: esp_abort, \
reset: esp_reset, \
can_queue: 7, \
this_id: 7, \
sg_tablesize: SG_ALL, \
cmd_per_lun: 1, \
use_clustering: ENABLE_CLUSTERING, \
}
#define ESP_HIGHMEM_IO 0
#endif
#define SCSI_SPARC_ESP { \
.proc_name = "esp", \
.proc_info = &esp_proc_info, \
.name = "Sun ESP 100/100a/200", \
.detect = esp_detect, \
.slave_detach = esp_slave_detach, \
.info = esp_info, \
.command = esp_command, \
.queuecommand = esp_queue, \
.eh_abort_handler = esp_abort, \
.eh_bus_reset_handler = esp_reset, \
.can_queue = 7, \
.this_id = 7, \
.sg_tablesize = SG_ALL, \
.cmd_per_lun = 1, \
.use_clustering = ENABLE_CLUSTERING, \
.highmem_io = ESP_HIGHMEM_IO, \
}
/* For our interrupt engine. */
#define for_each_esp(esp) \
for((esp) = espchain; (esp); (esp) = (esp)->next)
......
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